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-rw-r--r--include/configs/MPC8610HPCD.h2
-rw-r--r--include/configs/lwmon5.h2
-rw-r--r--include/configs/sbc8641d.h2
3 files changed, 3 insertions, 3 deletions
diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h
index 9e70198..585411c 100644
--- a/include/configs/MPC8610HPCD.h
+++ b/include/configs/MPC8610HPCD.h
@@ -114,7 +114,7 @@
#if 0 /* TODO */
#define CFG_DDR_CS0_BNDS 0x0000000F
#define CFG_DDR_CS0_CONFIG 0x80010202 /* Enable, no interleaving */
-#define CFG_DDR_EXT_REFRESH 0x00000000
+#define CFG_DDR_TIMING_3 0x00000000
#define CFG_DDR_TIMING_0 0x00260802
#define CFG_DDR_TIMING_1 0x3935d322
#define CFG_DDR_TIMING_2 0x14904cc8
diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h
index 690584a..1f669aa 100644
--- a/include/configs/lwmon5.h
+++ b/include/configs/lwmon5.h
@@ -91,9 +91,9 @@
/* Additional registers for watchdog timer post test */
-#define CFG_DSPIC_TEST_ADDR (CFG_PERIPHERAL_BASE + GPT0_MASK1)
#define CFG_WATCHDOG_TIME_ADDR (CFG_PERIPHERAL_BASE + GPT0_MASK2)
#define CFG_WATCHDOG_FLAGS_ADDR (CFG_PERIPHERAL_BASE + GPT0_MASK1)
+#define CFG_DSPIC_TEST_ADDR CFG_WATCHDOG_FLAGS_ADDR
#define CFG_WATCHDOG_MAGIC 0x12480000
#define CFG_WATCHDOG_MAGIC_MASK 0xFFFF0000
#define CFG_DSPIC_TEST_MASK 0x00000001
diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h
index 18cedff..20da73e 100644
--- a/include/configs/sbc8641d.h
+++ b/include/configs/sbc8641d.h
@@ -136,7 +136,7 @@
#define CFG_DDR_CS1_CONFIG 0x00000000
#define CFG_DDR_CS2_CONFIG 0x00000000
#define CFG_DDR_CS3_CONFIG 0x00000000
- #define CFG_DDR_EXT_REFRESH 0x00000000
+ #define CFG_DDR_TIMING_3 0x00000000
#define CFG_DDR_TIMING_0 0x00220802
#define CFG_DDR_TIMING_1 0x38377322
#define CFG_DDR_TIMING_2 0x002040c7