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-rw-r--r--include/configs/ep82xxm.h2
-rw-r--r--include/configs/sequoia.h15
2 files changed, 9 insertions, 8 deletions
diff --git a/include/configs/ep82xxm.h b/include/configs/ep82xxm.h
index 5d7bed6..372b10c 100644
--- a/include/configs/ep82xxm.h
+++ b/include/configs/ep82xxm.h
@@ -28,7 +28,7 @@
#define CONFIG_MPC8260
#define CPU_ID_STR "MPC8270"
-#define CONFIG_EP82XXM /* Embedded Planet EP82xxM H 1.0 board /*
+#define CONFIG_EP82XXM /* Embedded Planet EP82xxM H 1.0 board */
/* 256MB SDRAM / 64MB FLASH */
#undef DEBUG
diff --git a/include/configs/sequoia.h b/include/configs/sequoia.h
index f67fd91..3a76315 100644
--- a/include/configs/sequoia.h
+++ b/include/configs/sequoia.h
@@ -134,13 +134,6 @@
#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
#endif
-/*-----------------------------------------------------------------------
- * NAND FLASH
- *----------------------------------------------------------------------*/
-#define CFG_MAX_NAND_DEVICE 1
-#define NAND_MAX_CHIPS 1
-#define CFG_NAND_BASE CFG_NAND_ADDR
-
/*
* IPL (Initial Program Loader, integrated inside CPU)
* Will load first 4k from NAND (SPL) into cache and execute it from there.
@@ -406,6 +399,14 @@
#define CFG_EBC_PB2CR (CFG_CPLD | 0x38000)
/*-----------------------------------------------------------------------
+ * NAND FLASH
+ *----------------------------------------------------------------------*/
+#define CFG_MAX_NAND_DEVICE 1
+#define NAND_MAX_CHIPS 1
+#define CFG_NAND_BASE (CFG_NAND_ADDR + CFG_NAND_CS)
+#define CFG_NAND_SELECT_DEVICE 1 /* nand driver supports mutipl. chips */
+
+/*-----------------------------------------------------------------------
* Cache Configuration
*----------------------------------------------------------------------*/
#define CFG_DCACHE_SIZE (32<<10) /* For AMCC 440 CPUs */