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-rw-r--r--include/configs/MPC8266ADS.h4
-rw-r--r--include/configs/OCOTEA.h62
-rw-r--r--include/configs/TOP860.h2
-rw-r--r--include/configs/gcplus.h4
-rw-r--r--include/configs/integratorap.h51
-rw-r--r--include/configs/integratorcp.h3
-rw-r--r--include/configs/ppmc8260.h4
-rw-r--r--include/configs/sacsng.h4
-rw-r--r--include/configs/sbc8260.h4
-rw-r--r--include/configs/versatile.h13
10 files changed, 77 insertions, 74 deletions
diff --git a/include/configs/MPC8266ADS.h b/include/configs/MPC8266ADS.h
index c62f942..5b2a8a3 100644
--- a/include/configs/MPC8266ADS.h
+++ b/include/configs/MPC8266ADS.h
@@ -175,7 +175,7 @@
#define CONFIG_BOOT_ROOT_INITRD 0 /* Use ram disk for the root file system */
#define CONFIG_BOOT_ROOT_NFS 1 /* Use a NFS mounted root file system */
-#if CONFIG_BOOT_ROOT_INITRD
+#ifdef CONFIG_BOOT_ROOT_INITRD
#define CONFIG_BOOTCOMMAND \
"version;" \
"echo;" \
@@ -185,7 +185,7 @@
"bootm"
#endif /* CONFIG_BOOT_ROOT_INITRD */
-#if CONFIG_BOOT_ROOT_NFS
+#ifdef CONFIG_BOOT_ROOT_NFS
#define CONFIG_BOOTCOMMAND \
"version;" \
"echo;" \
diff --git a/include/configs/OCOTEA.h b/include/configs/OCOTEA.h
index 0b1873e..dea8953 100644
--- a/include/configs/OCOTEA.h
+++ b/include/configs/OCOTEA.h
@@ -21,7 +21,7 @@
*/
/************************************************************************
- * 1 March 2004 Travis B. Sawyer <tsawyer@sandburst.com>
+ * 1 March 2004 Travis B. Sawyer <tsawyer@sandburst.com>
* Adapted to current Das U-Boot source
***********************************************************************/
@@ -37,7 +37,7 @@
* High Level Configuration Options
*----------------------------------------------------------------------*/
#define CONFIG_OCOTEA 1 /* Board is ebony */
-#define CONFIG_440_GX 1 /* Specifc GX support */
+#define CONFIG_440_GX 1 /* Specifc GX support */
#define CONFIG_4xx 1 /* ... PPC4xx family */
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
#undef CFG_DRAM_TEST /* Disable-takes long time! */
@@ -68,8 +68,8 @@
#define CFG_GBL_DATA_SIZE 128 /* num bytes initial data */
#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
-#define CFG_POST_WORD_ADDR (CFG_GBL_DATA_OFFSET - 0x4)
-#define CFG_INIT_SP_OFFSET CFG_POST_WORD_ADDR
+#define CFG_POST_WORD_ADDR (CFG_GBL_DATA_OFFSET - 0x4)
+#define CFG_INIT_SP_OFFSET CFG_POST_WORD_ADDR
#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */
#define CFG_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc*/
@@ -110,8 +110,8 @@
/*-----------------------------------------------------------------------
* DDR SDRAM
*----------------------------------------------------------------------*/
-#define CONFIG_SPD_EEPROM 1 /* Use SPD EEPROM for setup */
-#define SPD_EEPROM_ADDRESS {0x53,0x52} /* SPD i2c spd addresses */
+#define CONFIG_SPD_EEPROM 1 /* Use SPD EEPROM for setup */
+#define SPD_EEPROM_ADDRESS {0x53,0x52} /* SPD i2c spd addresses */
/*-----------------------------------------------------------------------
* I2C
@@ -129,7 +129,7 @@
#define CFG_ENV_IS_IN_NVRAM 1 /* Environment uses NVRAM */
#undef CFG_ENV_IS_IN_FLASH /* ... not in flash */
#undef CFG_ENV_IS_IN_EEPROM /* ... not in EEPROM */
-#define CONFIG_ENV_OVERWRITE 1
+#define CONFIG_ENV_OVERWRITE 1
#define CFG_ENV_SIZE 0x1000 /* Size of Environment vars */
#define CFG_ENV_ADDR \
@@ -146,18 +146,18 @@
#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_NET_MULTI 1
#define CONFIG_PHY_ADDR 1 /* PHY address, See schematics */
-#define CONFIG_PHY1_ADDR 2
-#define CONFIG_PHY2_ADDR 0x10
-#define CONFIG_PHY3_ADDR 0x18
-#define CONFIG_CIS8201_PHY 1 /* Enable 'special' RGMII mode for Cicada phy */
-#define CONFIG_NETMASK 255.255.255.0
-#define CONFIG_IPADDR 10.1.2.3
-#define CONFIG_ETHADDR 00:04:AC:E3:28:8A
-#define CONFIG_ETHADDR1 00:04:AC:E3:28:8B
-#define CONFIG_ETHADDR2 00:04:AC:E3:28:8C
-#define CONFIG_ETHADDR3 00:04:AC:E3:28:8D
-#define CFG_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */
-#define CONFIG_SERVERIP 10.1.2.2
+#define CONFIG_PHY1_ADDR 2
+#define CONFIG_PHY2_ADDR 0x10
+#define CONFIG_PHY3_ADDR 0x18
+#define CONFIG_CIS8201_PHY 1 /* Enable 'special' RGMII mode for Cicada phy */
+#define CONFIG_NETMASK 255.255.255.0
+#define CONFIG_IPADDR 10.1.2.3
+#define CONFIG_ETHADDR 00:04:AC:E3:28:8A
+#define CONFIG_ETHADDR1 00:04:AC:E3:28:8B
+#define CONFIG_ETHADDR2 00:04:AC:E3:28:8C
+#define CONFIG_ETHADDR3 00:04:AC:E3:28:8D
+#define CFG_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */
+#define CONFIG_SERVERIP 10.1.2.2
#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
CFG_CMD_PCI | \
@@ -167,10 +167,10 @@
CFG_CMD_DHCP | \
CFG_CMD_DATE | \
CFG_CMD_BEDBUG | \
- CFG_CMD_PING | \
- CFG_CMD_DIAG | \
- CFG_CMD_MII | \
- CFG_CMD_NET | \
+ CFG_CMD_PING | \
+ CFG_CMD_DIAG | \
+ CFG_CMD_MII | \
+ CFG_CMD_NET | \
CFG_CMD_ELF )
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
@@ -206,17 +206,17 @@
*-----------------------------------------------------------------------
*/
/* General PCI */
-#define CONFIG_PCI /* include pci support */
-#define CONFIG_PCI_PNP /* do pci plug-and-play */
-#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
-#define CFG_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE */
+#define CONFIG_PCI /* include pci support */
+#define CONFIG_PCI_PNP /* do pci plug-and-play */
+#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
+#define CFG_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE */
/* Board-specific PCI */
-#define CFG_PCI_PRE_INIT /* enable board pci_pre_init() */
-#define CFG_PCI_TARGET_INIT /* let board init pci target */
+#define CFG_PCI_PRE_INIT /* enable board pci_pre_init() */
+#define CFG_PCI_TARGET_INIT /* let board init pci target */
-#define CFG_PCI_SUBSYS_VENDORID 0x1014 /* IBM */
-#define CFG_PCI_SUBSYS_DEVICEID 0xcafe /* Whatever */
+#define CFG_PCI_SUBSYS_VENDORID 0x1014 /* IBM */
+#define CFG_PCI_SUBSYS_DEVICEID 0xcafe /* Whatever */
/*
* For booting Linux, the board info and command line data
diff --git a/include/configs/TOP860.h b/include/configs/TOP860.h
index 7b9fdc4..af74f9d 100644
--- a/include/configs/TOP860.h
+++ b/include/configs/TOP860.h
@@ -364,7 +364,7 @@
* 5 0 00000
*/
#define SCCR_MASK 0
-#if CONFIG_EBDF
+#ifdef CONFIG_EBDF
#define CFG_SCCR (SCCR_COM11 | SCCR_TBS | SCCR_EBDF01)
#else
#define CFG_SCCR (SCCR_COM11 | SCCR_TBS)
diff --git a/include/configs/gcplus.h b/include/configs/gcplus.h
index eefb8a6..618b25a 100644
--- a/include/configs/gcplus.h
+++ b/include/configs/gcplus.h
@@ -156,14 +156,14 @@
#define CFG_FLASH_ERASE_TOUT (2*CFG_HZ) /* Timeout for Flash Erase */
#define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */
#else
-/* REVISIT: This doesn't work on ADS GCPlus just yet:
+/* REVISIT: This doesn't work on ADS GCPlus just yet: */
#define CFG_FLASH_CFI 1 /* flash is CFI conformant */
#define CFG_FLASH_CFI_DRIVER 1 /* use common cfi driver */
#define CFG_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */
#define CFG_MAX_FLASH_BANKS 1 /* max # of memory banks */
#define CFG_FLASH_INCREMENT 0 /* there is only one bank */
#define CFG_MAX_FLASH_SECT 128 /* max # of sectors on one chip */
-//#define CFG_FLASH_PROTECTION 1 /* hardware flash protection */
+/*#define CFG_FLASH_PROTECTION 1 /--* hardware flash protection */
#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
#endif
diff --git a/include/configs/integratorap.h b/include/configs/integratorap.h
index e6b5941..1f0792f 100644
--- a/include/configs/integratorap.h
+++ b/include/configs/integratorap.h
@@ -52,6 +52,7 @@
* Size of malloc() pool
*/
#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
+#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
/*
* PL010 Configuration
@@ -63,9 +64,9 @@
#define CFG_SERIAL0 0x16000000
#define CFG_SERIAL1 0x17000000
-//#define CONFIG_COMMANDS (CFG_CMD_DHCP | CFG_CMD_IMI | CFG_CMD_NET | CFG_CMD_PING | CFG_CMD_BDI | CFG_CMD_PCI)
-//#define CONFIG_NET_MULTI
-//#define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT
+/*#define CONFIG_COMMANDS (CFG_CMD_DHCP | CFG_CMD_IMI | CFG_CMD_NET | CFG_CMD_PING | CFG_CMD_BDI | CFG_CMD_PCI) */
+/*#define CONFIG_NET_MULTI */
+/*#define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT */
#define CONFIG_COMMANDS (CFG_CMD_IMI | CFG_CMD_BDI | CFG_CMD_MEMORY)
@@ -74,7 +75,7 @@
#include <cmd_confdefs.h>
#define CONFIG_BOOTDELAY 2
-#define CONFIG_BOOTARGS "root=/dev/mtdblock0 mem=32M console=ttyAM0 console=tty"
+#define CONFIG_BOOTARGS "root=/dev/mtdblock0 mem=32M console=ttyAM0 console=tty"
#define CONFIG_BOOTCOMMAND ""
/*
@@ -129,7 +130,7 @@
* PCI definitions
*/
-//#define CONFIG_PCI /* include pci support */
+/*#define CONFIG_PCI /--* include pci support */
#undef CONFIG_PCI_PNP
#define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */
#define DEBUG
@@ -141,28 +142,28 @@
#define INTEGRATOR_BOOT_ROM_BASE 0x20000000
#define INTEGRATOR_HDR0_SDRAM_BASE 0x80000000
-// PCI Base area
+/* PCI Base area */
#define INTEGRATOR_PCI_BASE 0x40000000
#define INTEGRATOR_PCI_SIZE 0x3FFFFFFF
-// memory map as seen by the CPU on the local bus
-#define CPU_PCI_IO_ADRS 0x60000000 // PCI I/O space base
-#define CPU_PCI_IO_SIZE 0x10000
+/* memory map as seen by the CPU on the local bus */
+#define CPU_PCI_IO_ADRS 0x60000000 /* PCI I/O space base */
+#define CPU_PCI_IO_SIZE 0x10000
-#define CPU_PCI_CNFG_ADRS 0x61000000 // PCI config space
+#define CPU_PCI_CNFG_ADRS 0x61000000 /* PCI config space */
#define CPU_PCI_CNFG_SIZE 0x1000000
-#define PCI_MEM_BASE 0x40000000 // 512M to xxx
-// unused 256M from A0000000-AFFFFFFF might be used for I2O ???
-#define INTEGRATOR_PCI_IO_BASE 0x60000000 // 16M to xxx
-// unused (128-16)M from B1000000-B7FFFFFF
-#define PCI_CONFIG_BASE 0x61000000 // 16M to xxx
-// unused ((128-16)M - 64K) from XXX
+#define PCI_MEM_BASE 0x40000000 /* 512M to xxx */
+/* unused 256M from A0000000-AFFFFFFF might be used for I2O ??? */
+#define INTEGRATOR_PCI_IO_BASE 0x60000000 /* 16M to xxx */
+/* unused (128-16)M from B1000000-B7FFFFFF */
+#define PCI_CONFIG_BASE 0x61000000 /* 16M to xxx */
+/* unused ((128-16)M - 64K) from XXX */
#define PCI_V3_BASE 0x62000000
-// V3 PCI bridge controller
-#define V3_BASE 0x62000000 // V360EPC registers
+/* V3 PCI bridge controller */
+#define V3_BASE 0x62000000 /* V360EPC registers */
#define PCI_ENET0_IOADDR (CPU_PCI_IO_ADRS)
#define PCI_ENET0_MEMADDR (PCI_MEM_BASE)
@@ -221,16 +222,16 @@
#define V3_MAIL_RD_STAT 0x000000DA
#define V3_QBA_MAP 0x000000DC
-// SYSTEM register bits
+/* SYSTEM register bits */
#define V3_SYSTEM_M_RST_OUT (1 << 15)
#define V3_SYSTEM_M_LOCK (1 << 14)
-// PCI_CFG bits
+/* PCI_CFG bits */
#define V3_PCI_CFG_M_RETRY_EN (1 << 10)
#define V3_PCI_CFG_M_AD_LOW1 (1 << 9)
#define V3_PCI_CFG_M_AD_LOW0 (1 << 8)
-// PCI MAP register bits (PCI -> Local bus)
+/* PCI MAP register bits (PCI -> Local bus) */
#define V3_PCI_MAP_M_MAP_ADR 0xFFF00000
#define V3_PCI_MAP_M_RD_POST_INH (1 << 15)
#define V3_PCI_MAP_M_ROM_SIZE (1 << 11 | 1 << 10)
@@ -239,20 +240,20 @@
#define V3_PCI_MAP_M_REG_EN (1 << 1)
#define V3_PCI_MAP_M_ENABLE (1 << 0)
-// 9 => 512M window size
+/* 9 => 512M window size */
#define V3_PCI_MAP_M_ADR_SIZE_512M 0x00000090
-// A => 1024M window size
+/* A => 1024M window size */
#define V3_PCI_MAP_M_ADR_SIZE_1024M 0x000000A0
-// LB_BASE register bits (Local bus -> PCI)
+/* LB_BASE register bits (Local bus -> PCI) */
#define V3_LB_BASE_M_MAP_ADR 0xFFF00000
#define V3_LB_BASE_M_SWAP (1 << 8 | 1 << 9)
#define V3_LB_BASE_M_ADR_SIZE 0x000000F0
#define V3_LB_BASE_M_PREFETCH (1 << 3)
#define V3_LB_BASE_M_ENABLE (1 << 0)
-// PCI COMMAND REGISTER bits
+/* PCI COMMAND REGISTER bits */
#define V3_COMMAND_M_FBB_EN (1 << 9)
#define V3_COMMAND_M_SERR_EN (1 << 8)
#define V3_COMMAND_M_PAR_EN (1 << 6)
diff --git a/include/configs/integratorcp.h b/include/configs/integratorcp.h
index 3fcb8af..eb814e7 100644
--- a/include/configs/integratorcp.h
+++ b/include/configs/integratorcp.h
@@ -52,6 +52,7 @@
* Size of malloc() pool
*/
#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
+#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
/*
* Hardware drivers
@@ -78,7 +79,7 @@
#include <cmd_confdefs.h>
#define CONFIG_BOOTDELAY 2
-#define CONFIG_BOOTARGS "root=/dev/nfs mem=128M ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0"
+#define CONFIG_BOOTARGS "root=/dev/nfs mem=128M ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0"
#define CONFIG_BOOTCOMMAND "bootp ; bootm"
/*
diff --git a/include/configs/ppmc8260.h b/include/configs/ppmc8260.h
index 8fc7c30..38aaf19 100644
--- a/include/configs/ppmc8260.h
+++ b/include/configs/ppmc8260.h
@@ -241,7 +241,7 @@
#define CONFIG_BOOT_ROOT_INITRD 0 /* Use ram disk for the root file system */
#define CONFIG_BOOT_ROOT_NFS 1 /* Use a NFS mounted root file system */
-#if CONFIG_BOOT_ROOT_INITRD
+#ifdef CONFIG_BOOT_ROOT_INITRD
#define CONFIG_BOOTCOMMAND \
"version;" \
"echo;" \
@@ -251,7 +251,7 @@
"bootm"
#endif /* CONFIG_BOOT_ROOT_INITRD */
-#if CONFIG_BOOT_ROOT_NFS
+#ifdef CONFIG_BOOT_ROOT_NFS
#define CONFIG_BOOTCOMMAND \
"version;" \
"echo;" \
diff --git a/include/configs/sacsng.h b/include/configs/sacsng.h
index 4411a11..0e6be34 100644
--- a/include/configs/sacsng.h
+++ b/include/configs/sacsng.h
@@ -446,7 +446,7 @@
#define CONFIG_BOOT_ROOT_INITRD 0 /* Use ram disk for the root file system */
#define CONFIG_BOOT_ROOT_NFS 1 /* Use a NFS mounted root file system */
-#if CONFIG_BOOT_ROOT_INITRD
+#ifdef CONFIG_BOOT_ROOT_INITRD
#define CONFIG_BOOTCOMMAND \
"version;" \
"echo;" \
@@ -457,7 +457,7 @@
"bootm"
#endif /* CONFIG_BOOT_ROOT_INITRD */
-#if CONFIG_BOOT_ROOT_NFS
+#ifdef CONFIG_BOOT_ROOT_NFS
#define CONFIG_BOOTCOMMAND \
"version;" \
"echo;" \
diff --git a/include/configs/sbc8260.h b/include/configs/sbc8260.h
index ef96e72..2414093 100644
--- a/include/configs/sbc8260.h
+++ b/include/configs/sbc8260.h
@@ -392,7 +392,7 @@
#define CONFIG_BOOT_ROOT_INITRD 0 /* Use ram disk for the root file system */
#define CONFIG_BOOT_ROOT_NFS 1 /* Use a NFS mounted root file system */
-#if CONFIG_BOOT_ROOT_INITRD
+#ifdef CONFIG_BOOT_ROOT_INITRD
#define CONFIG_BOOTCOMMAND \
"version;" \
"echo;" \
@@ -402,7 +402,7 @@
"bootm"
#endif /* CONFIG_BOOT_ROOT_INITRD */
-#if CONFIG_BOOT_ROOT_NFS
+#ifdef CONFIG_BOOT_ROOT_NFS
#define CONFIG_BOOTCOMMAND \
"version;" \
"echo;" \
diff --git a/include/configs/versatile.h b/include/configs/versatile.h
index 58ed25b..5391439 100644
--- a/include/configs/versatile.h
+++ b/include/configs/versatile.h
@@ -72,6 +72,7 @@
* Size of malloc() pool
*/
#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
+#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
/*
* Hardware drivers
@@ -94,7 +95,7 @@
#define CONFIG_COMMANDS (CFG_CMD_DHCP | CFG_CMD_IMI | CFG_CMD_NET | CFG_CMD_PING | CFG_CMD_BDI | CFG_CMD_MEMORY)
-//#define CONFIG_COMMANDS (CFG_CMD_IMI | CFG_CMD_BDI | CFG_CMD_MEMORY)
+/*#define CONFIG_COMMANDS (CFG_CMD_IMI | CFG_CMD_BDI | CFG_CMD_MEMORY) */
#define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT
@@ -102,15 +103,15 @@
#include <cmd_confdefs.h>
#define CONFIG_BOOTDELAY 2
-#define CONFIG_BOOTARGS "root=/dev/nfs mem=128M ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0"
-//#define CONFIG_BOOTCOMMAND "bootp ; bootm"
+#define CONFIG_BOOTARGS "root=/dev/nfs mem=128M ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0"
+/*#define CONFIG_BOOTCOMMAND "bootp ; bootm" */
/*
* Static configuration when assigning fixed address
*/
-//#define CONFIG_NETMASK 255.255.255.0 /* talk on MY local net */
-//#define CONFIG_IPADDR xx.xx.xx.xx /* static IP I currently own */
-//#define CONFIG_SERVERIP xx.xx.xx.xx /* current IP of my dev pc */
+/*#define CONFIG_NETMASK 255.255.255.0 /--* talk on MY local net */
+/*#define CONFIG_IPADDR xx.xx.xx.xx /--* static IP I currently own */
+/*#define CONFIG_SERVERIP xx.xx.xx.xx /--* current IP of my dev pc */
#define CONFIG_BOOTFILE "/tftpboot/uImage" /* file to load */
generated by cgit v1.1 at 2024-11-24 09:23:57 +0000