diff options
Diffstat (limited to 'include/configs')
144 files changed, 2010 insertions, 866 deletions
diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index 2c3c4ac..7d9619e 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -13,7 +13,6 @@ * B4860 QDS board configuration file */ #define CONFIG_B4860QDS -#define CONFIG_PHYS_64BIT #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/b4860qds/b4_pbi.cfg @@ -830,7 +829,7 @@ unsigned long get_board_ddr_clk(void); "consoledev=ttyS0\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=b4860qds/ramdisk.uboot\0" \ - "fdtaddr=c00000\0" \ + "fdtaddr=1e00000\0" \ "fdtfile=b4860qds/b4860qds.dtb\0" \ "bdev=sda3\0" @@ -868,7 +867,7 @@ unsigned long get_board_ddr_clk(void); "setenv bootargs root=/dev/ram rw " \ "console=$consoledev,$baudrate $othbootargs;" \ "setenv ramdiskaddr 0x02000000;" \ - "setenv fdtaddr 0x00c00000;" \ + "setenv fdtaddr 0x01e00000;" \ "setenv loadaddr 0x1000000;" \ "bootm $loadaddr $ramdiskaddr $fdtaddr" diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h index 0a9d8a6..f2a7c69 100644 --- a/include/configs/BSC9131RDB.h +++ b/include/configs/BSC9131RDB.h @@ -403,7 +403,7 @@ extern unsigned long get_sdram_size(void); "consoledev=ttyS0\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=rootfs.ext2.gz.uboot\0" \ - "fdtaddr=c00000\0" \ + "fdtaddr=1e00000\0" \ "fdtfile=bsc9131rdb.dtb\0" \ "bdev=sda1\0" \ "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0" \ diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h index 756beec..4744f08 100644 --- a/include/configs/BSC9132QDS.h +++ b/include/configs/BSC9132QDS.h @@ -647,7 +647,7 @@ combinations. this should be removed later "consoledev=ttyS0\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=rootfs.ext2.gz.uboot\0" \ - "fdtaddr=c00000\0" \ + "fdtaddr=1e00000\0" \ "fdtfile=bsc9132qds.dtb\0" \ "bdev=sda1\0" \ CONFIG_DEF_HWCONFIG\ diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h index 69a9798..f75919d 100644 --- a/include/configs/C29XPCIE.h +++ b/include/configs/C29XPCIE.h @@ -11,7 +11,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_PHYS_64BIT #define CONFIG_DISPLAY_BOARDINFO #ifdef CONFIG_C29XPCIE @@ -530,7 +529,7 @@ "consoledev=ttyS0\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=rootfs.ext2.gz.uboot\0" \ - "fdtaddr=c00000\0" \ + "fdtaddr=1e00000\0" \ "fdtfile=name/of/device-tree.dtb\0" \ "othbootargs=ramdisk_size=600000\0" \ diff --git a/include/configs/MPC8308RDB.h b/include/configs/MPC8308RDB.h index 578325c..5b80464 100644 --- a/include/configs/MPC8308RDB.h +++ b/include/configs/MPC8308RDB.h @@ -203,7 +203,7 @@ */ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ -#define CONFIG_SYS_MONITOR_LEN (384 * 1024) /* Reserve 384 kB for Mon */ +#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Mon */ #define CONFIG_SYS_MALLOC_LEN (512 * 1024) /* Reserved for malloc */ /* @@ -452,6 +452,7 @@ * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* Initial Memory map for Linux */ +#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ /* * Core HID Setup diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index 5613a4a..1c4e082 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -241,7 +241,7 @@ #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET /* CONFIG_SYS_MONITOR_LEN must be a multiple of CONFIG_ENV_SECT_SIZE */ -#define CONFIG_SYS_MONITOR_LEN (384 * 1024) /* Reserve 384 kB for Mon */ +#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Mon */ #define CONFIG_SYS_MALLOC_LEN (512 * 1024) /* Reserved for malloc */ /* @@ -268,7 +268,7 @@ #define CONFIG_CMD_MTDPARTS #define MTDIDS_DEFAULT "nand0=e2800000.flash" #define MTDPARTS_DEFAULT \ - "mtdparts=e2800000.flash:512k(uboot),128k(env),3m@1m(kernel),-(fs)" + "mtdparts=e2800000.flash:512k(uboot),128k(env),6m@1m(kernel),-(fs)" #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_CMD_NAND 1 @@ -502,6 +502,7 @@ */ /* Initial Memory map for Linux*/ #define CONFIG_SYS_BOOTMAPSZ (256 << 20) +#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ #define CONFIG_SYS_RCWH_PCIHOST 0x80000000 /* PCIHOST */ diff --git a/include/configs/MPC8315ERDB.h b/include/configs/MPC8315ERDB.h index 7ce5f59..23a2e34 100644 --- a/include/configs/MPC8315ERDB.h +++ b/include/configs/MPC8315ERDB.h @@ -169,7 +169,7 @@ /* * The reserved memory */ -#define CONFIG_SYS_MONITOR_LEN (384 * 1024) /* Reserve 384 kB for Mon */ +#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Mon */ #define CONFIG_SYS_MALLOC_LEN (512 * 1024) /* Reserved for malloc */ /* @@ -241,7 +241,7 @@ #define CONFIG_CMD_MTDPARTS #define MTDIDS_DEFAULT "nand0=e0600000.flash" #define MTDPARTS_DEFAULT \ - "mtdparts=e0600000.flash:512k(uboot),128k(env),3m@1m(kernel),-(fs)" + "mtdparts=e0600000.flash:512k(uboot),128k(env),6m@1m(kernel),-(fs)" #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_CMD_NAND 1 @@ -489,6 +489,7 @@ * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* Initial Memory map for Linux */ +#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ /* * Core HID Setup diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h index 13f954d..095c0d8 100644 --- a/include/configs/MPC8323ERDB.h +++ b/include/configs/MPC8323ERDB.h @@ -156,7 +156,7 @@ #endif /* CONFIG_SYS_MONITOR_LEN must be a multiple of CONFIG_ENV_SECT_SIZE */ -#define CONFIG_SYS_MONITOR_LEN (384 * 1024) /* Reserve 384 kB for Mon */ +#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Mon */ #define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Reserved for malloc */ /* @@ -359,6 +359,7 @@ */ /* Initial Memory map for Linux */ #define CONFIG_SYS_BOOTMAPSZ (256 << 20) +#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ /* * Core HID Setup diff --git a/include/configs/MPC832XEMDS.h b/include/configs/MPC832XEMDS.h index fd48260..18418e3 100644 --- a/include/configs/MPC832XEMDS.h +++ b/include/configs/MPC832XEMDS.h @@ -168,7 +168,7 @@ #endif /* CONFIG_SYS_MONITOR_LEN must be a multiple of CONFIG_ENV_SECT_SIZE */ -#define CONFIG_SYS_MONITOR_LEN (384 * 1024) /* Reserve 384 kB for Mon */ +#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Mon */ #define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Reserved for malloc */ /* @@ -441,6 +441,7 @@ */ /* Initial Memory map for Linux */ #define CONFIG_SYS_BOOTMAPSZ (256 << 20) +#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ /* * Core HID Setup diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h index 288b126..a2fa783 100644 --- a/include/configs/MPC8349EMDS.h +++ b/include/configs/MPC8349EMDS.h @@ -225,7 +225,7 @@ (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_LEN (384 * 1024) /* Reserve 384 kB for Mon */ +#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Mon */ #define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Reserved for malloc */ /* @@ -508,6 +508,7 @@ */ /* Initial Memory map for Linux*/ #define CONFIG_SYS_BOOTMAPSZ (256 << 20) +#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ #define CONFIG_SYS_RCWH_PCIHOST 0x80000000 /* PCIHOST */ diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h index 2721255..c11c0cf 100644 --- a/include/configs/MPC8349ITX.h +++ b/include/configs/MPC8349ITX.h @@ -330,7 +330,7 @@ boards, we say we have two, but don't display a message if we find only one. */ #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET /* CONFIG_SYS_MONITOR_LEN must be a multiple of CONFIG_ENV_SECT_SIZE */ -#define CONFIG_SYS_MONITOR_LEN (384 * 1024) /* Reserve 384 kB for Mon */ +#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Mon */ #define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Reserved for malloc */ /* @@ -544,6 +544,7 @@ boards, we say we have two, but don't display a message if we find only one. */ */ /* Initial Memory map for Linux*/ #define CONFIG_SYS_BOOTMAPSZ (256 << 20) +#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ #define CONFIG_SYS_HRCW_LOW (\ HRCWL_LCL_BUS_TO_SCB_CLK_1X1 |\ diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h index 921d5f3..b2dc189 100644 --- a/include/configs/MPC837XEMDS.h +++ b/include/configs/MPC837XEMDS.h @@ -200,7 +200,7 @@ #endif /* CONFIG_SYS_MONITOR_LEN must be a multiple of CONFIG_ENV_SECT_SIZE */ -#define CONFIG_SYS_MONITOR_LEN (384 * 1024) /* Reserve 384 kB for Mon */ +#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Mon */ #define CONFIG_SYS_MALLOC_LEN (512 * 1024) /* Reserved for malloc */ /* @@ -522,6 +522,7 @@ extern int board_pci_host_broken(void); * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* Initial Memory map for Linux */ +#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ /* * Core HID Setup diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index bb06e89..8eb87eb 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -225,7 +225,7 @@ #undef CONFIG_SYS_RAMBOOT #endif -#define CONFIG_SYS_MONITOR_LEN (384 * 1024) /* Reserve 384 kB for Mon */ +#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Mon */ #define CONFIG_SYS_MALLOC_LEN (512 * 1024) /* Reserved for malloc */ /* @@ -533,6 +533,7 @@ * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* Initial Memory map for Linux */ +#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ /* * Core HID Setup diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index 7c19ff8..b536f67 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -14,10 +14,6 @@ #define CONFIG_DISPLAY_BOARDINFO #include "../board/freescale/common/ics307_clk.h" -#ifdef CONFIG_36BIT -#define CONFIG_PHYS_64BIT 1 -#endif - #ifdef CONFIG_SDCARD #define CONFIG_RAMBOOT_SDCARD 1 #define CONFIG_SYS_TEXT_BASE 0xf8f40000 @@ -727,7 +723,7 @@ "consoledev=ttyS0\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=8536ds/ramdisk.uboot\0" \ -"fdtaddr=c00000\0" \ +"fdtaddr=1e00000\0" \ "fdtfile=8536ds/mpc8536ds.dtb\0" \ "bdev=sda3\0" \ "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0" diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index b9d97c1..cd10432 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -209,7 +209,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_I2C_FSL #define CONFIG_SYS_FSL_I2C_SPEED 400000 #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F -#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3100 #define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} } #define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 @@ -462,7 +462,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); "consoledev=ttyS0\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=8544ds/ramdisk.uboot\0" \ -"fdtaddr=c00000\0" \ +"fdtaddr=1e00000\0" \ "fdtfile=8544ds/mpc8544ds.dtb\0" \ "bdev=sda3\0" diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index e73be48..789c62b 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -15,10 +15,6 @@ #define CONFIG_DISPLAY_BOARDINFO -#ifdef CONFIG_36BIT -#define CONFIG_PHYS_64BIT -#endif - /* High Level Configuration Options */ #define CONFIG_BOOKE 1 /* BOOKE */ #define CONFIG_E500 1 /* BOOKE e500 family */ @@ -562,7 +558,7 @@ extern unsigned long get_clock_freq(void); "consoledev=ttyS1\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=ramdisk.uboot\0" \ - "fdtaddr=c00000\0" \ + "fdtaddr=1e00000\0" \ "fdtfile=mpc8548cds.dtb\0" #define CONFIG_NFSBOOTCOMMAND \ diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index 2e6989f..26cf8d6 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -15,10 +15,6 @@ #include "../board/freescale/common/ics307_clk.h" -#ifdef CONFIG_36BIT -#define CONFIG_PHYS_64BIT -#endif - #ifndef CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_TEXT_BASE 0xeff40000 #endif @@ -668,7 +664,7 @@ "consoledev=ttyS0\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=8572ds/ramdisk.uboot\0" \ -"fdtaddr=c00000\0" \ +"fdtaddr=1e00000\0" \ "fdtfile=8572ds/mpc8572ds.dtb\0" \ "bdev=sda3\0" diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index 8159493..c1b9b6e 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -477,7 +477,8 @@ * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/ +#define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* Initial Memory map for Linux*/ +#define CONFIG_SYS_BOOTM_LEN (256 << 20) /* Increase max gunzip size */ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ @@ -498,7 +499,7 @@ #define CONFIG_NETMASK 255.255.255.0 /* default location for tftp and bootm */ -#define CONFIG_LOADADDR 1000000 +#define CONFIG_LOADADDR 0x10000000 #undef CONFIG_BOOTARGS /* the boot command will set bootargs */ @@ -566,9 +567,9 @@ "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE) \ " $filesize\0" \ "consoledev=ttyS0\0" \ -"ramdiskaddr=2000000\0" \ +"ramdiskaddr=0x18000000\0" \ "ramdiskfile=8610hpcd/ramdisk.uboot\0" \ -"fdtaddr=c00000\0" \ +"fdtaddr=0x17c00000\0" \ "fdtfile=8610hpcd/mpc8610_hpcd.dtb\0" \ "bdev=sda3\0" \ "en-wd=mw.b f8100010 0x08; echo -expect:- 08; md.b f8100010 1\0" \ @@ -604,9 +605,9 @@ "netdev=eth0\0" \ "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ "consoledev=ttyS0\0" \ - "ramdiskaddr=2000000\0" \ + "ramdiskaddr=0x18000000\0" \ "ramdiskfile=8610hpcd/ramdisk.uboot\0" \ - "fdtaddr=c00000\0" \ + "fdtaddr=0x17c00000\0" \ "fdtfile=8610hpcd/mpc8610_hpcd.dtb\0" \ "bdev=sda3\0" #endif diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index f90f7f2..1885124 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -23,7 +23,6 @@ #define CONFIG_MPC8641HPCN 1 /* MPC8641HPCN board specific */ #define CONFIG_MP 1 /* support multiple processors */ #define CONFIG_LINUX_RESET_VEC 0x100 /* Reset vector used by Linux */ -/*#define CONFIG_PHYS_64BIT 1*/ /* Place devices in 36-bit space */ #define CONFIG_ADDR_MAP 1 /* Use addr map */ /* @@ -637,7 +636,8 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/ +#define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* Initial Memory map for Linux*/ +#define CONFIG_SYS_BOOTM_LEN (256 << 20) /* Increase max gunzip size */ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ @@ -664,7 +664,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_NETMASK 255.255.255.0 /* default location for tftp and bootm */ -#define CONFIG_LOADADDR 1000000 +#define CONFIG_LOADADDR 0x10000000 #undef CONFIG_BOOTARGS /* the boot command will set bootargs */ @@ -685,9 +685,9 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE) \ " $filesize\0" \ "consoledev=ttyS0\0" \ - "ramdiskaddr=2000000\0" \ + "ramdiskaddr=0x18000000\0" \ "ramdiskfile=your.ramdisk.u-boot\0" \ - "fdtaddr=c00000\0" \ + "fdtaddr=0x17c00000\0" \ "fdtfile=mpc8641_hpcn.dtb\0" \ "en-wd=mw.b ffdf0010 0x08; echo -expect:- 08; md.b ffdf0010 1\0" \ "dis-wd=mw.b ffdf0010 0x00; echo -expect:- 00; md.b ffdf0010 1\0" \ diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 5384584..5ab6602 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -11,9 +11,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#ifdef CONFIG_36BIT -#define CONFIG_PHYS_64BIT -#endif #define CONFIG_DISPLAY_BOARDINFO #define CONFIG_P1010 @@ -862,7 +859,7 @@ extern unsigned long get_sdram_size(void); "consoledev=ttyS0\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=rootfs.ext2.gz.uboot\0" \ - "fdtaddr=c00000\0" \ + "fdtaddr=1e00000\0" \ "fdtfile=p1010rdb.dtb\0" \ "bdev=sda1\0" \ "hwconfig=usb1:dr_mode=host,phy_type=utmi\0" \ diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index bdf0323..5d572b4 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -13,10 +13,6 @@ #define CONFIG_DISPLAY_BOARDINFO -#ifdef CONFIG_36BIT -#define CONFIG_PHYS_64BIT -#endif - #ifdef CONFIG_SDCARD #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT #define CONFIG_SPL_ENV_SUPPORT @@ -731,7 +727,7 @@ "consoledev=ttyS0\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=rootfs.ext2.gz.uboot\0" \ - "fdtaddr=c00000\0" \ + "fdtaddr=1e00000\0" \ "fdtfile=p1022ds.dtb\0" \ "bdev=sda3\0" \ "hwconfig=esdhc;audclk:12\0" diff --git a/include/configs/P1023RDB.h b/include/configs/P1023RDB.h index 07a594d..d044c7b 100644 --- a/include/configs/P1023RDB.h +++ b/include/configs/P1023RDB.h @@ -375,7 +375,7 @@ extern unsigned long get_clock_freq(void); "consoledev=ttyS0\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=rootfs.ext2.gz.uboot\0" \ - "fdtaddr=c00000\0" \ + "fdtaddr=1e00000\0" \ "fdtfile=p1023rdb.dtb\0" \ "othbootargs=ramdisk_size=600000\0" \ "bdev=sda1\0" \ diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 24e5431..e6057f9 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -12,7 +12,6 @@ #define __CONFIG_H #define CONFIG_P2041RDB -#define CONFIG_PHYS_64BIT #define CONFIG_DISPLAY_BOARDINFO #define CONFIG_PPC_P2041 @@ -698,7 +697,7 @@ unsigned long get_board_sys_clk(unsigned long dummy); "usb_dr_mode=host\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=p2041rdb/ramdisk.uboot\0" \ - "fdtaddr=c00000\0" \ + "fdtaddr=1e00000\0" \ "fdtfile=p2041rdb/p2041rdb.dtb\0" \ "bdev=sda3\0" diff --git a/include/configs/P3041DS.h b/include/configs/P3041DS.h index e05dd75..c901fe2 100644 --- a/include/configs/P3041DS.h +++ b/include/configs/P3041DS.h @@ -9,7 +9,6 @@ * */ #define CONFIG_P3041DS -#define CONFIG_PHYS_64BIT #define CONFIG_PPC_P3041 #define CONFIG_FSL_NGPIXIS /* use common ngPIXIS code */ diff --git a/include/configs/P4080DS.h b/include/configs/P4080DS.h index 2f89008..0d44c00 100644 --- a/include/configs/P4080DS.h +++ b/include/configs/P4080DS.h @@ -9,7 +9,6 @@ * Also supports P4040 DS */ #define CONFIG_P4080DS -#define CONFIG_PHYS_64BIT #define CONFIG_PPC_P4080 #define CONFIG_FSL_NGPIXIS /* use common ngPIXIS code */ diff --git a/include/configs/P5020DS.h b/include/configs/P5020DS.h index 588df80..d2cedfe 100644 --- a/include/configs/P5020DS.h +++ b/include/configs/P5020DS.h @@ -9,7 +9,6 @@ * Also supports P5010 DS */ #define CONFIG_P5020DS -#define CONFIG_PHYS_64BIT #define CONFIG_PPC_P5020 #define CONFIG_FSL_NGPIXIS /* use common ngPIXIS code */ diff --git a/include/configs/P5040DS.h b/include/configs/P5040DS.h index e4a031a..dc82721 100644 --- a/include/configs/P5040DS.h +++ b/include/configs/P5040DS.h @@ -9,7 +9,6 @@ * */ #define CONFIG_P5040DS -#define CONFIG_PHYS_64BIT #define CONFIG_PPC_P5040 #define CONFIG_FSL_NGPIXIS /* use common ngPIXIS code */ diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h index b151963..2f18f52 100644 --- a/include/configs/T102xQDS.h +++ b/include/configs/T102xQDS.h @@ -18,7 +18,6 @@ #define CONFIG_E500MC /* BOOKE e500mc family */ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ #define CONFIG_MP /* support multiple processors */ -#define CONFIG_PHYS_64BIT #define CONFIG_ENABLE_36BIT_PHYS #ifdef CONFIG_PHYS_64BIT diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 06d1d0f..8029ca8 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -18,7 +18,6 @@ #define CONFIG_E500MC /* BOOKE e500mc family */ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ #define CONFIG_MP /* support multiple processors */ -#define CONFIG_PHYS_64BIT #define CONFIG_ENABLE_36BIT_PHYS #ifdef CONFIG_PHYS_64BIT @@ -897,7 +896,7 @@ unsigned long get_board_ddr_clk(void); "cmp.b $loadaddr $ubootaddr $filesize\0" \ "consoledev=ttyS0\0" \ "ramdiskaddr=2000000\0" \ - "fdtaddr=c00000\0" \ + "fdtaddr=1e00000\0" \ "bdev=sda3\0" #define CONFIG_LINUX \ diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index 9f5063c..b8c6e89 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -27,7 +27,6 @@ * T1040 QDS board configuration file */ #define CONFIG_T1040QDS -#define CONFIG_PHYS_64BIT #define CONFIG_DISPLAY_BOARDINFO #ifdef CONFIG_RAMBOOT_PBL @@ -770,7 +769,7 @@ unsigned long get_board_ddr_clk(void); "consoledev=ttyS0\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=t1040qds/ramdisk.uboot\0" \ - "fdtaddr=c00000\0" \ + "fdtaddr=1e00000\0" \ "fdtfile=t1040qds/t1040qds.dtb\0" \ "bdev=sda3\0" diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index a8f4f74..e583def 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -11,14 +11,20 @@ * T104x RDB board configuration file */ #define CONFIG_T104xRDB -#define CONFIG_PHYS_64BIT #define CONFIG_DISPLAY_BOARDINFO #define CONFIG_E500 /* BOOKE e500 family */ #include <asm/config_mpc85xx.h> #ifdef CONFIG_RAMBOOT_PBL + +#ifndef CONFIG_SECURE_BOOT #define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/t104xrdb/t104x_pbi.cfg +#else +#define CONFIG_SYS_FSL_PBL_PBI \ + $(SRCTREE)/board/freescale/t104xrdb/t104x_pbi_sb.cfg +#endif + #ifdef CONFIG_T1040RDB #define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t104xrdb/t1040_rcw.cfg #endif @@ -62,7 +68,17 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg #ifdef CONFIG_NAND #define CONFIG_SPL_NAND_SUPPORT +#ifdef CONFIG_SECURE_BOOT +#define CONFIG_U_BOOT_HDR_SIZE (16 << 10) +/* + * HDR would be appended at end of image and copied to DDR along + * with U-Boot image. + */ +#define CONFIG_SYS_NAND_U_BOOT_SIZE ((768 << 10) + \ + CONFIG_U_BOOT_HDR_SIZE) +#else #define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10) +#endif #define CONFIG_SYS_NAND_U_BOOT_DST 0x30000000 #define CONFIG_SYS_NAND_U_BOOT_START 0x30000000 #define CONFIG_SYS_NAND_U_BOOT_OFFS (256 << 10) @@ -161,6 +177,10 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg #define CONFIG_ENV_SIZE 0x2000 #define CONFIG_ENV_OFFSET (512 * 0x800) #elif defined(CONFIG_NAND) +#ifdef CONFIG_SECURE_BOOT +#define CONFIG_RAMBOOT_NAND +#define CONFIG_BOOTSCRIPT_COPY_RAM +#endif #define CONFIG_SYS_EXTRA_ENV_RELOC #define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_SIZE 0x2000 @@ -202,8 +222,14 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg * Config the L3 Cache as L3 SRAM */ #define CONFIG_SYS_INIT_L3_ADDR 0xFFFC0000 +/* + * For Secure Boot CONFIG_SYS_INIT_L3_ADDR will be redefined and hence + * Physical address (CONFIG_SYS_INIT_L3_ADDR) and virtual address + * (CONFIG_SYS_INIT_L3_VADDR) will be different. + */ +#define CONFIG_SYS_INIT_L3_VADDR 0xFFFC0000 #define CONFIG_SYS_L3_SIZE 256 << 10 -#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L3_ADDR + 32 * 1024) +#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L3_VADDR + 32 * 1024) #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_ENV_ADDR (CONFIG_SPL_GD_ADDR + 4 * 1024) #endif @@ -873,7 +899,7 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg "consoledev=ttyS0\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=" __stringify(RAMDISKFILE) "\0" \ - "fdtaddr=c00000\0" \ + "fdtaddr=1e00000\0" \ "fdtfile=" __stringify(FDTFILE) "\0" \ "bdev=sda3\0" diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 1f07a83..3f28549 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -26,7 +26,6 @@ #endif /* High Level Configuration Options */ -#define CONFIG_PHYS_64BIT #define CONFIG_BOOKE #define CONFIG_E500 /* BOOKE e500 family */ #define CONFIG_E500MC /* BOOKE e500mc family */ @@ -840,7 +839,7 @@ unsigned long get_board_ddr_clk(void); "consoledev=ttyS0\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=t2080qds/ramdisk.uboot\0" \ - "fdtaddr=c00000\0" \ + "fdtaddr=1e00000\0" \ "fdtfile=t2080qds/t2080qds.dtb\0" \ "bdev=sda3\0" diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 0ded41e..37d16ae 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -19,7 +19,6 @@ #define CONFIG_FSL_SATA_V2 /* High Level Configuration Options */ -#define CONFIG_PHYS_64BIT #define CONFIG_BOOKE #define CONFIG_E500 /* BOOKE e500 family */ #define CONFIG_E500MC /* BOOKE e500mc family */ @@ -792,7 +791,7 @@ unsigned long get_board_ddr_clk(void); "consoledev=ttyS0\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=t2080rdb/ramdisk.uboot\0" \ - "fdtaddr=c00000\0" \ + "fdtaddr=1e00000\0" \ "fdtfile=t2080rdb/t2080rdb.dtb\0" \ "bdev=sda3\0" diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h index f075dfb..8fffffe 100644 --- a/include/configs/T4240QDS.h +++ b/include/configs/T4240QDS.h @@ -11,7 +11,6 @@ #define __CONFIG_H #define CONFIG_T4240QDS -#define CONFIG_PHYS_64BIT #define CONFIG_FSL_SATA_V2 #define CONFIG_PCIE4 @@ -577,7 +576,7 @@ unsigned long get_board_ddr_clk(void); "consoledev=ttyS0\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=t4240qds/ramdisk.uboot\0" \ - "fdtaddr=c00000\0" \ + "fdtaddr=1e00000\0" \ "fdtfile=t4240qds/t4240qds.dtb\0" \ "bdev=sda3\0" diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 9ba69a1..15b8219 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -11,7 +11,6 @@ #define __CONFIG_H #define CONFIG_T4240RDB -#define CONFIG_PHYS_64BIT #define CONFIG_DISPLAY_BOARDINFO #define CONFIG_FSL_SATA_V2 @@ -770,7 +769,7 @@ unsigned long get_board_ddr_clk(void); "consoledev=ttyS0\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=t4240rdb/ramdisk.uboot\0" \ - "fdtaddr=c00000\0" \ + "fdtaddr=1e00000\0" \ "fdtfile=t4240rdb/t4240rdb.dtb\0" \ "bdev=sda3\0" diff --git a/include/configs/a3m071.h b/include/configs/a3m071.h index 8f17dd1..ab2477c 100644 --- a/include/configs/a3m071.h +++ b/include/configs/a3m071.h @@ -334,6 +334,7 @@ #define CONFIG_SYS_OS_BASE 0xfc200000 #define CONFIG_SYS_FDT_BASE 0xfc1e0000 +#define CONFIG_SYS_FDT_SIZE (16<<10) #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index 361704b..0467953 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -98,7 +98,6 @@ #if defined(CONFIG_SPL_USB_HOST_SUPPORT) || !defined(CONFIG_SPL_BUILD) #define CONFIG_SYS_USB_FAT_BOOT_PARTITION 1 -#define CONFIG_USB_HOST #define CONFIG_USB_XHCI_OMAP #define CONFIG_USB_STORAGE #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 diff --git a/include/configs/am57xx_evm.h b/include/configs/am57xx_evm.h index 2db199d..46e8d4c 100644 --- a/include/configs/am57xx_evm.h +++ b/include/configs/am57xx_evm.h @@ -63,7 +63,6 @@ #define CONFIG_SUPPORT_EMMC_BOOT /* USB xHCI HOST */ -#define CONFIG_USB_HOST #define CONFIG_USB_XHCI_OMAP #define CONFIG_USB_STORAGE #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 @@ -86,4 +85,40 @@ #define CONFIG_EEPROM_CHIP_ADDRESS 0x50 #define CONFIG_EEPROM_BUS_ADDRESS 0 +/* + * Default to using SPI for environment, etc. + * 0x000000 - 0x040000 : QSPI.SPL (256KiB) + * 0x040000 - 0x140000 : QSPI.u-boot (1MiB) + * 0x140000 - 0x1C0000 : QSPI.u-boot-spl-os (512KiB) + * 0x1C0000 - 0x1D0000 : QSPI.u-boot-env (64KiB) + * 0x1D0000 - 0x1E0000 : QSPI.u-boot-env.backup1 (64KiB) + * 0x1E0000 - 0x9E0000 : QSPI.kernel (8MiB) + * 0x9E0000 - 0x2000000 : USERLAND + */ +#define CONFIG_SYS_SPI_KERNEL_OFFS 0x1E0000 +#define CONFIG_SYS_SPI_ARGS_OFFS 0x140000 +#define CONFIG_SYS_SPI_ARGS_SIZE 0x80000 + +#ifdef CONFIG_SPL_BUILD +#undef CONFIG_DM_SPI +#undef CONFIG_DM_SPI_FLASH +#undef CONFIG_SPL_MAX_SIZE +#define CONFIG_SPL_MAX_SIZE (256 << 10) /* 256 KiB */ +#endif + +/* SPI SPL */ +#define CONFIG_SPL_SPI_SUPPORT +#define CONFIG_SPL_DMA_SUPPORT +#define CONFIG_TI_EDMA3 +#define CONFIG_SPL_SPI_LOAD +#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000 + +/* SPI */ +#undef CONFIG_OMAP3_SPI +#define CONFIG_TI_SPI_MMAP +#define CONFIG_SF_DEFAULT_SPEED 76800000 +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 +#define CONFIG_QSPI_QUAD_SUPPORT + #endif /* __CONFIG_AM57XX_EVM_H */ diff --git a/include/configs/aristainetos-common.h b/include/configs/aristainetos-common.h index d87d40c..640227b 100644 --- a/include/configs/aristainetos-common.h +++ b/include/configs/aristainetos-common.h @@ -17,7 +17,6 @@ #define CONFIG_MACH_TYPE 4501 #define CONFIG_MMCROOT "/dev/mmcblk0p1" -#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (64 * SZ_1M) diff --git a/include/configs/arndale.h b/include/configs/arndale.h index b08f341..18e59fc 100644 --- a/include/configs/arndale.h +++ b/include/configs/arndale.h @@ -45,6 +45,7 @@ #define CONFIG_S5P_PA_SYSRAM 0x02020000 #define CONFIG_SMP_PEN_ADDR CONFIG_S5P_PA_SYSRAM +#define CONFIG_ARMV7_PSCI_NR_CPUS 4 /* The PERIPHBASE in the CBAR register is wrong on the Arndale, so override it */ #define CONFIG_ARM_GIC_BASE_ADDRESS 0x10480000 diff --git a/include/configs/axs101.h b/include/configs/axs10x.h index c0b68e2..b99248e 100644 --- a/include/configs/axs101.h +++ b/include/configs/axs10x.h @@ -1,12 +1,13 @@ /* - * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved. + * Copyright (C) 2013-2016 Synopsys, Inc. All rights reserved. * * SPDX-License-Identifier: GPL-2.0+ */ -#ifndef _CONFIG_AXS101_H_ -#define _CONFIG_AXS101_H_ +#ifndef _CONFIG_AXS10X_H_ +#define _CONFIG_AXS10X_H_ +#include <linux/sizes.h> /* * CPU configuration */ @@ -24,13 +25,13 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_SYS_SDRAM_SIZE 0x20000000 /* 512 Mb */ +#define CONFIG_SYS_SDRAM_SIZE SZ_512M #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_MALLOC_LEN 0x200000 /* 2 MB */ -#define CONFIG_SYS_BOOTM_LEN 0x2000000 /* 32 MB */ +#define CONFIG_SYS_MALLOC_LEN SZ_2M +#define CONFIG_SYS_BOOTM_LEN SZ_32M #define CONFIG_SYS_LOAD_ADDR 0x82000000 /* @@ -113,7 +114,7 @@ * Environment settings */ #define CONFIG_ENV_IS_IN_EEPROM -#define CONFIG_ENV_SIZE 0x00200 /* 512 bytes */ +#define CONFIG_ENV_SIZE SZ_512 #define CONFIG_ENV_OFFSET 0 /* @@ -127,7 +128,7 @@ * Console configuration */ #define CONFIG_SYS_LONGHELP -#define CONFIG_SYS_CBSIZE 256 +#define CONFIG_SYS_CBSIZE SZ_256 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) @@ -137,4 +138,4 @@ */ #define CONFIG_BOUNCE_BUFFER -#endif /* _CONFIG_AXS101_H_ */ +#endif /* _CONFIG_AXS10X_H_ */ diff --git a/include/configs/bcm23550_w1d.h b/include/configs/bcm23550_w1d.h index 8d041ed..770dd87 100644 --- a/include/configs/bcm23550_w1d.h +++ b/include/configs/bcm23550_w1d.h @@ -127,17 +127,9 @@ /* Commands */ #define CONFIG_FAT_WRITE -/* Fastboot and USB OTG */ -#define CONFIG_USB_FUNCTION_FASTBOOT -#define CONFIG_CMD_FASTBOOT -#define CONFIG_FASTBOOT_FLASH -#define CONFIG_FASTBOOT_FLASH_MMC_DEV 0 #define CONFIG_SYS_CACHELINE_SIZE 64 -#define CONFIG_FASTBOOT_BUF_SIZE 0x1d000000 -#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_SDRAM_BASE #undef CONFIG_USB_GADGET_VBUS_DRAW #define CONFIG_USB_GADGET_VBUS_DRAW 0 -#define CONFIG_USB_GADGET_BCM_UDC_OTG_PHY #define CONFIG_USBID_ADDR 0x34052c46 #define CONFIG_SYS_ICACHE_OFF diff --git a/include/configs/bcm28155_ap.h b/include/configs/bcm28155_ap.h index 889e5db..df0b2ba 100644 --- a/include/configs/bcm28155_ap.h +++ b/include/configs/bcm28155_ap.h @@ -126,15 +126,7 @@ /* Commands */ #define CONFIG_FAT_WRITE -/* Fastboot and USB OTG */ -#define CONFIG_USB_FUNCTION_FASTBOOT -#define CONFIG_CMD_FASTBOOT -#define CONFIG_FASTBOOT_FLASH -#define CONFIG_FASTBOOT_FLASH_MMC_DEV 0 #define CONFIG_SYS_CACHELINE_SIZE 64 -#define CONFIG_FASTBOOT_BUF_SIZE (CONFIG_SYS_SDRAM_SIZE - SZ_1M) -#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_SDRAM_BASE -#define CONFIG_USB_GADGET_BCM_UDC_OTG_PHY #define CONFIG_USBID_ADDR 0x34052c46 #endif /* __BCM28155_AP_H */ diff --git a/include/configs/bcm_ep_board.h b/include/configs/bcm_ep_board.h index d5888e8..50cd743 100644 --- a/include/configs/bcm_ep_board.h +++ b/include/configs/bcm_ep_board.h @@ -93,5 +93,6 @@ /* Misc utility code */ #define CONFIG_BOUNCE_BUFFER #define CONFIG_CRC32_VERIFY +#define CONFIG_ARMV7_PSCI_NR_CPUS 4 #endif /* __BCM_EP_BOARD_H */ diff --git a/include/configs/cgtqmx6eval.h b/include/configs/cgtqmx6eval.h index dd03936..127a28a 100644 --- a/include/configs/cgtqmx6eval.h +++ b/include/configs/cgtqmx6eval.h @@ -251,7 +251,6 @@ /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index 1f20ec3..c839b03 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -18,6 +18,7 @@ #define CONFIG_MACH_TYPE 4273 /* CMD */ +#define CONFIG_CMD_MTDPARTS /* MMC */ #define CONFIG_SYS_FSL_USDHC_NUM 3 @@ -53,6 +54,20 @@ #define CONFIG_SF_DEFAULT_SPEED 25000000 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) +/* MTD support */ +#ifndef CONFIG_SPL_BUILD +#define CONFIG_FDT_FIXUP_PARTITIONS +#define CONFIG_MTD_DEVICE +#define CONFIG_MTD_PARTITIONS +#define CONFIG_SPI_FLASH_MTD +#endif + +#define MTDIDS_DEFAULT "nor0=spi0.0" +#define MTDPARTS_DEFAULT "mtdparts=spi0.0:" \ + "768k(uboot)," \ + "256k(uboot-environment)," \ + "-(reserved)" + /* Environment */ #define CONFIG_ENV_IS_IN_SPI_FLASH #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED @@ -69,6 +84,8 @@ "stderr=serial,vga\0" \ "panel=HDMI\0" \ "autoload=no\0" \ + "uImage=uImage-cm-fx6\0" \ + "zImage=zImage-cm-fx6\0" \ "kernel=uImage-cm-fx6\0" \ "script=boot.scr\0" \ "dtb=cm-fx6.dtb\0" \ @@ -81,10 +98,12 @@ "video_dvi=mxcfb0:dev=dvi,1280x800M-32@50,if=RGB32\0" \ "doboot=bootm ${loadaddr}\0" \ "doloadfdt=false\0" \ - "setboottypez=setenv kernel zImage-cm-fx6;" \ + "mtdids=" MTDIDS_DEFAULT "\0" \ + "mtdparts=" MTDPARTS_DEFAULT "\0" \ + "setboottypez=setenv kernel ${zImage};" \ "setenv doboot bootz ${loadaddr} - ${fdtaddr};" \ "setenv doloadfdt true;\0" \ - "setboottypem=setenv kernel uImage-cm-fx6;" \ + "setboottypem=setenv kernel ${uImage};" \ "setenv doboot bootm ${loadaddr};" \ "setenv doloadfdt false;\0"\ "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \ @@ -92,13 +111,13 @@ "nandroot=/dev/mtdblock4 rw\0" \ "nandrootfstype=ubifs\0" \ "mmcargs=setenv bootargs console=${console} root=${mmcroot} " \ - "${video}\0" \ + "${video} ${extrabootargs}\0" \ "sataargs=setenv bootargs console=${console} root=${sataroot} " \ - "${video}\0" \ + "${video} ${extrabootargs}\0" \ "nandargs=setenv bootargs console=${console} " \ "root=${nandroot} " \ "rootfstype=${nandrootfstype} " \ - "${video}\0" \ + "${video} ${extrabootargs}\0" \ "nandboot=if run nandloadkernel; then " \ "run nandloadfdt;" \ "run setboottypem;" \ @@ -155,7 +174,7 @@ "run setupnandboot;" \ "run nandboot;" -#define CONFIG_PREBOOT "usb start" +#define CONFIG_PREBOOT "usb start;sf probe" /* SPI */ #define CONFIG_SPI diff --git a/include/configs/cm_t43.h b/include/configs/cm_t43.h index 9bb975a..5d94f13 100644 --- a/include/configs/cm_t43.h +++ b/include/configs/cm_t43.h @@ -60,7 +60,6 @@ #define CONFIG_SYS_RX_ETH_BUFFER 64 /* USB support */ -#define CONFIG_USB_HOST #define CONFIG_USB_XHCI_OMAP #define CONFIG_USB_STORAGE #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 diff --git a/include/configs/cm_t54.h b/include/configs/cm_t54.h index 68851ee..8e9444e 100644 --- a/include/configs/cm_t54.h +++ b/include/configs/cm_t54.h @@ -69,7 +69,6 @@ #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ CONFIG_SYS_SCSI_MAX_LUN) /* USB UHH support options */ -#define CONFIG_USB_HOST #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_OMAP #define CONFIG_USB_STORAGE diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h new file mode 100644 index 0000000..9da219c --- /dev/null +++ b/include/configs/colibri_imx7.h @@ -0,0 +1,247 @@ +/* + * Copyright 2016 Toradex AG + * + * Configuration settings for the Colibri iMX7 module. + * + * based on mx7dsabresd.h: + * Copyright (C) 2015 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __COLIBRI_IMX7_CONFIG_H +#define __COLIBRI_IMX7_CONFIG_H + +#include "mx7_common.h" + +#define CONFIG_SYS_THUMB_BUILD +#define CONFIG_USE_ARCH_MEMCPY +#define CONFIG_USE_ARCH_MEMSET + +/*#define CONFIG_DBG_MONITOR*/ +#define PHYS_SDRAM_SIZE SZ_512M + +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_LATE_INIT + +#define CONFIG_DISPLAY_BOARDINFO_LATE + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M) + +/* Uncomment to enable secure boot support */ +/* #define CONFIG_SECURE_BOOT */ +#define CONFIG_CSF_SIZE 0x4000 + +#define CONFIG_CMD_BMODE + +/* Network */ +#define CONFIG_FEC_MXC +#define CONFIG_MII +#define CONFIG_FEC_XCV_TYPE RMII +#define CONFIG_ETHPRIME "FEC" +#define CONFIG_FEC_MXC_PHYADDR 0 + +#define CONFIG_PHYLIB +#define CONFIG_PHY_MICREL +#define CONFIG_TFTP_TSIZE +#define CONFIG_IP_DEFRAG +#define CONFIG_TFTP_BLOCKSIZE 16384 + +/* ENET1 */ +#define IMX_FEC_BASE ENET_IPS_BASE_ADDR + +/* MMC Config*/ +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_USDHC_NUM 1 + +#undef CONFIG_BOOTM_PLAN9 +#undef CONFIG_BOOTM_RTEMS + +/* I2C configs */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ +#define CONFIG_SYS_I2C_SPEED 100000 + +#define CONFIG_IPADDR 192.168.10.2 +#define CONFIG_NETMASK 255.255.255.0 +#define CONFIG_SERVERIP 192.168.10.1 + +#define MEM_LAYOUT_ENV_SETTINGS \ + "fdt_addr_r=0x82000000\0" \ + "fdt_high=0xffffffff\0" \ + "initrd_high=0xffffffff\0" \ + "kernel_addr_r=0x81000000\0" \ + "ramdisk_addr_r=0x82100000\0" + +#define SD_BOOTCMD \ + "sdargs=root=/dev/mmcblk0p2 rw rootwait\0" \ + "sdboot=run setup; setenv bootargs ${defargs} ${sdargs} " \ + "${setupargs} ${vidargs}; echo Booting from MMC/SD card...; " \ + "run m4boot && " \ + "load mmc 0:1 ${kernel_addr_r} ${kernel_file} && " \ + "load mmc 0:1 ${fdt_addr_r} ${soc}-colibri-${fdt_board}.dtb && " \ + "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ + +#define NFS_BOOTCMD \ + "nfsargs=ip=:::::eth0: root=/dev/nfs\0" \ + "nfsboot=run setup; " \ + "setenv bootargs ${defargs} ${nfsargs} " \ + "${setupargs} ${vidargs}; echo Booting from NFS...;" \ + "dhcp ${kernel_addr_r} && " \ + "tftp ${fdt_addr_r} ${soc}-colibri-${fdt_board}.dtb && " \ + "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ + +#define UBI_BOOTCMD \ + "ubiargs=ubi.mtd=ubi root=ubi0:rootfs rootfstype=ubifs " \ + "ubi.fm_autoconvert=1\0" \ + "ubiboot=run setup; " \ + "setenv bootargs ${defargs} ${ubiargs} " \ + "${setupargs} ${vidargs}; echo Booting from NAND...; " \ + "ubi part ubi && run m4boot && " \ + "ubi read ${kernel_addr_r} kernel && " \ + "ubi read ${fdt_addr_r} dtb && " \ + "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ + +#define CONFIG_BOOTCOMMAND "run ubiboot; run sdboot; run nfsboot" + +#define CONFIG_EXTRA_ENV_SETTINGS \ + MEM_LAYOUT_ENV_SETTINGS \ + NFS_BOOTCMD \ + SD_BOOTCMD \ + UBI_BOOTCMD \ + "console=ttymxc0\0" \ + "defargs=\0" \ + "fdt_board=eval-v3\0" \ + "fdt_fixup=;\0" \ + "m4boot=;\0" \ + "ip_dyn=yes\0" \ + "kernel_file=zImage\0" \ + "mtdparts=" MTDPARTS_DEFAULT "\0" \ + "setethupdate=if env exists ethaddr; then; else setenv ethaddr " \ + "00:14:2d:00:00:00; fi; tftpboot ${loadaddr} " \ + "${board}/flash_eth.img && source ${loadaddr}\0" \ + "setsdupdate=mmc rescan && setenv interface mmc && " \ + "fatload ${interface} 0:1 ${loadaddr} " \ + "${board}/flash_blk.img && source ${loadaddr}\0" \ + "setup=setenv setupargs " \ + "console=tty1 console=${console}" \ + ",${baudrate}n8 ${memargs} consoleblank=0 ${mtdparts}\0" \ + "setupdate=run setsdupdate || run setusbupdate || run setethupdate\0" \ + "setusbupdate=usb start && setenv interface usb && " \ + "fatload ${interface} 0:1 ${loadaddr} " \ + "${board}/flash_blk.img && source ${loadaddr}\0" \ + "splashpos=m,m\0" \ + "videomode=video=ctfb:x:640,y:480,depth:18,pclk:39722,le:48,ri:16,up:33,lo:10,hs:96,vs:2,sync:0,vmode:0\0" \ + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP + +#define CONFIG_SYS_MEMTEST_START 0x80000000 +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x0c000000) + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#define CONFIG_SYS_HZ 1000 + +#define CONFIG_STACKSIZE SZ_128K + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* FLASH and environment organization */ +#define CONFIG_SYS_NO_FLASH +#define CONFIG_ENV_IS_IN_NAND + +#if defined(CONFIG_ENV_IS_IN_MMC) +#define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */ +#define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ +#define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */ +#define CONFIG_ENV_OFFSET (8 * SZ_64K) +#elif defined(CONFIG_ENV_IS_IN_NAND) +#define CONFIG_ENV_OFFSET (4 * 1024 * 1024) +#define CONFIG_ENV_SECT_SIZE (128 * 1024) +#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE +#endif + +#define CONFIG_NAND_MXS +#define CONFIG_CMD_NAND_TRIMFFS + +/* NAND stuff */ +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0x40000000 +#define CONFIG_SYS_NAND_5_ADDR_CYCLE +#define CONFIG_SYS_NAND_ONFI_DETECTION +#define CONFIG_SYS_NAND_MX7_GPMI_62_ECC_BYTES +#define CONFIG_CMD_NAND_TORTURE + +/* UBI stuff */ +#define CONFIG_RBTREE +#define CONFIG_LZO +#define CONFIG_CMD_UBI +#define CONFIG_MTD_UBI_FASTMAP +#define CONFIG_CMD_UBIFS /* increases size by almost 60 KB */ + +/* Dynamic MTD partition support */ +#define CONFIG_CMD_MTDPARTS /* Enable 'mtdparts' command line support */ +#define CONFIG_MTD_PARTITIONS +#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ +#define MTDIDS_DEFAULT "nand0=gpmi-nand" +#define MTDPARTS_DEFAULT "mtdparts=gpmi-nand:" \ + "512k(mx7-bcb)," \ + "3584k(u-boot)ro," \ + "512k(u-boot-env)," \ + "-(ubi)" + +/* DMA stuff, needed for GPMI/MXS NAND support */ +#define CONFIG_APBH_DMA +#define CONFIG_APBH_DMA_BURST +#define CONFIG_APBH_DMA_BURST8 + +/* USB Configs */ +#define CONFIG_USB_STORAGE +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET + +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 + +#define CONFIG_IMX_THERMAL + +#define CONFIG_USBD_HS + +#define CONFIG_USB_FUNCTION_MASS_STORAGE + +/* USB Device Firmware Update support */ +#define CONFIG_USB_FUNCTION_DFU +#define CONFIG_DFU_MMC +#define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_16M +#define DFU_DEFAULT_POLL_TIMEOUT 300 + +#define CONFIG_VIDEO +#ifdef CONFIG_VIDEO +#define CONFIG_CFB_CONSOLE +#define CONFIG_VIDEO_MXS +#define CONFIG_VIDEO_LOGO +#define CONFIG_VIDEO_SW_CURSOR +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SPLASH_SCREEN +#define CONFIG_SPLASH_SCREEN_ALIGN +#define CONFIG_CMD_BMP +#define CONFIG_BMP_16BPP +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_VIDEO_BMP_LOGO +#endif + +#endif diff --git a/include/configs/conga-qeval20-qa3-e3845.h b/include/configs/conga-qeval20-qa3-e3845.h index 4c37d5e..652e073 100644 --- a/include/configs/conga-qeval20-qa3-e3845.h +++ b/include/configs/conga-qeval20-qa3-e3845.h @@ -15,6 +15,7 @@ #define CONFIG_SYS_MONITOR_LEN (1 << 20) #define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_LATE_INIT #define CONFIG_ARCH_EARLY_INIT_R #define CONFIG_ARCH_MISC_INIT @@ -41,23 +42,24 @@ #define CONFIG_CMD_BMP #define CONFIG_ENV_SECT_SIZE 0x1000 -#define CONFIG_ENV_OFFSET 0x007fe000 +#define CONFIG_ENV_OFFSET 0x006ef000 #undef CONFIG_BOOTARGS #undef CONFIG_BOOTCOMMAND #define CONFIG_BOOTARGS \ - "root=/dev/sda1 ro quiet" + "root=/dev/sda2 ro quiet" #define CONFIG_BOOTCOMMAND \ - "load scsi 0:1 03000000 /boot/vmlinuz-4.2.0-26-generic;" \ - "load scsi 0:1 04000000 /boot/initrd.img-4.2.0-26-generic;" \ + "load scsi 0:2 03000000 /boot/vmlinuz-${kernel-ver}-generic;" \ + "load scsi 0:2 04000000 /boot/initrd.img-${kernel-ver}-generic;" \ "run boot" #undef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS \ + "kernel-ver=4.4.0-22\0" \ "boot=zboot 03000000 0 04000000 ${filesize}\0" \ "upd_uboot=tftp 100000 conga/u-boot.rom;" \ - "sf probe;sf update 100000 0 7fe000\0" + "sf probe;sf update 100000 0 800000;saveenv\0" #define CONFIG_PREBOOT diff --git a/include/configs/controlcenterd.h b/include/configs/controlcenterd.h index 30c2831..1a63d03 100644 --- a/include/configs/controlcenterd.h +++ b/include/configs/controlcenterd.h @@ -26,10 +26,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#ifdef CONFIG_36BIT -#define CONFIG_PHYS_64BIT -#endif - #ifdef CONFIG_SDCARD #define CONFIG_RAMBOOT_SDCARD #endif @@ -447,7 +443,7 @@ "consoledev=ttyS1\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=rootfs.ext2.gz.uboot\0" \ - "fdtaddr=c00000\0" \ + "fdtaddr=1e00000\0" \ "fdtfile=controlcenterd.dtb\0" \ "bdev=sda3\0" diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 4a770b0..0c99e9f 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -708,7 +708,7 @@ "consoledev=ttyS0\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=p4080ds/ramdisk.uboot\0" \ - "fdtaddr=c00000\0" \ + "fdtaddr=1e00000\0" \ "fdtfile=p4080ds/p4080ds.dtb\0" \ "bdev=sda3\0" diff --git a/include/configs/corvus.h b/include/configs/corvus.h index e6a811a..28ea15b 100644 --- a/include/configs/corvus.h +++ b/include/configs/corvus.h @@ -95,6 +95,7 @@ /* Ethernet */ #define CONFIG_MACB +#define CONFIG_PHYLIB #define CONFIG_RMII #define CONFIG_NET_RETRY_COUNT 20 #define CONFIG_AT91_WANTS_COMMON_PHY diff --git a/include/configs/cyrus.h b/include/configs/cyrus.h index 708d5f7..8e0ed06 100644 --- a/include/configs/cyrus.h +++ b/include/configs/cyrus.h @@ -11,8 +11,6 @@ #define CONFIG_CYRUS -#define CONFIG_PHYS_64BIT - #if !defined(CONFIG_PPC_P5020) && !defined(CONFIG_PPC_P5040) #error Must call Cyrus CONFIG with a specific CPU enabled. #endif @@ -520,7 +518,7 @@ "ubootaddr=" __stringify(CONFIG_SYS_TEXT_BASE) "\0" \ "consoledev=ttyS0\0" \ "ramdiskaddr=2000000\0" \ -"fdtaddr=c00000\0" \ +"fdtaddr=1e00000\0" \ "bdev=sda3\0" #define CONFIG_HDBOOT \ diff --git a/include/configs/dfi-bt700.h b/include/configs/dfi-bt700.h new file mode 100644 index 0000000..23d8a0a --- /dev/null +++ b/include/configs/dfi-bt700.h @@ -0,0 +1,74 @@ +/* + * Copyright (C) 2016 Stefan Roese <sr@denx.de> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/* + * board/config.h - configuration options, board specific + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <configs/x86-common.h> + +#define CONFIG_SYS_MONITOR_LEN (1 << 20) +#define CONFIG_BOARD_EARLY_INIT_F + +#ifndef CONFIG_INTERNAL_UART +/* Use BayTrail internal HS UART which is memory-mapped */ +#undef CONFIG_SYS_NS16550_PORT_MAPPED +#endif + +#define CONFIG_PCI_PNP + +#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \ + "stdout=serial\0" \ + "stderr=serial\0" + +#define CONFIG_SCSI_DEV_LIST \ + {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA}, \ + {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT} + +#define CONFIG_MMC +#define CONFIG_SDHCI +#define CONFIG_GENERIC_MMC +#define CONFIG_MMC_SDMA + +#undef CONFIG_USB_MAX_CONTROLLER_COUNT +#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 + +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX +#define CONFIG_USB_ETHER_SMSC95XX +#define CONFIG_USB_ETHER_MCS7830 +#define CONFIG_USB_ETHER_RTL8152 + +#define VIDEO_IO_OFFSET 0 +#define CONFIG_X86EMU_RAW_IO +#define CONFIG_CMD_BMP + +#define CONFIG_ENV_SECT_SIZE 0x1000 +#define CONFIG_ENV_OFFSET 0x006ef000 + +#undef CONFIG_BOOTARGS +#undef CONFIG_BOOTCOMMAND + +#define CONFIG_BOOTARGS \ + "root=/dev/sda1 ro quiet" +#define CONFIG_BOOTCOMMAND \ + "load scsi 0:1 03000000 /boot/vmlinuz-${kernel-ver}-generic;" \ + "load scsi 0:1 04000000 /boot/initrd.img-${kernel-ver}-generic;" \ + "run boot" + +#undef CONFIG_EXTRA_ENV_SETTINGS +#define CONFIG_EXTRA_ENV_SETTINGS \ + "kernel-ver=4.4.0-24\0" \ + "boot=zboot 03000000 0 04000000 ${filesize}\0" \ + "upd_uboot=usb reset;tftp 100000 dfi/u-boot.rom;" \ + "sf probe;sf update 100000 0 800000;saveenv\0" + +#define CONFIG_PREBOOT + +#endif /* __CONFIG_H */ diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index 0d51aeb..b66949f 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -20,7 +20,6 @@ #endif #define CONFIG_VERY_BIG_RAM -#define CONFIG_PHYS_64BIT #define CONFIG_NR_DRAM_BANKS 2 #define CONFIG_MAX_MEM_MAPPED 0x80000000 @@ -157,7 +156,7 @@ /* SPI */ #undef CONFIG_OMAP3_SPI #define CONFIG_TI_SPI_MMAP -#define CONFIG_SF_DEFAULT_SPEED 64000000 +#define CONFIG_SF_DEFAULT_SPEED 76800000 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 #define CONFIG_QSPI_QUAD_SUPPORT @@ -210,7 +209,6 @@ #define CONFIG_SUPPORT_EMMC_BOOT /* USB xHCI HOST */ -#define CONFIG_USB_HOST #define CONFIG_USB_XHCI_OMAP #define CONFIG_USB_STORAGE #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 diff --git a/include/configs/dragonboard410c.h b/include/configs/dragonboard410c.h index 4b00922..1dbe219 100644 --- a/include/configs/dragonboard410c.h +++ b/include/configs/dragonboard410c.h @@ -84,8 +84,8 @@ #define BOOT_TARGET_DEVICES(func) \ func(USB, usb, 0) \ - func(MMC, mmc, 0) \ func(MMC, mmc, 1) \ + func(MMC, mmc, 0) \ func(DHCP, dhcp, na) #include <config_distro_bootcmd.h> @@ -126,6 +126,8 @@ REFLASH(dragonboard/u-boot.img, 8)\ "fdtfile=apq8016-sbc.dtb\0" \ "fdt_addr_r=0x83000000\0"\ "ramdisk_addr_r=0x84000000\0"\ + "scriptaddr=0x90000000\0"\ + "pxefile_addr_r=0x90100000\0"\ BOOTENV #define CONFIG_ENV_IS_NOWHERE diff --git a/include/configs/duovero.h b/include/configs/duovero.h index 98afe27..299c0d5 100644 --- a/include/configs/duovero.h +++ b/include/configs/duovero.h @@ -29,7 +29,6 @@ #define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS /* USB UHH support options */ -#define CONFIG_USB_HOST #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_OMAP #define CONFIG_USB_STORAGE diff --git a/include/configs/el6x_common.h b/include/configs/el6x_common.h new file mode 100644 index 0000000..55ef612 --- /dev/null +++ b/include/configs/el6x_common.h @@ -0,0 +1,139 @@ +/* + * Copyright (C) Stefano Babic <sbabic@denx.de> + * + * Configuration settings for the E+L i.MX6Q DO82 board. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __EL6Q_COMMON_CONFIG_H +#define __EL6Q_COMMON_CONFIG_H + +#define CONFIG_BOARD_NAME EL6Q + +#include <config_distro_defaults.h> +#include "mx6_common.h" + +#define CONFIG_IMX_THERMAL + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) + +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_LATE_INIT + +#define CONFIG_MXC_UART + +#ifdef CONFIG_SPL +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_MMC_SUPPORT +#define CONFIG_SPL_SPI_SUPPORT +#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) +#define CONFIG_SPL_SPI_LOAD +#include "imx6_spl.h" +#endif + +/* MMC Configs */ +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_USDHC_NUM 2 + +/* I2C config */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ +#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ +#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ +#define CONFIG_SYS_I2C_SPEED 100000 + +/* PMIC */ +#define CONFIG_POWER +#define CONFIG_POWER_I2C +#define CONFIG_POWER_PFUZE100 +#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 + +/* Commands */ +#define CONFIG_MXC_SPI +#define CONFIG_SF_DEFAULT_BUS 3 +#define CONFIG_SF_DEFAULT_CS 0 +#define CONFIG_SF_DEFAULT_SPEED 20000000 +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_MXC_UART_BASE UART2_BASE +#define CONFIG_BAUDRATE 115200 + +/* Command definition */ + +#define CONFIG_CMD_BMODE +#define CONFIG_CMD_BOOTZ +#undef CONFIG_CMD_IMLS + +#define CONFIG_BOARD_NAME EL6Q + +#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG +#define CONFIG_EXTRA_ENV_SETTINGS \ + "board="__stringify(CONFIG_BOARD_NAME)"\0" \ + "cma_size="__stringify(EL6Q_CMA_SIZE)"\0" \ + "chp_size="__stringify(EL6Q_COHERENT_POOL_SIZE)"\0" \ + "console=" CONFIG_CONSOLE_DEV "\0" \ + "fdtfile=undefined\0" \ + "fdt_high=0xffffffff\0" \ + "fdt_addr_r=0x18000000\0" \ + "fdt_addr=0x18000000\0" \ + "findfdt=setenv fdtfile " CONFIG_DEFAULT_FDT_FILE "\0" \ + "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ + "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \ + "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ + BOOTENV + +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) \ + func(MMC, mmc, 1) \ + func(PXE, PXE, na) \ + func(DHCP, dhcp, na) + +#define CONFIG_BOOTCOMMAND \ + "run findfdt; " \ + "run distro_bootcmd" + +#include <config_distro_bootcmd.h> + +#define CONFIG_ARP_TIMEOUT 200UL + +#define CONFIG_CMD_MEMTEST + +#define CONFIG_SYS_MEMTEST_START 0x10000000 +#define CONFIG_SYS_MEMTEST_END 0x10800000 +#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 + +#define CONFIG_STACKSIZE (128 * 1024) + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* FLASH and environment organization */ +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ENV_SIZE (8 * 1024) + +#define CONFIG_ENV_IS_IN_MMC + +#if defined(CONFIG_ENV_IS_IN_MMC) +#define CONFIG_SYS_MMC_ENV_DEV 1 +#define CONFIG_SYS_MMC_ENV_PART 2 +#define CONFIG_ENV_OFFSET 0x0 +#endif + +#endif /* __EL6Q_COMMON_CONFIG_H */ diff --git a/include/configs/evb_rk3288.h b/include/configs/evb_rk3288.h new file mode 100644 index 0000000..342557f --- /dev/null +++ b/include/configs/evb_rk3288.h @@ -0,0 +1,26 @@ +/* + * (C) Copyright 2016 Rockchip Electronics Co., Ltd + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define ROCKCHIP_DEVICE_SETTINGS +#include <configs/rk3288_common.h> + +#define CONFIG_SPL_MMC_SUPPORT + +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 1 +/* SPL @ 32k for ~36k + * ENV @ 96k + * u-boot @ 128K + */ +#define CONFIG_ENV_OFFSET (96 * 1024) + +#define CONFIG_SYS_WHITE_ON_BLACK +#define CONFIG_CONSOLE_SCROLL_LINES 10 + +#endif diff --git a/include/configs/evb_rk3399.h b/include/configs/evb_rk3399.h new file mode 100644 index 0000000..047850a --- /dev/null +++ b/include/configs/evb_rk3399.h @@ -0,0 +1,26 @@ +/* + * (C) Copyright 2016 Rockchip Electronics Co., Ltd + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __EVB_RK3399_H +#define __EVB_RK3399_H + +#include <configs/rk3399_common.h> + +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 0 +/* + * SPL @ 32k for ~36k + * ENV @ 96k + * u-boot @ 128K + */ +#define CONFIG_ENV_OFFSET (96 * 1024) + +#define SDRAM_BANK_SIZE (2UL << 30) + +#define CONFIG_SYS_WHITE_ON_BLACK +#define CONFIG_CONSOLE_SCROLL_LINES 10 + +#endif diff --git a/include/configs/fennec_rk3288.h b/include/configs/fennec_rk3288.h new file mode 100644 index 0000000..342557f --- /dev/null +++ b/include/configs/fennec_rk3288.h @@ -0,0 +1,26 @@ +/* + * (C) Copyright 2016 Rockchip Electronics Co., Ltd + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define ROCKCHIP_DEVICE_SETTINGS +#include <configs/rk3288_common.h> + +#define CONFIG_SPL_MMC_SUPPORT + +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 1 +/* SPL @ 32k for ~36k + * ENV @ 96k + * u-boot @ 128K + */ +#define CONFIG_ENV_OFFSET (96 * 1024) + +#define CONFIG_SYS_WHITE_ON_BLACK +#define CONFIG_CONSOLE_SCROLL_LINES 10 + +#endif diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h index 4de2460..7a54546 100644 --- a/include/configs/ge_bx50v3.h +++ b/include/configs/ge_bx50v3.h @@ -32,8 +32,6 @@ #define CONFIG_MXC_UART_BASE UART3_BASE #define CONFIG_CONSOLE_DEV "ttymxc2" -#define PHYS_SDRAM_SIZE (2u * 1024 * 1024 * 1024) - #define CONFIG_SUPPORT_EMMC_BOOT diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 982ddba..1bd13fe 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -33,6 +33,8 @@ #include "imx6_spl.h" /* common IMX6 SPL configuration */ #include "mx6_common.h" #undef CONFIG_SPL_EXT_SUPPORT +#undef CONFIG_DISPLAY_BOARDINFO +#define CONFIG_DISPLAY_BOARDINFO_LATE #define CONFIG_MACH_TYPE 4520 /* Gateworks Ventana Platform */ @@ -269,15 +271,13 @@ /* Environment */ #define CONFIG_IPADDR 192.168.1.1 #define CONFIG_SERVERIP 192.168.1.146 -#define HWCONFIG_DEFAULT \ - "hwconfig=rs232;" \ - "dio0:mode=gpio;dio1:mode=gpio;dio2:mode=gpio;dio3:mode=gpio\0" \ #define CONFIG_EXTRA_ENV_SETTINGS_COMMON \ + "pcidisable=1\0" \ "usb_pgood_delay=2000\0" \ "console=ttymxc1\0" \ "bootdevs=usb mmc sata flash\0" \ - HWCONFIG_DEFAULT \ + "hwconfig=_UNKNOWN_\0" \ "video=\0" \ \ "mtdparts=" MTDPARTS_DEFAULT "\0" \ diff --git a/include/configs/jetson-tk1.h b/include/configs/jetson-tk1.h index 953c088..2b172a5 100644 --- a/include/configs/jetson-tk1.h +++ b/include/configs/jetson-tk1.h @@ -61,6 +61,7 @@ #include "tegra-common-post.h" #define CONFIG_ARMV7_PSCI 1 +#define CONFIG_ARMV7_PSCI_NR_CPUS 4 /* Reserve top 1M for secure RAM */ #define CONFIG_ARMV7_SECURE_BASE 0xfff00000 #define CONFIG_ARMV7_SECURE_RESERVE_SIZE 0x00100000 diff --git a/include/configs/k2g_evm.h b/include/configs/k2g_evm.h index f8bba67..71b0037 100644 --- a/include/configs/k2g_evm.h +++ b/include/configs/k2g_evm.h @@ -73,4 +73,10 @@ #define CONFIG_SF_DEFAULT_BUS 1 #define CONFIG_SF_DEFAULT_CS 0 +#ifndef CONFIG_SPL_BUILD +#define CONFIG_CADENCE_QSPI +#define CONFIG_CQSPI_REF_CLK 384000000 +#define CONFIG_CQSPI_DECODER 0x0 +#endif + #endif /* __CONFIG_K2G_EVM_H */ diff --git a/include/configs/katmai.h b/include/configs/katmai.h index 9513c6d..e3fede5 100644 --- a/include/configs/katmai.h +++ b/include/configs/katmai.h @@ -29,7 +29,6 @@ /* * Enable this board for more than 2GB of SDRAM */ -#define CONFIG_PHYS_64BIT #define CONFIG_VERY_BIG_RAM /* diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h index 5bdda22..8166c86 100644 --- a/include/configs/km/kmp204x-common.h +++ b/include/configs/km/kmp204x-common.h @@ -8,7 +8,6 @@ #ifndef _CONFIG_KMP204X_H #define _CONFIG_KMP204X_H -#define CONFIG_PHYS_64BIT #define CONFIG_PPC_P2041 #define CONFIG_SYS_TEXT_BASE 0xfff40000 diff --git a/include/configs/kylin_rk3036.h b/include/configs/kylin_rk3036.h index b16c03f..e8ca76d 100644 --- a/include/configs/kylin_rk3036.h +++ b/include/configs/kylin_rk3036.h @@ -26,7 +26,6 @@ /* Enable gpt partition table */ #define CONFIG_CMD_GPT #define CONFIG_RANDOM_UUID -#define CONFIG_EFI_PARTITION #define PARTS_DEFAULT \ "uuid_disk=${uuid_gpt_disk};" \ "name=loader,start=32K,size=4000K,uuid=${uuid_gpt_loader};" \ diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h index fcf402c..6e31ca0 100644 --- a/include/configs/ls1012aqds.h +++ b/include/configs/ls1012aqds.h @@ -28,11 +28,11 @@ #define CONFIG_SYS_I2C_FPGA_ADDR 0x66 #define QIXIS_LBMAP_BRDCFG_REG 0x04 #define QIXIS_LBMAP_SWITCH 6 -#define QIXIS_LBMAP_MASK 0xf7 +#define QIXIS_LBMAP_MASK 0x08 #define QIXIS_LBMAP_SHIFT 0 #define QIXIS_LBMAP_DFLTBANK 0x00 #define QIXIS_LBMAP_ALTBANK 0x08 -#define QIXIS_RST_CTL_RESET 0x41 +#define QIXIS_RST_CTL_RESET 0x31 #define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20 #define QIXIS_RCFG_CTL_RECONFIG_START 0x21 #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08 diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index db684d2..47180f9 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -10,6 +10,10 @@ #define CONFIG_LS102XA #define CONFIG_ARMV7_PSCI +#define CONFIG_ARMV7_PSCI_1_0 +#define CONFIG_ARMV7_PSCI_NR_CPUS CONFIG_MAX_CPUS + +#define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR #define CONFIG_SYS_FSL_CLK @@ -279,6 +283,8 @@ unsigned long get_board_ddr_clk(void); #define QIXIS_LBMAP_SHIFT 0 #define QIXIS_LBMAP_DFLTBANK 0x00 #define QIXIS_LBMAP_ALTBANK 0x04 +#define QIXIS_PWR_CTL 0x21 +#define QIXIS_PWR_CTL_POWEROFF 0x80 #define QIXIS_RST_CTL_RESET 0x44 #define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20 #define QIXIS_RCFG_CTL_RECONFIG_START 0x21 diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 0fb28ef..2f19950 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -10,6 +10,10 @@ #define CONFIG_LS102XA #define CONFIG_ARMV7_PSCI +#define CONFIG_ARMV7_PSCI_1_0 +#define CONFIG_ARMV7_PSCI_NR_CPUS CONFIG_MAX_CPUS + +#define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR #define CONFIG_SYS_FSL_CLK @@ -123,7 +127,18 @@ #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_MMC_SUPPORT #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0xe8 + +#ifdef CONFIG_SECURE_BOOT +#define CONFIG_U_BOOT_HDR_SIZE (16 << 10) +/* + * HDR would be appended at end of image and copied to DDR along + * with U-Boot image. + */ +#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS (0x400 + \ + (CONFIG_U_BOOT_HDR_SIZE / 512) +#else #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400 +#endif /* ifdef CONFIG_SECURE_BOOT */ #define CONFIG_SPL_TEXT_BASE 0x10000000 #define CONFIG_SPL_MAX_SIZE 0x1a000 @@ -136,7 +151,18 @@ #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 #define CONFIG_SPL_BSS_START_ADDR 0x80100000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 + +#ifdef CONFIG_U_BOOT_HDR_SIZE +/* + * HDR would be appended at end of image and copied to DDR along + * with U-Boot image. Here u-boot max. size is 512K. So if binary + * size increases then increase this size in case of secure boot as + * it uses raw u-boot image instead of fit image. + */ +#define CONFIG_SYS_MONITOR_LEN (0x80000 + CONFIG_U_BOOT_HDR_SIZE) +#else #define CONFIG_SYS_MONITOR_LEN 0x80000 +#endif /* ifdef CONFIG_U_BOOT_HDR_SIZE */ #endif #ifdef CONFIG_QSPI_BOOT diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index b0d4a8d..e55fcb2 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -175,6 +175,8 @@ /* Command line configuration */ #define CONFIG_CMD_ENV +#define CONFIG_MENU +#define CONFIG_CMD_PXE /* MMC */ #define CONFIG_MMC @@ -241,22 +243,37 @@ #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 128 +#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) +#define MTDPARTS_DEFAULT "mtdparts=spi0.0:1m(uboot)," \ + "5m(kernel),1m(dtb),9m(file_system)" +#else +#define MTDPARTS_DEFAULT "mtdparts=60000000.nor:1m(nor_bank0_rcw)," \ + "1m(nor_bank0_uboot),1m(nor_bank0_uboot_env)," \ + "1m(nor_bank0_fman_uconde),40m(nor_bank0_fit)," \ + "1m(nor_bank4_rcw),1m(nor_bank4_uboot)," \ + "1m(nor_bank4_uboot_env),1m(nor_bank4_fman_ucode)," \ + "40m(nor_bank4_fit);7e800000.flash:" \ + "1m(nand_uboot),1m(nand_uboot_env)," \ + "20m(nand_fit);spi0.0:1m(uboot)," \ + "5m(kernel),1m(dtb),9m(file_system)" +#endif + /* Initial environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ "hwconfig=fsl_ddr:bank_intlv=auto\0" \ "loadaddr=0x80100000\0" \ - "kernel_addr=0x100000\0" \ - "ramdisk_addr=0x800000\0" \ - "ramdisk_size=0x2000000\0" \ "fdt_high=0xffffffffffffffff\0" \ "initrd_high=0xffffffffffffffff\0" \ "kernel_start=0x61100000\0" \ "kernel_load=0xa0000000\0" \ "kernel_size=0x2800000\0" \ - "console=ttyAMA0,38400n8\0" + "console=ttyS0,115200\0" \ + "mtdparts=" MTDPARTS_DEFAULT "\0" #define CONFIG_BOOTARGS "console=ttyS0,115200 root=/dev/ram0 " \ - "earlycon=uart8250,mmio,0x21c0500" + "earlycon=uart8250,mmio,0x21c0500 " \ + MTDPARTS_DEFAULT + #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) #define CONFIG_BOOTCOMMAND "sf probe && sf read $kernel_load " \ "e0000 f00000 && bootm $kernel_load" diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index 94ddfb1..857ad7b 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -9,6 +9,17 @@ #include "ls1043a_common.h" +#if defined(CONFIG_FSL_LS_PPA) +#define CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT +#define SEC_FIRMWARE_ERET_ADDR_REVERT +#define CONFIG_ARMV8_PSCI + +#define CONFIG_SYS_LS_PPA_FW_IN_XIP +#ifdef CONFIG_SYS_LS_PPA_FW_IN_XIP +#define CONFIG_SYS_LS_PPA_FW_ADDR 0x60500000 +#endif +#endif + #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index 93fb166..e5bf700 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -175,10 +175,6 @@ #define CONFIG_CMD_IRQ #define CONFIG_CMD_MFSL -#if defined(CONFIG_DCACHE) || defined(CONFIG_ICACHE) -#else -#endif - #if defined(FLASH) # define CONFIG_CMD_JFFS2 # define CONFIG_CMD_UBI @@ -309,6 +305,7 @@ 0x60000) #define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \ 0x40000) +#define CONFIG_SYS_FDT_SIZE (16<<10) #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_TEXT_BASE + \ 0x1000000) diff --git a/include/configs/miniarm_rk3288.h b/include/configs/miniarm_rk3288.h new file mode 100644 index 0000000..342557f --- /dev/null +++ b/include/configs/miniarm_rk3288.h @@ -0,0 +1,26 @@ +/* + * (C) Copyright 2016 Rockchip Electronics Co., Ltd + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define ROCKCHIP_DEVICE_SETTINGS +#include <configs/rk3288_common.h> + +#define CONFIG_SPL_MMC_SUPPORT + +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 1 +/* SPL @ 32k for ~36k + * ENV @ 96k + * u-boot @ 128K + */ +#define CONFIG_ENV_OFFSET (96 * 1024) + +#define CONFIG_SYS_WHITE_ON_BLACK +#define CONFIG_CONSOLE_SCROLL_LINES 10 + +#endif diff --git a/include/configs/mx6qsabreauto.h b/include/configs/mx6qsabreauto.h index 6039fc4..200e468 100644 --- a/include/configs/mx6qsabreauto.h +++ b/include/configs/mx6qsabreauto.h @@ -13,7 +13,6 @@ #define CONFIG_MXC_UART_BASE UART4_BASE #define CONFIG_CONSOLE_DEV "ttymxc3" #define CONFIG_MMCROOT "/dev/mmcblk0p2" -#define PHYS_SDRAM_SIZE (2u * 1024 * 1024 * 1024) /* USB Configs */ #define CONFIG_USB_EHCI diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h index d53e416..375aa0e 100644 --- a/include/configs/mx6slevk.h +++ b/include/configs/mx6slevk.h @@ -137,7 +137,6 @@ /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define PHYS_SDRAM_SIZE SZ_1G #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR diff --git a/include/configs/mx6sxsabreauto.h b/include/configs/mx6sxsabreauto.h index d771f9d..439579d 100644 --- a/include/configs/mx6sxsabreauto.h +++ b/include/configs/mx6sxsabreauto.h @@ -103,7 +103,6 @@ /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define PHYS_SDRAM_SIZE SZ_2G #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index 183a759..9281fee 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -132,7 +132,6 @@ /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define PHYS_SDRAM_SIZE SZ_1G #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h index fbc6de6..7295fa6 100644 --- a/include/configs/mx7_common.h +++ b/include/configs/mx7_common.h @@ -21,6 +21,7 @@ #define CONFIG_MXC_GPT_HCLK #define CONFIG_SYSCOUNTER_TIMER #define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */ +#define CONFIG_TIMER_CLK_FREQ CONFIG_SC_TIMER_CLK #define CONFIG_SYS_FSL_CLK #define CONFIG_SYS_BOOTM_LEN 0x1000000 @@ -28,8 +29,9 @@ /* Enable iomux-lpsr support */ #define CONFIG_IOMUX_LPSR +#define CONFIG_ARCH_MISC_INIT + #define CONFIG_DISPLAY_CPUINFO -#define CONFIG_DISPLAY_BOARDINFO #define CONFIG_LOADADDR 0x80800000 #define CONFIG_SYS_TEXT_BASE 0x87800000 @@ -70,15 +72,8 @@ #define CONFIG_CMD_FUSE #define CONFIG_MXC_OCOTP -/* - * Default boot linux kernel in no secure mode. - * If want to boot kernel in secure mode, please define CONFIG_MX7_SEC - */ -#ifndef CONFIG_MX7_SEC -#define CONFIG_ARMV7_NONSEC #define CONFIG_ARMV7_PSCI #define CONFIG_ARMV7_PSCI_NR_CPUS 2 #define CONFIG_ARMV7_SECURE_BASE 0x00900000 -#endif #endif diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h index ece8a03..822d81f 100644 --- a/include/configs/mx7dsabresd.h +++ b/include/configs/mx7dsabresd.h @@ -22,6 +22,8 @@ #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_BOARD_LATE_INIT +#define CONFIG_DISPLAY_BOARDINFO + /* Uncomment to enable secure boot support */ /* #define CONFIG_SECURE_BOOT */ #define CONFIG_CSF_SIZE 0x4000 @@ -237,8 +239,6 @@ #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */ /* USB Configs */ -#define CONFIG_USB_EHCI -#define CONFIG_USB_EHCI_MX7 #define CONFIG_USB_STORAGE #define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_USB_HOST_ETHER diff --git a/include/configs/mxs.h b/include/configs/mxs.h index 0882d5d..238b16d 100644 --- a/include/configs/mxs.h +++ b/include/configs/mxs.h @@ -120,7 +120,7 @@ #define CONFIG_PL011_CLOCK 24000000 #define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE } #define CONFIG_CONS_INDEX 0 -/* Default baudrate can be overriden by board! */ +/* Default baudrate can be overridden by board! */ #ifndef CONFIG_BAUDRATE #define CONFIG_BAUDRATE 115200 #endif diff --git a/include/configs/novena.h b/include/configs/novena.h index 2382951..57d8c3e 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -57,7 +57,6 @@ /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define PHYS_SDRAM_SIZE 0xF0000000 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR diff --git a/include/configs/arcangel4.h b/include/configs/nsim.h index d608104..1edc560 100644 --- a/include/configs/arcangel4.h +++ b/include/configs/nsim.h @@ -1,11 +1,13 @@ /* - * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved. + * Copyright (C) 2013-2016 Synopsys, Inc. All rights reserved. * * SPDX-License-Identifier: GPL-2.0+ */ -#ifndef _CONFIG_ARCANGEL4_H_ -#define _CONFIG_ARCANGEL4_H_ +#ifndef _CONFIG_NSIM_H_ +#define _CONFIG_NSIM_H_ + +#include <linux/sizes.h> /* * CPU configuration @@ -19,13 +21,13 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_SYS_SDRAM_SIZE 0x10000000 /* 256 Mb */ +#define CONFIG_SYS_SDRAM_SIZE SZ_256M #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_MALLOC_LEN 0x200000 /* 2 MB */ -#define CONFIG_SYS_BOOTM_LEN 0x2000000 /* 32 MB */ +#define CONFIG_SYS_MALLOC_LEN SZ_2M +#define CONFIG_SYS_BOOTM_LEN SZ_32M #define CONFIG_SYS_LOAD_ADDR 0x82000000 #define CONFIG_SYS_NO_FLASH @@ -48,7 +50,7 @@ * Environment settings */ #define CONFIG_ENV_IS_NOWHERE -#define CONFIG_ENV_SIZE 0x00200 /* 512 bytes */ +#define CONFIG_ENV_SIZE SZ_512 #define CONFIG_ENV_OFFSET 0 /* @@ -62,9 +64,9 @@ * Console configuration */ #define CONFIG_SYS_LONGHELP -#define CONFIG_SYS_CBSIZE 256 +#define CONFIG_SYS_CBSIZE SZ_256 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) -#endif /* _CONFIG_ARCANGEL4_H_ */ +#endif /* _CONFIG_NSIM_H_ */ diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h index 1726a3e..52a24d3 100644 --- a/include/configs/omap3_evm.h +++ b/include/configs/omap3_evm.h @@ -96,11 +96,279 @@ #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 +/* + * High level configuration options + */ +#define CONFIG_OMAP /* This is TI OMAP core */ +#define CONFIG_OMAP_GPIO +#define CONFIG_OMAP_COMMON +/* Common ARM Erratas */ +#define CONFIG_ARM_ERRATA_454179 +#define CONFIG_ARM_ERRATA_430973 +#define CONFIG_ARM_ERRATA_621766 + +#define CONFIG_SDRC /* The chip has SDRC controller */ + +#define CONFIG_OMAP3_EVM /* This is a OMAP3 EVM */ +#define CONFIG_TWL4030_POWER /* with TWL4030 PMIC */ + +/* + * Clock related definitions + */ +#define V_OSCK 26000000 /* Clock output from T2 */ +#define V_SCLK (V_OSCK >> 1) + +/* + * OMAP3 has 12 GP timers, they can be driven by the system clock + * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). + * This rate is divided by a local divisor. + */ +#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 +#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ + +/* Size of environment - 128KB */ +#define CONFIG_ENV_SIZE (128 << 10) + +/* Size of malloc pool */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) + +/* + * Physical Memory Map + * Note 1: CS1 may or may not be populated + * Note 2: SDRAM size is expected to be at least 32MB + */ +#define CONFIG_NR_DRAM_BANKS 2 +#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 +#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 + +/* Limits for memtest */ +#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) +#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ + 0x01F00000) /* 31MB */ + +/* Default load address */ +#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) + /* ----------------------------------------------------------------------------- - * Include common board configuration + * Hardware drivers * ----------------------------------------------------------------------------- */ -#include "omap3_evm_common.h" + +/* + * NS16550 Configuration + */ +#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ + +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE (-4) +#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK + +/* + * select serial console configuration + */ +#define CONFIG_CONS_INDEX 1 +#define CONFIG_SERIAL1 1 /* UART1 on OMAP3 EVM */ +#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1 +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ + 115200} + +/* + * I2C + */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_OMAP24_I2C_SPEED 100000 +#define CONFIG_SYS_OMAP24_I2C_SLAVE 1 +#define CONFIG_SYS_I2C_OMAP34XX + +/* + * PISMO support + */ +/* Monitor at start of flash - Reserve 2 sectors */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE + +#define CONFIG_SYS_MONITOR_LEN (256 << 10) + +/* Start location & size of environment */ +#define ONENAND_ENV_OFFSET 0x260000 +#define SMNAND_ENV_OFFSET 0x260000 + +#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ + +/* + * NAND + */ +/* Physical address to access NAND */ +#define CONFIG_SYS_NAND_ADDR NAND_BASE + +/* Physical address to access NAND at CS0 */ +#define CONFIG_SYS_NAND_BASE NAND_BASE + +/* Max number of NAND devices */ +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BUSWIDTH_16BIT +/* Timeout values (in ticks) */ +#define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ) +#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ) + +/* Flash banks JFFS2 should use */ +#define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \ + CONFIG_SYS_MAX_NAND_DEVICE) + +#define CONFIG_SYS_JFFS2_MEM_NAND +#define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS +#define CONFIG_SYS_JFFS2_NUM_BANKS 1 + +#define CONFIG_JFFS2_NAND +/* nand device jffs2 lives on */ +#define CONFIG_JFFS2_DEV "nand0" +/* Start of jffs2 partition */ +#define CONFIG_JFFS2_PART_OFFSET 0x680000 +/* Size of jffs2 partition */ +#define CONFIG_JFFS2_PART_SIZE 0xf980000 + +/* + * USB + */ +#ifdef CONFIG_USB_OMAP3 + +#ifdef CONFIG_USB_MUSB_HCD + +#define CONFIG_USB_STORAGE +#define CONGIG_CMD_STORAGE + +#ifdef CONFIG_USB_KEYBOARD +#define CONFIG_SYS_USB_EVENT_POLL +#define CONFIG_PREBOOT "usb start" +#endif /* CONFIG_USB_KEYBOARD */ + +#endif /* CONFIG_USB_MUSB_HCD */ + +#ifdef CONFIG_USB_MUSB_UDC +/* USB device configuration */ +#define CONFIG_USB_DEVICE +#define CONFIG_USB_TTY +#define CONFIG_SYS_CONSOLE_IS_IN_ENV + +/* Change these to suit your needs */ +#define CONFIG_USBD_VENDORID 0x0451 +#define CONFIG_USBD_PRODUCTID 0x5678 +#define CONFIG_USBD_MANUFACTURER "Texas Instruments" +#define CONFIG_USBD_PRODUCT_NAME "EVM" +#endif /* CONFIG_USB_MUSB_UDC */ + +#endif /* CONFIG_USB_OMAP3 */ + +/* ---------------------------------------------------------------------------- + * U-Boot features + * ---------------------------------------------------------------------------- + */ +#define CONFIG_SYS_MAXARGS 16 /* max args for a command */ + +#define CONFIG_MISC_INIT_R + +#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG + +/* Size of Console IO buffer */ +#define CONFIG_SYS_CBSIZE 512 + +/* Size of print buffer */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) + +/* Size of bootarg buffer */ +#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) + +#define CONFIG_BOOTFILE "uImage" + +/* + * NAND / OneNAND + */ +#if defined(CONFIG_CMD_NAND) +#define CONFIG_SYS_FLASH_BASE NAND_BASE + +#define CONFIG_NAND_OMAP_GPMC +#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET +#elif defined(CONFIG_CMD_ONENAND) +#define CONFIG_SYS_FLASH_BASE ONENAND_MAP +#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP +#endif + +#if !defined(CONFIG_ENV_IS_NOWHERE) +#if defined(CONFIG_CMD_NAND) +#define CONFIG_ENV_IS_IN_NAND +#elif defined(CONFIG_CMD_ONENAND) +#define CONFIG_ENV_IS_IN_ONENAND +#define CONFIG_ENV_OFFSET ONENAND_ENV_OFFSET +#endif +#endif /* CONFIG_ENV_IS_NOWHERE */ + +#define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET + +#if defined(CONFIG_CMD_NET) + +/* Ethernet (SMSC9115 from SMSC9118 family) */ +#define CONFIG_SMC911X +#define CONFIG_SMC911X_32_BIT +#define CONFIG_SMC911X_BASE 0x2C000000 + +/* BOOTP fields */ +#define CONFIG_BOOTP_SUBNETMASK 0x00000001 +#define CONFIG_BOOTP_GATEWAY 0x00000002 +#define CONFIG_BOOTP_HOSTNAME 0x00000004 +#define CONFIG_BOOTP_BOOTPATH 0x00000010 + +#endif /* CONFIG_CMD_NET */ + +/* Support for relocation */ +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 +#define CONFIG_SYS_INIT_RAM_SIZE 0x800 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) + +/* ----------------------------------------------------------------------------- + * Board specific + * ----------------------------------------------------------------------------- + */ +#define CONFIG_SYS_NO_FLASH + +/* Uncomment to define the board revision statically */ +/* #define CONFIG_STATIC_BOARD_REV OMAP3EVM_BOARD_GEN_2 */ + +#define CONFIG_SYS_CACHELINE_SIZE 64 + +/* Defines for SPL */ +#define CONFIG_SPL_FRAMEWORK +#define CONFIG_SPL_TEXT_BASE 0x40200800 +#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ + +#define CONFIG_SPL_BSS_START_ADDR 0x80000000 +#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ + +#define CONFIG_SPL_BOARD_INIT +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBDISK_SUPPORT +#define CONFIG_SPL_I2C_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_POWER_SUPPORT +#define CONFIG_SPL_OMAP3_ID_NAND +#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" + +/* + * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM + * 64 bytes before this address should be set aside for u-boot.img's + * header. That is 0x800FFFC0--0x80100000 should not be used for any + * other needs. + */ +#define CONFIG_SYS_TEXT_BASE 0x80100000 +#define CONFIG_SYS_SPL_MALLOC_START 0x80208000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* ----------------------------------------------------------------------------- * Default environment diff --git a/include/configs/omap3_evm_common.h b/include/configs/omap3_evm_common.h deleted file mode 100644 index 01336ff..0000000 --- a/include/configs/omap3_evm_common.h +++ /dev/null @@ -1,286 +0,0 @@ -/* - * Common configuration settings for the TI OMAP3 EVM board. - * - * Copyright (C) 2006-2011 Texas Instruments Incorporated - http://www.ti.com/ - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __OMAP3_EVM_COMMON_H -#define __OMAP3_EVM_COMMON_H - -/* - * High level configuration options - */ -#define CONFIG_OMAP /* This is TI OMAP core */ -#define CONFIG_OMAP_GPIO -#define CONFIG_OMAP_COMMON -/* Common ARM Erratas */ -#define CONFIG_ARM_ERRATA_454179 -#define CONFIG_ARM_ERRATA_430973 -#define CONFIG_ARM_ERRATA_621766 - -#define CONFIG_SDRC /* The chip has SDRC controller */ - -#define CONFIG_OMAP3_EVM /* This is a OMAP3 EVM */ -#define CONFIG_TWL4030_POWER /* with TWL4030 PMIC */ - -/* - * Clock related definitions - */ -#define V_OSCK 26000000 /* Clock output from T2 */ -#define V_SCLK (V_OSCK >> 1) - -/* - * OMAP3 has 12 GP timers, they can be driven by the system clock - * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). - * This rate is divided by a local divisor. - */ -#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 -#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ - -/* Size of environment - 128KB */ -#define CONFIG_ENV_SIZE (128 << 10) - -/* Size of malloc pool */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) - -/* - * Physical Memory Map - * Note 1: CS1 may or may not be populated - * Note 2: SDRAM size is expected to be at least 32MB - */ -#define CONFIG_NR_DRAM_BANKS 2 -#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 -#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 - -/* Limits for memtest */ -#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) -#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ - 0x01F00000) /* 31MB */ - -/* Default load address */ -#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) - -/* ----------------------------------------------------------------------------- - * Hardware drivers - * ----------------------------------------------------------------------------- - */ - -/* - * NS16550 Configuration - */ -#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ - -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE (-4) -#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK - -/* - * select serial console configuration - */ -#define CONFIG_CONS_INDEX 1 -#define CONFIG_SERIAL1 1 /* UART1 on OMAP3 EVM */ -#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1 -#define CONFIG_BAUDRATE 115200 -#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ - 115200} - -/* - * I2C - */ -#define CONFIG_SYS_I2C -#define CONFIG_SYS_OMAP24_I2C_SPEED 100000 -#define CONFIG_SYS_OMAP24_I2C_SLAVE 1 -#define CONFIG_SYS_I2C_OMAP34XX - -/* - * PISMO support - */ -/* Monitor at start of flash - Reserve 2 sectors */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE - -#define CONFIG_SYS_MONITOR_LEN (256 << 10) - -/* Start location & size of environment */ -#define ONENAND_ENV_OFFSET 0x260000 -#define SMNAND_ENV_OFFSET 0x260000 - -#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ - -/* - * NAND - */ -/* Physical address to access NAND */ -#define CONFIG_SYS_NAND_ADDR NAND_BASE - -/* Physical address to access NAND at CS0 */ -#define CONFIG_SYS_NAND_BASE NAND_BASE - -/* Max number of NAND devices */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_BUSWIDTH_16BIT -/* Timeout values (in ticks) */ -#define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ) -#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ) - -/* Flash banks JFFS2 should use */ -#define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \ - CONFIG_SYS_MAX_NAND_DEVICE) - -#define CONFIG_SYS_JFFS2_MEM_NAND -#define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS -#define CONFIG_SYS_JFFS2_NUM_BANKS 1 - -#define CONFIG_JFFS2_NAND -/* nand device jffs2 lives on */ -#define CONFIG_JFFS2_DEV "nand0" -/* Start of jffs2 partition */ -#define CONFIG_JFFS2_PART_OFFSET 0x680000 -/* Size of jffs2 partition */ -#define CONFIG_JFFS2_PART_SIZE 0xf980000 - -/* - * USB - */ -#ifdef CONFIG_USB_OMAP3 - -#ifdef CONFIG_USB_MUSB_HCD - -#define CONFIG_USB_STORAGE -#define CONGIG_CMD_STORAGE - -#ifdef CONFIG_USB_KEYBOARD -#define CONFIG_SYS_USB_EVENT_POLL -#define CONFIG_PREBOOT "usb start" -#endif /* CONFIG_USB_KEYBOARD */ - -#endif /* CONFIG_USB_MUSB_HCD */ - -#ifdef CONFIG_USB_MUSB_UDC -/* USB device configuration */ -#define CONFIG_USB_DEVICE -#define CONFIG_USB_TTY -#define CONFIG_SYS_CONSOLE_IS_IN_ENV - -/* Change these to suit your needs */ -#define CONFIG_USBD_VENDORID 0x0451 -#define CONFIG_USBD_PRODUCTID 0x5678 -#define CONFIG_USBD_MANUFACTURER "Texas Instruments" -#define CONFIG_USBD_PRODUCT_NAME "EVM" -#endif /* CONFIG_USB_MUSB_UDC */ - -#endif /* CONFIG_USB_OMAP3 */ - -/* ---------------------------------------------------------------------------- - * U-Boot features - * ---------------------------------------------------------------------------- - */ -#define CONFIG_SYS_MAXARGS 16 /* max args for a command */ - -#define CONFIG_MISC_INIT_R - -#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_INITRD_TAG -#define CONFIG_REVISION_TAG - -/* Size of Console IO buffer */ -#define CONFIG_SYS_CBSIZE 512 - -/* Size of print buffer */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) - -/* Size of bootarg buffer */ -#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) - -#define CONFIG_BOOTFILE "uImage" - -/* - * NAND / OneNAND - */ -#if defined(CONFIG_CMD_NAND) -#define CONFIG_SYS_FLASH_BASE NAND_BASE - -#define CONFIG_NAND_OMAP_GPMC -#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET -#elif defined(CONFIG_CMD_ONENAND) -#define CONFIG_SYS_FLASH_BASE ONENAND_MAP -#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP -#endif - -#if !defined(CONFIG_ENV_IS_NOWHERE) -#if defined(CONFIG_CMD_NAND) -#define CONFIG_ENV_IS_IN_NAND -#elif defined(CONFIG_CMD_ONENAND) -#define CONFIG_ENV_IS_IN_ONENAND -#define CONFIG_ENV_OFFSET ONENAND_ENV_OFFSET -#endif -#endif /* CONFIG_ENV_IS_NOWHERE */ - -#define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET - -#if defined(CONFIG_CMD_NET) - -/* Ethernet (SMSC9115 from SMSC9118 family) */ -#define CONFIG_SMC911X -#define CONFIG_SMC911X_32_BIT -#define CONFIG_SMC911X_BASE 0x2C000000 - -/* BOOTP fields */ -#define CONFIG_BOOTP_SUBNETMASK 0x00000001 -#define CONFIG_BOOTP_GATEWAY 0x00000002 -#define CONFIG_BOOTP_HOSTNAME 0x00000004 -#define CONFIG_BOOTP_BOOTPATH 0x00000010 - -#endif /* CONFIG_CMD_NET */ - -/* Support for relocation */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 -#define CONFIG_SYS_INIT_RAM_SIZE 0x800 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) - -/* ----------------------------------------------------------------------------- - * Board specific - * ----------------------------------------------------------------------------- - */ -#define CONFIG_SYS_NO_FLASH - -/* Uncomment to define the board revision statically */ -/* #define CONFIG_STATIC_BOARD_REV OMAP3EVM_BOARD_GEN_2 */ - -#define CONFIG_SYS_CACHELINE_SIZE 64 - -/* Defines for SPL */ -#define CONFIG_SPL_FRAMEWORK -#define CONFIG_SPL_TEXT_BASE 0x40200800 -#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ - -#define CONFIG_SPL_BSS_START_ADDR 0x80000000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ - -#define CONFIG_SPL_BOARD_INIT -#define CONFIG_SPL_LIBCOMMON_SUPPORT -#define CONFIG_SPL_LIBDISK_SUPPORT -#define CONFIG_SPL_I2C_SUPPORT -#define CONFIG_SPL_LIBGENERIC_SUPPORT -#define CONFIG_SPL_SERIAL_SUPPORT -#define CONFIG_SPL_POWER_SUPPORT -#define CONFIG_SPL_OMAP3_ID_NAND -#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" - -/* - * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM - * 64 bytes before this address should be set aside for u-boot.img's - * header. That is 0x800FFFC0--0x80100000 should not be used for any - * other needs. - */ -#define CONFIG_SYS_TEXT_BASE 0x80100000 -#define CONFIG_SYS_SPL_MALLOC_START 0x80208000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 - -#endif /* __OMAP3_EVM_COMMON_H */ diff --git a/include/configs/omap3_evm_quick_mmc.h b/include/configs/omap3_evm_quick_mmc.h deleted file mode 100644 index b7d8765..0000000 --- a/include/configs/omap3_evm_quick_mmc.h +++ /dev/null @@ -1,89 +0,0 @@ -/* - * Configuration settings for quick boot from MMC on OMAP3 EVM. - * - * Copyright (C) 2006-2010 Texas Instruments Incorporated - http://www.ti.com/ - * - * Author : - * Sanjeev Premi <premi@ti.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __OMAP3_EVM_QUICK_MMC_H -#define __OMAP3_EVM_QUICK_MMC_H - -#include <asm/arch/cpu.h> -#include <asm/arch/omap.h> - -/* ---------------------------------------------------------------------------- - * Supported U-Boot commands - * ---------------------------------------------------------------------------- - */ - -/* - * Board revision is detected by probing the Ethernet chip. - * - * When revision is statically configured via CONFIG_STATIC_BOARD_REV, - * this option can be removed. Generated binary is leaner by ~16Kbytes. - */ - -/* ---------------------------------------------------------------------------- - * Supported U-Boot features - * ---------------------------------------------------------------------------- - */ -#define CONFIG_SILENT_CONSOLE -#define CONFIG_ENV_IS_NOWHERE - -/* ---------------------------------------------------------------------------- - * Supported hardware - * ---------------------------------------------------------------------------- - */ - -/* MMC */ -#define CONFIG_MMC -#define CONFIG_GENERIC_MMC -#define CONFIG_OMAP_HSMMC -#define CONFIG_DOS_PARTITION - -/* ----------------------------------------------------------------------------- - * Include common board configuration - * ----------------------------------------------------------------------------- - */ -#include "omap3_evm_common.h" - -/* ----------------------------------------------------------------------------- - * Default environment - * ----------------------------------------------------------------------------- - */ - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "verify=no\0" \ - "silent=1" - -#define CONFIG_BOOTCOMMAND \ - "mmc rescan 0; " \ - "fatload mmc 0 0x82000000 uImage; " \ - "bootm 0x82000000;" - -/* - * Update the bootargs as necessary e.g. size of memory, partition and fstype - */ -#define CONFIG_BOOTARGS \ - "quiet " \ - "console=ttyO0,115200n8 " \ - "mem=128M " \ - "noinitrd " \ - "root=/dev/mmcblk0p2 rw " \ - "rootfstype=ext3 rootwait" - -/* - * SPL - */ -#define CONFIG_SPL_MMC_SUPPORT -#define CONFIG_SPL_FAT_SUPPORT -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ -#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ -#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" - -#endif /* __OMAP3_EVM_QUICK_MMC_H */ diff --git a/include/configs/omap3_evm_quick_nand.h b/include/configs/omap3_evm_quick_nand.h deleted file mode 100644 index da5d325..0000000 --- a/include/configs/omap3_evm_quick_nand.h +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Configuration settings for quick boot from NAND on OMAP3 EVM. - * - * Copyright (C) 2006-2010 Texas Instruments Incorporated - http://www.ti.com/ - * - * Author : - * Sanjeev Premi <premi@ti.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __OMAP3_EVM_QUICK_NAND_H -#define __OMAP3_EVM_QUICK_NAND_H - -#include <asm/arch/cpu.h> -#include <asm/arch/omap.h> - -/* ---------------------------------------------------------------------------- - * Supported U-Boot commands - * ---------------------------------------------------------------------------- - */ -#define CONFIG_CMD_NAND - -/* - * Board revision is detected by probing the Ethernet chip. - * - * When revision is statically configured via CONFIG_STATIC_BOARD_REV, - * this option can be removed. Generated binary is leaner by ~16Kbytes. - */ - -/* ---------------------------------------------------------------------------- - * Supported U-Boot features - * ---------------------------------------------------------------------------- - */ -#define CONFIG_SILENT_CONSOLE -#define CONFIG_ENV_IS_NOWHERE - -/* ----------------------------------------------------------------------------- - * Include common board configuration - * ----------------------------------------------------------------------------- - */ -#include "omap3_evm_common.h" - -/* ----------------------------------------------------------------------------- - * Default environment - * ----------------------------------------------------------------------------- - */ - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "verify=no\0" \ - "silent=1" - -#define CONFIG_BOOTCOMMAND \ - "nandecc hw; " \ - "nand read.i 0x80000000 280000 300000; " \ - "bootm 0x80000000;" - -/* - * Update the bootargs as necessary e.g. size of memory, partition and fstype - */ -#define CONFIG_BOOTARGS \ - "quiet " \ - "console=ttyO0,115200n8 " \ - "mem=128M " \ - "noinitrd " \ - "root=/dev/mtdblock4 rw " \ - "rootfstype=jffs2 " - -/* - * SPL - */ -#define CONFIG_SPL_NAND_SIMPLE -#define CONFIG_SPL_NAND_SUPPORT -#define CONFIG_SPL_NAND_BASE -#define CONFIG_SPL_NAND_DRIVERS -#define CONFIG_SPL_NAND_ECC -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_PAGE_COUNT 64 -#define CONFIG_SYS_NAND_PAGE_SIZE 2048 -#define CONFIG_SYS_NAND_OOBSIZE 64 -#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) -#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 -#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ - 10, 11, 12, 13} -#define CONFIG_SYS_NAND_ECCSIZE 512 -#define CONFIG_SYS_NAND_ECCBYTES 3 -#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 - -#endif /* __OMAP3_EVM_QUICK_NAND_H */ diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h index 9bd8915..e0d2593 100644 --- a/include/configs/omap3_igep00x0.h +++ b/include/configs/omap3_igep00x0.h @@ -10,11 +10,8 @@ #ifndef __IGEP00X0_H #define __IGEP00X0_H -#ifdef CONFIG_BOOT_NAND -#define CONFIG_NAND -#endif - #define CONFIG_NR_DRAM_BANKS 2 +#define CONFIG_NAND #include <configs/ti_omap3_common.h> #include <asm/mach-types.h> @@ -76,9 +73,9 @@ #define CONFIG_USBD_MANUFACTURER "Texas Instruments" #define CONFIG_USBD_PRODUCT_NAME "IGEP" -#ifdef CONFIG_BOOT_ONENAND -#define CONFIG_CMD_ONENAND /* ONENAND support */ -#endif +#define CONFIG_CMD_MTDPARTS +#define CONFIG_CMD_ONENAND +#define CONFIG_CMD_UBI #ifndef CONFIG_SPL_BUILD @@ -106,27 +103,6 @@ #endif /* - * FLASH and environment organization - */ - -#ifdef CONFIG_BOOT_ONENAND -#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP - -#define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */ - -#define CONFIG_ENV_IS_IN_ONENAND 1 -#define CONFIG_ENV_SIZE (512 << 10) /* Total Size Environment */ -#define CONFIG_ENV_ADDR ONENAND_ENV_OFFSET -#endif - -#ifdef CONFIG_NAND -#define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */ -#define CONFIG_ENV_IS_IN_NAND 1 -#define CONFIG_ENV_SIZE (512 << 10) /* Total Size Environment */ -#define CONFIG_ENV_ADDR NAND_ENV_OFFSET -#endif - -/* * SMSC911x Ethernet */ #if defined(CONFIG_CMD_NET) @@ -135,19 +111,19 @@ #define CONFIG_SMC911X_BASE 0x2C000000 #endif /* (CONFIG_CMD_NET) */ -/* OneNAND boot config */ -#ifdef CONFIG_BOOT_ONENAND -#define CONFIG_SPL_ONENAND_SUPPORT -#define CONFIG_SYS_ONENAND_U_BOOT_OFFS 0x80000 -#define CONFIG_SYS_ONENAND_PAGE_SIZE 2048 -#define CONFIG_SPL_ONENAND_LOAD_ADDR 0x80000 -#define CONFIG_SPL_ONENAND_LOAD_SIZE \ - (512 * 1024 - CONFIG_SPL_ONENAND_LOAD_ADDR) +#define CONFIG_RBTREE +#define CONFIG_MTD_PARTITIONS +#define CONFIG_SYS_MTDPARTS_RUNTIME -#endif +/* OneNAND config */ +#define CONFIG_SPL_ONENAND_SUPPORT +#define CONFIG_USE_ONENAND_BOARD_INIT +#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP +#define CONFIG_SYS_ONENAND_BLOCK_SIZE (128*1024) -/* NAND boot config */ -#ifdef CONFIG_NAND +/* NAND config */ +#define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_OMAP3_ID_NAND #define CONFIG_SYS_NAND_BUSWIDTH_16BIT #define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_PAGE_COUNT 64 @@ -168,13 +144,29 @@ #define CONFIG_NAND_OMAP_GPMC #define CONFIG_BCH -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 -/* NAND: SPL falcon mode configs */ -#ifdef CONFIG_SPL_OS_BOOT -#define CONFIG_CMD_SPL_NAND_OFS 0x240000 -#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000 -#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000 -#endif -#endif +/* UBI configuration */ +#define CONFIG_SPL_UBI 1 +#define CONFIG_SPL_UBI_MAX_VOL_LEBS 256 +#define CONFIG_SPL_UBI_MAX_PEB_SIZE (256*1024) +#define CONFIG_SPL_UBI_MAX_PEBS 4096 +#define CONFIG_SPL_UBI_VOL_IDS 8 +#define CONFIG_SPL_UBI_LOAD_MONITOR_ID 0 +#define CONFIG_SPL_UBI_LOAD_KERNEL_ID 3 +#define CONFIG_SPL_UBI_LOAD_ARGS_ID 4 +#define CONFIG_SPL_UBI_PEB_OFFSET 4 +#define CONFIG_SPL_UBI_VID_OFFSET 512 +#define CONFIG_SPL_UBI_LEB_START 2048 +#define CONFIG_SPL_UBI_INFO_ADDR 0x88080000 + +/* environment organization */ +#define CONFIG_ENV_IS_IN_UBI 1 +#define CONFIG_ENV_UBI_PART "UBI" +#define CONFIG_ENV_UBI_VOLUME "config" +#define CONFIG_ENV_UBI_VOLUME_REDUND "config_r" +#define CONFIG_UBI_SILENCE_MSG 1 +#define CONFIG_UBIFS_SILENCE_MSG 1 +#define CONFIG_ENV_SIZE (32*1024) + +#undef CONFIG_SPL_EXT_SUPPORT #endif /* __IGEP00X0_H */ diff --git a/include/configs/omap4_panda.h b/include/configs/omap4_panda.h index 0d62ccd..ffa22c3 100644 --- a/include/configs/omap4_panda.h +++ b/include/configs/omap4_panda.h @@ -17,7 +17,6 @@ */ /* USB UHH support options */ -#define CONFIG_USB_HOST #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_OMAP #define CONFIG_USB_STORAGE diff --git a/include/configs/omap5_uevm.h b/include/configs/omap5_uevm.h index 4ddc492..2bf955a 100644 --- a/include/configs/omap5_uevm.h +++ b/include/configs/omap5_uevm.h @@ -88,7 +88,6 @@ #define CONFIG_SYS_I2C_TCA642X_ADDR 0x22 /* USB UHH support options */ -#define CONFIG_USB_HOST #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_OMAP #define CONFIG_USB_STORAGE diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index 1f36d36..d00cf50 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -203,7 +203,7 @@ #define CONFIG_REVISION_TAG #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_BOOTARGS "console=ttyS2,115200n8 root=/dev/mmcblk0p2 rw rootwait ip=off" -#define CONFIG_BOOTCOMMAND "if mmc rescan 0; then if fatload mmc 0 0xc0600000 boot.scr; then source 0xc0600000; else fatload mmc 0 0xc0700000 uImage; bootm c0700000; fi; else sf probe 0; sf read 0xc0700000 0x80000 0x220000; bootm 0xc0700000; fi" +#define CONFIG_BOOTCOMMAND "if mmc rescan; then if fatload mmc 0 0xc0600000 boot.scr; then source 0xc0600000; else fatload mmc 0 0xc0700000 uImage; bootm c0700000; fi; else sf probe 0; sf read 0xc0700000 0x80000 0x220000; bootm 0xc0700000; fi" /* * U-Boot commands diff --git a/include/configs/openrisc-generic.h b/include/configs/openrisc-generic.h index 913256a..227c0ca 100644 --- a/include/configs/openrisc-generic.h +++ b/include/configs/openrisc-generic.h @@ -44,7 +44,6 @@ /* * Ethernet */ -#define CONFIG_ETHOC #define CONFIG_SYS_ETHOC_BASE 0x92000000 #define CONFIG_BOOTFILE "boot.img" diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 4f22d12..5d0a570 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -12,10 +12,6 @@ #define CONFIG_DISPLAY_BOARDINFO -#ifdef CONFIG_36BIT -#define CONFIG_PHYS_64BIT -#endif - #if defined(CONFIG_P1020MBG) #define CONFIG_BOARDNAME "P1020MBG-PC" #define CONFIG_P1020 @@ -989,7 +985,7 @@ i2c mw 18 3 __SW_BOOT_MASK 1; reset "consoledev=ttyS0\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=rootfs.ext2.gz.uboot\0" \ -"fdtaddr=c00000\0" \ +"fdtaddr=1e00000\0" \ "bdev=sda1\0" \ "jffs2nor=mtdblock3\0" \ "norbootaddr=ef080000\0" \ diff --git a/include/configs/p1_twr.h b/include/configs/p1_twr.h index 30bfbf4..79e4991 100644 --- a/include/configs/p1_twr.h +++ b/include/configs/p1_twr.h @@ -513,7 +513,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); "consoledev=ttyS0\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=rootfs.ext2.gz.uboot\0" \ -"fdtaddr=c00000\0" \ +"fdtaddr=1e00000\0" \ "bdev=sda1\0" \ "norbootaddr=ef080000\0" \ "norfdtaddr=ef040000\0" \ diff --git a/include/configs/p2771-0000.h b/include/configs/p2771-0000.h index 257283f..1f64405 100644 --- a/include/configs/p2771-0000.h +++ b/include/configs/p2771-0000.h @@ -14,6 +14,9 @@ /* High-level configuration options */ #define CONFIG_TEGRA_BOARD_STRING "NVIDIA P2771-0000" +/* I2C */ +#define CONFIG_SYS_I2C_TEGRA + /* SD/MMC */ #define CONFIG_MMC #define CONFIG_GENERIC_MMC @@ -25,6 +28,11 @@ #define CONFIG_SYS_MMC_ENV_PART 2 #define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) +/* PCI host support */ +#define CONFIG_PCI +#define CONFIG_PCI_PNP +#define CONFIG_CMD_PCI + #include "tegra-common-post.h" /* Crystal is 38.4MHz. clk_m runs at half that rate */ diff --git a/include/configs/pcm058.h b/include/configs/pcm058.h new file mode 100644 index 0000000..97cbeba --- /dev/null +++ b/include/configs/pcm058.h @@ -0,0 +1,140 @@ +/* + * Copyright (C) Stefano Babic <sbabic@denx.de> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + + +#ifndef __PCM058_CONFIG_H +#define __PCM058_CONFIG_H + +#include <config_distro_defaults.h> + +#ifdef CONFIG_SPL +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_YMODEM_SUPPORT +#define CONFIG_SPL_MMC_SUPPORT +#define CONFIG_SPL_DMA_SUPPORT +#define CONFIG_SPL_SPI_SUPPORT +#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_LOAD +#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) +#include "imx6_spl.h" +#endif + +#include "mx6_common.h" + +/* Thermal */ +#define CONFIG_IMX_THERMAL + +/* Serial */ +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART2_BASE +#define CONFIG_CONSOLE_DEV "ttymxc1" + +#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) + +/* Early setup */ +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_LATE_INIT +#define CONFIG_DISPLAY_BOARDINFO_LATE + + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (8 * SZ_1M) + +/* Ethernet */ +#define CONFIG_FEC_MXC +#define CONFIG_MII +#define IMX_FEC_BASE ENET_BASE_ADDR +#define CONFIG_FEC_XCV_TYPE RGMII +#define CONFIG_ETHPRIME "FEC" +#define CONFIG_FEC_MXC_PHYADDR 3 + +#define CONFIG_PHYLIB +#define CONFIG_PHY_MICREL +#define CONFIG_PHY_KSZ9031 + +/* SPI Flash */ +#define CONFIG_MXC_SPI +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS 0 +#define CONFIG_SF_DEFAULT_SPEED 20000000 +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 + +/* I2C Configs */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 2 */ +#define CONFIG_SYS_I2C_SPEED 100000 + +#ifndef CONFIG_SPL_BUILD +#define CONFIG_CMD_NAND +/* Enable NAND support */ +#define CONFIG_CMD_NAND_TRIMFFS +#define CONFIG_NAND_MXS +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0x40000000 +#define CONFIG_SYS_NAND_5_ADDR_CYCLE +#define CONFIG_SYS_NAND_ONFI_DETECTION +#endif + +/* DMA stuff, needed for GPMI/MXS NAND support */ +#define CONFIG_APBH_DMA +#define CONFIG_APBH_DMA_BURST +#define CONFIG_APBH_DMA_BURST8 + +/* Filesystem support */ +#define CONFIG_LZO +#define CONFIG_CMD_UBIFS +#define CONFIG_CMD_MTDPARTS +#define CONFIG_MTD_PARTITIONS +#define CONFIG_MTD_DEVICE +#define MTDIDS_DEFAULT "nand0=nand" +#define MTDPARTS_DEFAULT "mtdparts=nand:16m(uboot),1m(env),-(rootfs)" + +/* Various command support */ +#define CONFIG_CMD_BMODE /* set eFUSE shadow for a boot dev and reset */ +#define CONFIG_CMD_HDMIDETECT /* detect HDMI output device */ +#define CONFIG_CMD_GSC +#define CONFIG_CMD_EECONFIG /* Gateworks EEPROM config cmd */ +#define CONFIG_CMD_UBI +#define CONFIG_RBTREE + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* MMC Configs */ +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_USDHC_NUM 1 + +/* Environment organization */ +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_SIZE (16 * 1024) +#define CONFIG_ENV_OFFSET (1024 * SZ_1K) +#define CONFIG_ENV_SECT_SIZE (64 * SZ_1K) +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#define CONFIG_SYS_REDUNDAND_ENVIRONMENT +#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ + CONFIG_ENV_SECT_SIZE) +#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE + +#ifdef CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_OFFSET (0x1E0000) +#define CONFIG_ENV_SECT_SIZE (128 * SZ_1K) +#endif + +#endif diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h index d848ead..ca3c30b 100644 --- a/include/configs/pico-imx6ul.h +++ b/include/configs/pico-imx6ul.h @@ -17,8 +17,18 @@ #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO +/* Network support */ + +#define CONFIG_FEC_MXC +#define CONFIG_MII +#define IMX_FEC_BASE ENET2_BASE_ADDR +#define CONFIG_FEC_MXC_PHYADDR 0x1 +#define CONFIG_FEC_XCV_TYPE RMII +#define CONFIG_PHYLIB +#define CONFIG_PHY_MICREL + /* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M) +#define CONFIG_SYS_MALLOC_LEN (35 * SZ_1M) /* Increase due to DFU */ #define CONFIG_BOARD_EARLY_INIT_F @@ -42,24 +52,17 @@ #define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Only OTG1 port enabled */ +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 -#define CONFIG_CI_UDC #define CONFIG_USBD_HS -#define CONFIG_USB_GADGET_DUALSPEED -#define CONFIG_USB_GADGET #define CONFIG_USB_FUNCTION_MASS_STORAGE -#define CONFIG_USB_GADGET_DOWNLOAD #define CONFIG_USB_GADGET_VBUS_DRAW 2 -#define CONFIG_G_DNL_VENDOR_NUM 0x0525 -#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 -#define CONFIG_G_DNL_MANUFACTURER "FSL" - -#define CONFIG_G_DNL_VENDOR_NUM 0x0525 -#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 -#define CONFIG_G_DNL_MANUFACTURER "FSL" +#define CONFIG_USB_FUNCTION_DFU +#define CONFIG_DFU_MMC +#define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_16M +#define DFU_DEFAULT_POLL_TIMEOUT 300 #define CONFIG_DEFAULT_FDT_FILE "imx6ul-pico-hobbit.dtb" @@ -76,6 +79,7 @@ "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ "mmcautodetect=yes\0" \ + "dfu_alt_info=boot raw 0x2 0x400 mmcpart 1\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ "root=${mmcroot}\0" \ "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ @@ -86,7 +90,31 @@ "bootz ${loadaddr} - ${fdt_addr}; " \ "else " \ "echo WARN: Cannot load the DT; " \ - "fi;\0" + "fi;\0" \ + "netargs=setenv bootargs console=${console},${baudrate} " \ + "root=/dev/nfs " \ + "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ + "netboot=echo Booting from net ...; " \ + "run netargs; " \ + "if test ${ip_dyn} = yes; then " \ + "setenv get_cmd dhcp; " \ + "else " \ + "setenv get_cmd tftp; " \ + "fi; " \ + "${get_cmd} ${image}; " \ + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ + "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ + "bootz ${loadaddr} - ${fdt_addr}; " \ + "else " \ + "if test ${boot_fdt} = try; then " \ + "bootz; " \ + "else " \ + "echo WARN: Cannot load the DT; " \ + "fi; " \ + "fi; " \ + "else " \ + "bootz; " \ + "fi;\0" \ #define CONFIG_BOOTCOMMAND \ "if mmc rescan; then " \ @@ -118,6 +146,18 @@ #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) +/* I2C configs */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_MXC_I2C1 +#define CONFIG_SYS_I2C_SPEED 100000 + +/* PMIC */ +#define CONFIG_POWER +#define CONFIG_POWER_I2C +#define CONFIG_POWER_PFUZE3000 +#define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 + /* FLASH and environment organization */ #define CONFIG_SYS_NO_FLASH diff --git a/include/configs/popmetal_rk3288.h b/include/configs/popmetal_rk3288.h new file mode 100644 index 0000000..342557f --- /dev/null +++ b/include/configs/popmetal_rk3288.h @@ -0,0 +1,26 @@ +/* + * (C) Copyright 2016 Rockchip Electronics Co., Ltd + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define ROCKCHIP_DEVICE_SETTINGS +#include <configs/rk3288_common.h> + +#define CONFIG_SPL_MMC_SUPPORT + +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 1 +/* SPL @ 32k for ~36k + * ENV @ 96k + * u-boot @ 128K + */ +#define CONFIG_ENV_OFFSET (96 * 1024) + +#define CONFIG_SYS_WHITE_ON_BLACK +#define CONFIG_CONSOLE_SCROLL_LINES 10 + +#endif diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h index 0b86402..072859e 100644 --- a/include/configs/qemu-ppce500.h +++ b/include/configs/qemu-ppce500.h @@ -56,8 +56,6 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void); #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR #endif -#define CONFIG_PHYS_64BIT - /* Virtual address range for PCI region maps */ #define CONFIG_SYS_PCI_MAP_START 0x80000000 #define CONFIG_SYS_PCI_MAP_END 0xe8000000 diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-common.h index 89cde20..f9e5f59 100644 --- a/include/configs/rcar-gen3-common.h +++ b/include/configs/rcar-gen3-common.h @@ -12,7 +12,6 @@ #include <asm/arch/rmobile.h> -#define CONFIG_CMD_BOOTI #define CONFIG_CMD_DFL #define CONFIG_CMD_SDRAM #define CONFIG_CMD_FAT diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h index 1bdcf9d..21d4683 100644 --- a/include/configs/rk3036_common.h +++ b/include/configs/rk3036_common.h @@ -6,7 +6,7 @@ #ifndef __CONFIG_RK3036_COMMON_H #define __CONFIG_RK3036_COMMON_H -#define CONFIG_SYS_CACHELINE_SIZE 32 +#define CONFIG_SYS_CACHELINE_SIZE 64 #include <asm/arch/hardware.h> @@ -40,16 +40,12 @@ #define CONFIG_ROCKCHIP_MAX_INIT_SIZE (4 << 10) #define CONFIG_ROCKCHIP_CHIP_TAG "RK30" -#define CONFIG_ROCKCHIP_COMMON - /* MMC/SD IP block */ #define CONFIG_MMC #define CONFIG_GENERIC_MMC -#define CONFIG_SDHCI #define CONFIG_DWMMC #define CONFIG_BOUNCE_BUFFER -#define CONFIG_DOS_PARTITION #define CONFIG_FAT_WRITE #define CONFIG_PARTITION_UUIDS #define CONFIG_CMD_PART @@ -64,6 +60,25 @@ #define CONFIG_SF_DEFAULT_SPEED 20000000 #ifndef CONFIG_SPL_BUILD +/* usb otg */ +#define CONFIG_USB_GADGET +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_GADGET_DWC2_OTG +#define CONFIG_USB_GADGET_VBUS_DRAW 0 + +/* fastboot */ +#define CONFIG_CMD_FASTBOOT +#define CONFIG_USB_FUNCTION_FASTBOOT +#define CONFIG_FASTBOOT_FLASH +#define CONFIG_FASTBOOT_FLASH_MMC_DEV 0 +#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR +#define CONFIG_FASTBOOT_BUF_SIZE 0x08000000 + +#define CONFIG_USB_GADGET_DOWNLOAD +#define CONFIG_G_DNL_MANUFACTURER "Rockchip" +#define CONFIG_G_DNL_VENDOR_NUM 0x2207 +#define CONFIG_G_DNL_PRODUCT_NUM 0x310a + #include <config_distro_defaults.h> #define ENV_MEM_LAYOUT_SETTINGS \ diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index 9d50d83..d3d4c68 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -33,15 +33,17 @@ #define CONFIG_SYS_NS16550_MEM32 #define CONFIG_SPL_BOARD_INIT +#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM +/* Bootrom will load u-boot binary to 0x0 once return from SPL */ +#define CONFIG_SYS_TEXT_BASE 0x00000000 +#else #define CONFIG_SYS_TEXT_BASE 0x00100000 +#endif #define CONFIG_SYS_INIT_SP_ADDR 0x00100000 #define CONFIG_SYS_LOAD_ADDR 0x00800800 #define CONFIG_SPL_STACK 0xff718000 #define CONFIG_SPL_TEXT_BASE 0xff704004 -#define CONFIG_ROCKCHIP_COMMON -#define CONFIG_SPL_ROCKCHIP_COMMON - #define CONFIG_SILENT_CONSOLE #ifndef CONFIG_SPL_BUILD # define CONFIG_SYS_CONSOLE_IS_IN_ENV @@ -51,11 +53,9 @@ /* MMC/SD IP block */ #define CONFIG_MMC #define CONFIG_GENERIC_MMC -#define CONFIG_SDHCI #define CONFIG_DWMMC #define CONFIG_BOUNCE_BUFFER -#define CONFIG_DOS_PARTITION #define CONFIG_FAT_WRITE #define CONFIG_PARTITION_UUIDS #define CONFIG_CMD_PART @@ -81,6 +81,33 @@ #define CONFIG_SF_DEFAULT_SPEED 20000000 #ifndef CONFIG_SPL_BUILD +/* usb otg */ +#define CONFIG_USB_GADGET +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_GADGET_DWC2_OTG +#define CONFIG_ROCKCHIP_USB2_PHY +#define CONFIG_USB_GADGET_VBUS_DRAW 0 + +/* fastboot */ +#define CONFIG_CMD_FASTBOOT +#define CONFIG_USB_FUNCTION_FASTBOOT +#define CONFIG_FASTBOOT_FLASH +#define CONFIG_FASTBOOT_FLASH_MMC_DEV 1 /* eMMC */ +#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR +#define CONFIG_FASTBOOT_BUF_SIZE 0x08000000 + +/* usb mass storage */ +#define CONFIG_USB_FUNCTION_MASS_STORAGE +#define CONFIG_CMD_USB_MASS_STORAGE + +#define CONFIG_USB_GADGET_DOWNLOAD +#define CONFIG_G_DNL_MANUFACTURER "Rockchip" +#define CONFIG_G_DNL_VENDOR_NUM 0x2207 +#define CONFIG_G_DNL_PRODUCT_NUM 0x320a + +/* Enable gpt partition table */ +#define CONFIG_CMD_GPT + #include <config_distro_defaults.h> #define ENV_MEM_LAYOUT_SETTINGS \ @@ -90,6 +117,12 @@ "kernel_addr_r=0x02000000\0" \ "ramdisk_addr_r=0x04000000\0" +#define CONFIG_RANDOM_UUID +#define PARTS_DEFAULT \ + "uuid_disk=${uuid_gpt_disk};" \ + "name=boot,start=8M,size=64M,bootable,uuid=${uuid_gpt_boot};" \ + "name=rootfs,size=-,uuid=${uuid_gpt_rootfs};\0" \ + /* First try to boot from SD (index 0), then eMMC (index 1 */ #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ @@ -102,6 +135,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "fdt_high=0x1fffffff\0" \ "initrd_high=0x1fffffff\0" \ + "partitions=" PARTS_DEFAULT \ ENV_MEM_LAYOUT_SETTINGS \ ROCKCHIP_DEVICE_SETTINGS \ BOOTENV diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h new file mode 100644 index 0000000..6875308 --- /dev/null +++ b/include/configs/rk3399_common.h @@ -0,0 +1,88 @@ +/* + * (C) Copyright 2016 Rockchip Electronics Co., Ltd + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_RK3399_COMMON_H +#define __CONFIG_RK3399_COMMON_H + +#define CONFIG_SYS_CACHELINE_SIZE 64 + +#define CONFIG_SYS_NO_FLASH +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_ENV_SIZE 0x2000 +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_BAUDRATE 1500000 +#define CONFIG_SYS_MALLOC_LEN (32 << 20) +#define CONFIG_SYS_CBSIZE 1024 +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_DISPLAY_BOARDINFO + +#define CONFIG_SYS_NS16550_MEM32 + +#define CONFIG_SYS_TEXT_BASE 0x00200000 +#define CONFIG_SYS_INIT_SP_ADDR 0x00300000 +#define CONFIG_SYS_LOAD_ADDR 0x00800800 + +#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ + +/* MMC/SD IP block */ +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_DWMMC +#define CONFIG_SDHCI +#define CONFIG_BOUNCE_BUFFER +#define CONFIG_ROCKCHIP_SDHCI_MAX_FREQ 200000000 + +#define CONFIG_SUPPORT_VFAT +#define CONFIG_FS_FAT +#define CONFIG_FAT_WRITE +#define CONFIG_FS_EXT4 +#define CONFIG_CMD_PART + +/* RAW SD card / eMMC locations. */ +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 256 +#define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10) + +/* FAT sd card locations. */ +#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 +#define CONFIG_SYS_SDRAM_BASE 0 +#define CONFIG_NR_DRAM_BANKS 1 + +#define CONFIG_SPI_FLASH +#define CONFIG_SPI +#define CONFIG_SF_DEFAULT_SPEED 20000000 + +#ifndef CONFIG_SPL_BUILD +#include <config_distro_defaults.h> + +#define ENV_MEM_LAYOUT_SETTINGS \ + "scriptaddr=0x00000000\0" \ + "pxefile_addr_r=0x00100000\0" \ + "fdt_addr_r=0x01f00000\0" \ + "kernel_addr_r=0x02000000\0" \ + "ramdisk_addr_r=0x04000000\0" + +#define CONFIG_CMD_GPT +#define CONFIG_RANDOM_UUID +#define CONFIG_PARTITION_UUIDS +#define PARTS_DEFAULT \ + "uuid_disk=${uuid_gpt_disk};" \ + "name=boot,start=16M,size=32M,bootable;" \ + "name=rootfs,size=-,uuid=${uuid_gpt_rootfs};\0" \ + +/* First try to boot from SD (index 0), then eMMC (index 1) */ +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) \ + func(MMC, mmc, 1) + +#include <config_distro_bootcmd.h> +#define CONFIG_EXTRA_ENV_SETTINGS \ + ENV_MEM_LAYOUT_SETTINGS \ + "partitions=" PARTS_DEFAULT \ + BOOTENV + +#endif + +#endif diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index 23a0c40..94e024b 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -16,8 +16,10 @@ #endif +#ifndef CONFIG_SPL_BUILD #define CONFIG_IO_TRACE #define CONFIG_CMD_IOTRACE +#endif #ifndef CONFIG_TIMER #define CONFIG_SYS_TIMER_RATE 1000000 @@ -25,7 +27,10 @@ #define CONFIG_SYS_STDIO_DEREGISTER -/* Number of bits in a C 'long' on this architecture */ +/* + * Number of bits in a C 'long' on this architecture. Set this to 32 when + * building on a 32-bit machine. + */ #define CONFIG_SANDBOX_BITS_PER_LONG 64 #define CONFIG_LMB @@ -80,7 +85,6 @@ #define CONFIG_CMD_SF_TEST #define CONFIG_I2C_EDID -#define CONFIG_I2C_EEPROM /* Memory things - we don't really want a memory test */ #define CONFIG_SYS_LOAD_ADDR 0x00000000 @@ -192,6 +196,7 @@ #define CONFIG_CMD_LZMADEC #define CONFIG_CMD_DATE +#ifndef CONFIG_SPL_BUILD #define CONFIG_CMD_IDE #define CONFIG_SYS_IDE_MAXBUS 1 #define CONFIG_SYS_ATA_IDE0_OFFSET 0 @@ -201,6 +206,7 @@ #define CONFIG_SYS_ATA_REG_OFFSET 1 #define CONFIG_SYS_ATA_ALT_OFFSET 2 #define CONFIG_SYS_ATA_STRIDE 4 +#endif #define CONFIG_SCSI #define CONFIG_SCSI_AHCI_PLAT diff --git a/include/configs/sandbox_spl.h b/include/configs/sandbox_spl.h new file mode 100644 index 0000000..ffc3098 --- /dev/null +++ b/include/configs/sandbox_spl.h @@ -0,0 +1,20 @@ +/* + * Copyright (c) 2016 Google, Inc + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __SANDBOX_SPL_CONFIG_H +#define __SANDBOX_SPL_CONFIG_H + +#include <configs/sandbox.h> + +#define CONFIG_SPL_BOARD_INIT + +#define CONFIG_SPL_DRIVERS_MISC_SUPPORT +#define CONFIG_SPL_ENV_SUPPORT +#define CONFIG_SPL_FRAMEWORK +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT + +#endif diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h index 46766a6..ec9ad45 100644 --- a/include/configs/sbc8548.h +++ b/include/configs/sbc8548.h @@ -595,7 +595,7 @@ "consoledev=ttyS0\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=uRamdisk\0" \ -"fdtaddr=c00000\0" \ +"fdtaddr=1e00000\0" \ "fdtfile=sbc8548.dtb\0" #define CONFIG_NFSBOOTCOMMAND \ diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index 6add391..076a5ce 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -122,6 +122,7 @@ * */ #define CONFIG_MACB +#define CONFIG_PHYLIB #define CONFIG_USB_HOST_ETHER #define CONFIG_USB_ETHER_ASIX #define CONFIG_USB_ETHER_MCS7830 diff --git a/include/configs/snapper9g45.h b/include/configs/snapper9g45.h index fd6c70e..c91ab71 100644 --- a/include/configs/snapper9g45.h +++ b/include/configs/snapper9g45.h @@ -56,6 +56,7 @@ /* Ethernet */ #define CONFIG_MACB +#define CONFIG_PHYLIB #define CONFIG_RMII #define CONFIG_NET_RETRY_COUNT 20 #define CONFIG_RESET_PHY_R diff --git a/include/configs/som-db5800-som-6867.h b/include/configs/som-db5800-som-6867.h new file mode 100644 index 0000000..a4b343e --- /dev/null +++ b/include/configs/som-db5800-som-6867.h @@ -0,0 +1,36 @@ +/* + * Copyright (C) 2015 Google, Inc + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/* + * board/config.h - configuration options, board specific + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <configs/x86-common.h> + +#define CONFIG_SYS_MONITOR_LEN (1 << 20) +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_ARCH_EARLY_INIT_R +#define CONFIG_ARCH_MISC_INIT + +#define CONFIG_PCI_PNP +#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,usbkbd,vga\0" \ + "stdout=serial,vga\0" \ + "stderr=serial,vga\0" + +#define CONFIG_SCSI_DEV_LIST \ + {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA}, \ + {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT} + +#define VIDEO_IO_OFFSET 0 +#define CONFIG_X86EMU_RAW_IO + +#define CONFIG_ENV_SECT_SIZE 0x1000 +#define CONFIG_ENV_OFFSET 0x006ef000 + +#endif /* __CONFIG_H */ diff --git a/include/configs/stm32f746-disco.h b/include/configs/stm32f746-disco.h index e544a21..4391bff 100644 --- a/include/configs/stm32f746-disco.h +++ b/include/configs/stm32f746-disco.h @@ -24,13 +24,13 @@ * Configuration of the external SDRAM memory */ #define CONFIG_NR_DRAM_BANKS 1 -#define CONFIG_SYS_RAM_SIZE ((64 + 192) << 10) +#define CONFIG_SYS_RAM_SIZE (8 * 1024 * 1024) #define CONFIG_SYS_RAM_CS 1 #define CONFIG_SYS_RAM_FREQ_DIV 2 -#define CONFIG_SYS_RAM_BASE 0x20000000 +#define CONFIG_SYS_RAM_BASE 0xC0000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_RAM_BASE -#define CONFIG_SYS_LOAD_ADDR 0x20000000 -#define CONFIG_LOADADDR 0x20000000 +#define CONFIG_SYS_LOAD_ADDR 0xC0400000 +#define CONFIG_LOADADDR 0xC0400000 #define CONFIG_SYS_MAX_FLASH_SECT 8 #define CONFIG_SYS_MAX_FLASH_BANKS 1 @@ -42,7 +42,8 @@ #define CONFIG_STM32_FLASH #define CONFIG_STM32X7_SERIAL -#define CONFIG_SYS_CLK_FREQ 16*1000*1000 /* 180 MHz */ +#define CONFIG_STM32_HSE_HZ 25000000 +#define CONFIG_SYS_CLK_FREQ 200000000 /* 200 MHz */ #define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */ #define CONFIG_CMDLINE_TAG diff --git a/include/configs/sun6i.h b/include/configs/sun6i.h index 95ccc35..0625502 100644 --- a/include/configs/sun6i.h +++ b/include/configs/sun6i.h @@ -25,6 +25,7 @@ #define CONFIG_ARMV7_PSCI 1 #define CONFIG_ARMV7_PSCI_NR_CPUS 4 #define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE +#define CONFIG_ARMV7_SECURE_MAX_SIZE (64 * 1024) /* 64 KB */ /* * Include common sunxi configuration where most the settings are diff --git a/include/configs/sun7i.h b/include/configs/sun7i.h index 0dd2902..e9074d5 100644 --- a/include/configs/sun7i.h +++ b/include/configs/sun7i.h @@ -21,7 +21,9 @@ #define CONFIG_SUNXI_USB_PHYS 3 #define CONFIG_ARMV7_PSCI 1 +#define CONFIG_ARMV7_PSCI_NR_CPUS 2 #define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE +#define CONFIG_ARMV7_SECURE_MAX_SIZE (64 * 1024) /* 64 KB */ /* * Include common sunxi configuration where most the settings are diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 94275a7..b9aa62b 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -134,7 +134,15 @@ #define CONFIG_SERIAL_TAG #ifdef CONFIG_NAND_SUNXI +#define CONFIG_SYS_NAND_MAX_ECCPOS 1664 #define CONFIG_SPL_NAND_SUPPORT 1 +#define CONFIG_SYS_NAND_ONFI_DETECTION +#define CONFIG_SYS_MAX_NAND_DEVICE 8 +#endif + +#ifdef CONFIG_SPL_SPI_SUNXI +#define CONFIG_SPL_SPI_FLASH_SUPPORT 1 +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000 #endif /* mmc config */ diff --git a/include/configs/taurus.h b/include/configs/taurus.h index 882a4e5..2d091db 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -99,6 +99,7 @@ /* Ethernet */ #define CONFIG_MACB +#define CONFIG_PHYLIB #define CONFIG_RMII #define CONFIG_AT91_WANTS_COMMON_PHY diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h index ba7cf15..9f947ee 100644 --- a/include/configs/ti_armv7_common.h +++ b/include/configs/ti_armv7_common.h @@ -108,9 +108,25 @@ /* Timer information. */ #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ +/* + * Disable DM_* for SPL build and can be re-enabled after adding + * DM support in SPL + */ +#ifdef CONFIG_SPL_BUILD +#undef CONFIG_DM_I2C +#endif + /* I2C IP block */ #define CONFIG_I2C +#ifndef CONFIG_DM_I2C #define CONFIG_SYS_I2C +#else +/* + * Enable CONFIG_DM_I2C_COMPAT temporarily until all the i2c client + * devices are adopted to DM + */ +#define CONFIG_DM_I2C_COMPAT +#endif /* MMC/SD IP block */ #define CONFIG_MMC diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index 2ee26c4..4aa262e 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -89,6 +89,10 @@ #define CONFIG_SYS_SPI2 #define CONFIG_SYS_SPI2_BASE KS2_SPI2_BASE #define CONFIG_SYS_SPI2_NUM_CS 4 +#ifdef CONFIG_SPL_BUILD +#undef CONFIG_DM_SPI +#undef CONFIG_DM_SPI_FLASH +#endif /* Network Configuration */ #define CONFIG_PHYLIB diff --git a/include/configs/trimslice.h b/include/configs/trimslice.h index b761640..9d49f63 100644 --- a/include/configs/trimslice.h +++ b/include/configs/trimslice.h @@ -37,7 +37,8 @@ #define CONFIG_ENV_SPI_MAX_HZ 48000000 #define CONFIG_ENV_SPI_MODE SPI_MODE_0 #define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE -#define CONFIG_ENV_OFFSET (512 * 1024) +/* 1MiB flash, environment located as high as possible */ +#define CONFIG_ENV_OFFSET (SZ_1M - CONFIG_ENV_SIZE) /* USB Host support */ #define CONFIG_USB_EHCI diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 4ebaf84..0f5b20f 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -1,5 +1,7 @@ /* - * Copyright (C) 2012-2015 Masahiro Yamada <yamada.masahiro@socionext.com> + * Copyright (C) 2012-2015 Panasonic Corporation + * Copyright (C) 2015-2016 Socionext Inc. + * Author: Masahiro Yamada <yamada.masahiro@socionext.com> * * SPDX-License-Identifier: GPL-2.0+ */ @@ -9,7 +11,9 @@ #ifndef __CONFIG_UNIPHIER_COMMON_H__ #define __CONFIG_UNIPHIER_COMMON_H__ -#define CONFIG_I2C_EEPROM +#define CONFIG_ARMV7_PSCI +#define CONFIG_ARMV7_PSCI_NR_CPUS 4 + #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 #define CONFIG_SMC911X @@ -26,10 +30,11 @@ /* #define CONFIG_SYS_ICACHE_OFF */ /* #define CONFIG_SYS_DCACHE_OFF */ +#ifdef CONFIG_CACHE_UNIPHIER +#define CONFIG_SYS_CACHELINE_SIZE 128 +#else #define CONFIG_SYS_CACHELINE_SIZE 32 - -/* Comment out the following to disable L2 cache */ -#define CONFIG_UNIPHIER_L2CACHE_ON +#endif #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO @@ -184,7 +189,6 @@ "__nfsboot=run tftpboot\0" #else #ifdef CONFIG_ARM64 -#define CONFIG_CMD_BOOTI #define CONFIG_BOOTFILE "Image" #define LINUXBOOT_CMD "booti" #define KERNEL_ADDR_R "kernel_addr_r=0x80080000\0" @@ -226,7 +230,6 @@ "run boot_common\0" \ "__nfsboot=tftpboot $kernel_addr_r $bootfile &&" \ "tftpboot $fdt_addr_r $fdt_file &&" \ - "tftpboot $fdt_addr_r $fdt_file &&" \ "setenv ramdisk_addr_r - &&" \ "run boot_common\0" #endif diff --git a/include/configs/usbarmory.h b/include/configs/usbarmory.h index 8568663..5484204 100644 --- a/include/configs/usbarmory.h +++ b/include/configs/usbarmory.h @@ -17,16 +17,13 @@ #define CONFIG_SYS_FSL_CLK #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_MXC_GPIO +#define CONFIG_SYS_NO_FLASH #include <asm/arch/imx-regs.h> #include <config_distro_defaults.h> -/* U-Boot commands */ - /* U-Boot environment */ -#define CONFIG_ENV_OVERWRITE -#define CONFIG_SYS_NO_FLASH #define CONFIG_ENV_OFFSET (6 * 64 * 1024) #define CONFIG_ENV_SIZE (8 * 1024) #define CONFIG_ENV_IS_IN_MMC @@ -69,17 +66,19 @@ #define CONFIG_CMD_FUSE #define CONFIG_FSL_IIM -/* Linux boot */ +/* U-Boot memory offsets */ #define CONFIG_LOADADDR 0x72000000 #define CONFIG_SYS_TEXT_BASE 0x77800000 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +/* Linux boot */ #define CONFIG_HOSTNAME usbarmory #define CONFIG_BOOTCOMMAND \ "run distro_bootcmd; " \ "setenv bootargs console=${console} ${bootargs_default}; " \ - "ext2load mmc 0:1 ${kernel_addr_r} /boot/uImage; " \ + "ext2load mmc 0:1 ${kernel_addr_r} /boot/zImage; " \ "ext2load mmc 0:1 ${fdt_addr_r} /boot/${fdtfile}; " \ - "bootm ${kernel_addr_r} - ${fdt_addr_r}" + "bootz ${kernel_addr_r} - ${fdt_addr_r}" #define BOOT_TARGET_DEVICES(func) func(MMC, mmc, 0) @@ -99,6 +98,12 @@ "console=ttymxc0,115200\0" \ BOOTENV +#ifndef CONFIG_CMDLINE +#define CONFIG_BOOTARGS "console=ttymxc0,115200 root=/dev/mmcblk0p1 rootwait rw" +#define USBARMORY_FIT_PATH "/boot/usbarmory.itb" +#define USBARMORY_FIT_ADDR "0x70800000" +#endif + /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM CSD0_BASE_ADDR diff --git a/include/configs/v38b.h b/include/configs/v38b.h index 28c748d..5ebdf5b 100644 --- a/include/configs/v38b.h +++ b/include/configs/v38b.h @@ -55,7 +55,7 @@ #define SDRAM_TAPDELAY 0x10000000 /* - * PCI - no suport + * PCI - no support */ #undef CONFIG_PCI diff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8a.h index 46cf83b..9aca393 100644 --- a/include/configs/vexpress_aemv8a.h +++ b/include/configs/vexpress_aemv8a.h @@ -133,7 +133,6 @@ /* Command line configuration */ #define CONFIG_MENU /*#define CONFIG_MENU_SHOW*/ -#define CONFIG_CMD_BOOTI #define CONFIG_CMD_UNZIP #define CONFIG_CMD_PXE #define CONFIG_CMD_ENV diff --git a/include/configs/vexpress_ca15_tc2.h b/include/configs/vexpress_ca15_tc2.h index b509a9c..9583e8c 100644 --- a/include/configs/vexpress_ca15_tc2.h +++ b/include/configs/vexpress_ca15_tc2.h @@ -16,5 +16,6 @@ #define CONFIG_SYSFLAGS_ADDR 0x1c010030 #define CONFIG_SMP_PEN_ADDR CONFIG_SYSFLAGS_ADDR +#define CONFIG_ARMV7_PSCI_NR_CPUS 4 #endif diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h index 99f5c0c..2a00ff4 100644 --- a/include/configs/wandboard.h +++ b/include/configs/wandboard.h @@ -28,6 +28,18 @@ #define CONFIG_MXC_UART #define CONFIG_MXC_UART_BASE UART1_BASE +/* SATA Configs */ + +#define CONFIG_CMD_SATA +#ifdef CONFIG_CMD_SATA +#define CONFIG_DWC_AHSATA +#define CONFIG_SYS_SATA_MAX_DEVICE 1 +#define CONFIG_DWC_AHSATA_PORT_ID 0 +#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR +#define CONFIG_LBA48 +#define CONFIG_LIBATA +#endif + /* Command definition */ #define CONFIG_CMD_BMODE @@ -181,7 +193,7 @@ #define CONFIG_ENV_SIZE (8 * 1024) #define CONFIG_ENV_IS_IN_MMC -#define CONFIG_ENV_OFFSET (6 * 64 * 1024) +#define CONFIG_ENV_OFFSET (768 * 1024) #define CONFIG_SYS_MMC_ENV_DEV 0 #endif /* __CONFIG_H * */ diff --git a/include/configs/warp.h b/include/configs/warp.h index 4a8e270..12c7c38 100644 --- a/include/configs/warp.h +++ b/include/configs/warp.h @@ -43,7 +43,6 @@ /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define PHYS_SDRAM_SIZE SZ_512M #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR diff --git a/include/configs/warp7.h b/include/configs/warp7.h index fc0e51a..e59b16c 100644 --- a/include/configs/warp7.h +++ b/include/configs/warp7.h @@ -21,6 +21,8 @@ #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_BOARD_LATE_INIT +#define CONFIG_DISPLAY_BOARDINFO + /* MMC Config*/ #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR #define CONFIG_SUPPORT_EMMC_BOOT @@ -114,8 +116,6 @@ #define CONFIG_MMCROOT "/dev/mmcblk2p2" /* USB Configs */ -#define CONFIG_USB_EHCI -#define CONFIG_USB_EHCI_MX7 #define CONFIG_USB_STORAGE #define CONFIG_EHCI_HCD_INIT_AFTER_RESET @@ -125,18 +125,9 @@ #define CONFIG_IMX_THERMAL -#define CONFIG_CI_UDC #define CONFIG_USBD_HS -#define CONFIG_USB_GADGET_DUALSPEED -#define CONFIG_USB_GADGET #define CONFIG_USB_FUNCTION_MASS_STORAGE -#define CONFIG_USB_GADGET_DOWNLOAD -#define CONFIG_USB_GADGET_VBUS_DRAW 2 - -#define CONFIG_G_DNL_VENDOR_NUM 0x0525 -#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 -#define CONFIG_G_DNL_MANUFACTURER "FSL" /* USB Device Firmware Update support */ #define CONFIG_USB_FUNCTION_DFU diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index e776e32..ca60e5d 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -41,7 +41,7 @@ # define CONFIG_IDENT_STRING " Xilinx ZynqMP" #endif -#define CONFIG_SYS_INIT_SP_ADDR 0xfffffffc +#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE /* Generic Timer Definitions - setup in EL3. Setup by ATF for other cases */ #if !defined(COUNTER_FREQUENCY) @@ -117,7 +117,6 @@ #if defined(CONFIG_ZYNQMP_USB) #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 -#define CONFIG_USB_STORAGE #define CONFIG_USB_XHCI_ZYNQMP #define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x1800000 @@ -206,7 +205,6 @@ #define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024) -#define CONFIG_CMD_BOOTI #define CONFIG_CMD_UNZIP #define CONFIG_BOARD_EARLY_INIT_R @@ -257,6 +255,7 @@ #endif #define CONFIG_SPL_TEXT_BASE 0xfffc0000 +#define CONFIG_SPL_STACK 0xfffffffc #define CONFIG_SPL_MAX_SIZE 0x20000 /* Just random location in OCM */ diff --git a/include/configs/xilinx_zynqmp_ep.h b/include/configs/xilinx_zynqmp_ep.h index c5bd5da..44434aa 100644 --- a/include/configs/xilinx_zynqmp_ep.h +++ b/include/configs/xilinx_zynqmp_ep.h @@ -17,6 +17,7 @@ #define CONFIG_ZYNQ_SDHCI_MIN_FREQ (CONFIG_ZYNQ_SDHCI_MAX_FREQ << 9) #define CONFIG_ZYNQ_EEPROM #define CONFIG_AHCI +#define CONFIG_SATA_CEVA #define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR, \ ZYNQMP_USB1_XHCI_BASEADDR} diff --git a/include/configs/xpedite1000.h b/include/configs/xpedite1000.h index 73c8d5b..bc91714 100644 --- a/include/configs/xpedite1000.h +++ b/include/configs/xpedite1000.h @@ -304,7 +304,7 @@ extern void out32(unsigned int, unsigned long); "osfile=/home/user/board.uImage\0" \ "fdtfile=/home/user/board.dtb\0" \ "ubootfile=/home/user/u-boot.bin\0" \ - "fdtaddr=c00000\0" \ + "fdtaddr=0x1e00000\0" \ "osaddr=0x1000000\0" \ "loadaddr=0x1000000\0" \ "prog_uboot="CONFIG_PROG_UBOOT"\0" \ diff --git a/include/configs/xpedite517x.h b/include/configs/xpedite517x.h index 9f3158d..eaea33b 100644 --- a/include/configs/xpedite517x.h +++ b/include/configs/xpedite517x.h @@ -699,7 +699,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); "osfile=/home/user/board.uImage\0" \ "fdtfile=/home/user/board.dtb\0" \ "ubootfile=/home/user/u-boot.bin\0" \ - "fdtaddr=c00000\0" \ + "fdtaddr=0x1e00000\0" \ "osaddr=0x1000000\0" \ "loadaddr=0x1000000\0" \ "prog_uboot1="CONFIG_PROG_UBOOT1"\0" \ diff --git a/include/configs/xpedite520x.h b/include/configs/xpedite520x.h index a418fc5..f7cfc9e 100644 --- a/include/configs/xpedite520x.h +++ b/include/configs/xpedite520x.h @@ -483,7 +483,7 @@ "osfile=/home/user/board.uImage\0" \ "fdtfile=/home/user/board.dtb\0" \ "ubootfile=/home/user/u-boot.bin\0" \ - "fdtaddr=c00000\0" \ + "fdtaddr=0x1e00000\0" \ "osaddr=0x1000000\0" \ "loadaddr=0x1000000\0" \ "prog_uboot1="CONFIG_PROG_UBOOT1"\0" \ diff --git a/include/configs/xpedite537x.h b/include/configs/xpedite537x.h index 36df668..3306e44a 100644 --- a/include/configs/xpedite537x.h +++ b/include/configs/xpedite537x.h @@ -554,7 +554,7 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); "osfile=/home/user/board.uImage\0" \ "fdtfile=/home/user/board.dtb\0" \ "ubootfile=/home/user/u-boot.bin\0" \ - "fdtaddr=c00000\0" \ + "fdtaddr=0x1e00000\0" \ "osaddr=0x1000000\0" \ "loadaddr=0x1000000\0" \ "prog_uboot1="CONFIG_PROG_UBOOT1"\0" \ diff --git a/include/configs/xpedite550x.h b/include/configs/xpedite550x.h index 1794ba1..276dde7 100644 --- a/include/configs/xpedite550x.h +++ b/include/configs/xpedite550x.h @@ -538,7 +538,7 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); "osfile=/home/user/board.uImage\0" \ "fdtfile=/home/user/board.dtb\0" \ "ubootfile=/home/user/u-boot.bin\0" \ - "fdtaddr=c00000\0" \ + "fdtaddr=0x1e00000\0" \ "osaddr=0x1000000\0" \ "loadaddr=0x1000000\0" \ "prog_uboot1="CONFIG_PROG_UBOOT1"\0" \ diff --git a/include/configs/xtfpga.h b/include/configs/xtfpga.h new file mode 100644 index 0000000..c5b06e3 --- /dev/null +++ b/include/configs/xtfpga.h @@ -0,0 +1,268 @@ +/* + * Copyright (C) 2007-2013 Tensilica, Inc. + * Copyright (C) 2014 - 2016 Cadence Design Systems Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <asm/arch/core.h> +#include <asm/addrspace.h> +#include <asm/config.h> + +/* + * The 'xtfpga' board describes a set of very similar boards with only minimal + * differences. + */ + +/*=====================*/ +/* Board and Processor */ +/*=====================*/ + +#define CONFIG_XTFPGA + +/* FPGA CPU freq after init */ +#define CONFIG_SYS_CLK_FREQ (gd->cpu_clk) + +/*===================*/ +/* RAM Layout */ +/*===================*/ + +#if XCHAL_HAVE_PTP_MMU +#define CONFIG_SYS_MEMORY_BASE \ + (XCHAL_VECBASE_RESET_VADDR - XCHAL_VECBASE_RESET_PADDR) +#define CONFIG_SYS_IO_BASE 0xf0000000 +#else +#define CONFIG_SYS_MEMORY_BASE 0x60000000 +#define CONFIG_SYS_IO_BASE 0x90000000 +#define CONFIG_MAX_MEM_MAPPED 0x10000000 +#endif + +/* Onboard RAM sizes: + * + * LX60 0x04000000 64 MB + * LX110 0x03000000 48 MB + * LX200 0x06000000 96 MB + * ML605 0x18000000 384 MB + * KC705 0x38000000 896 MB + * + * noMMU configurations can only see first 256MB of onboard memory. + */ + +#if XCHAL_HAVE_PTP_MMU || CONFIG_BOARD_SDRAM_SIZE < 0x10000000 +#define CONFIG_SYS_SDRAM_SIZE CONFIG_BOARD_SDRAM_SIZE +#else +#define CONFIG_SYS_SDRAM_SIZE 0x10000000 +#endif + +#define CONFIG_SYS_SDRAM_BASE MEMADDR(0x00000000) + +/* Lx60 can only map 128kb memory (instead of 256kb) when running under OCD */ +#ifdef CONFIG_XTFPGA_LX60 +# define CONFIG_SYS_MONITOR_LEN 0x00020000 /* 128KB */ +#else +# define CONFIG_SYS_MONITOR_LEN 0x00040000 /* 256KB */ +#endif + +#define CONFIG_SYS_STACKSIZE (512 << 10) /* stack 512KB */ +#define CONFIG_SYS_MALLOC_LEN (256 << 10) /* heap 256KB */ + +/* Linux boot param area in RAM (used only when booting linux) */ +#define CONFIG_SYS_BOOTPARAMS_LEN (64 << 10) + +/* Memory test is destructive so default must not overlap vectors or U-Boot*/ +#define CONFIG_SYS_MEMTEST_START MEMADDR(0x01000000) +#define CONFIG_SYS_MEMTEST_END MEMADDR(0x02000000) + +/* Load address for stand-alone applications. + * MEMADDR cannot be used here, because the definition needs to be + * a plain number as it's used as -Ttext argument for ld in standalone + * example makefile. + * Handle noMMU vs MMUv2 vs MMUv3 distinction here manually. + */ +#if XCHAL_HAVE_PTP_MMU +#if XCHAL_VECBASE_RESET_VADDR == XCHAL_VECBASE_RESET_PADDR +#define CONFIG_STANDALONE_LOAD_ADDR 0x00800000 +#else +#define CONFIG_STANDALONE_LOAD_ADDR 0xd0800000 +#endif +#else +#define CONFIG_STANDALONE_LOAD_ADDR 0x60800000 +#endif + +#if defined(CONFIG_MAX_MEM_MAPPED) && \ + CONFIG_MAX_MEM_MAPPED < CONFIG_SYS_SDRAM_SIZE +#define CONFIG_SYS_MEMORY_SIZE CONFIG_MAX_MEM_MAPPED +#else +#define CONFIG_SYS_MEMORY_SIZE CONFIG_SYS_SDRAM_SIZE +#endif + +#define CONFIG_SYS_MEMORY_TOP MEMADDR(CONFIG_SYS_MEMORY_SIZE) +#define CONFIG_SYS_TEXT_ADDR \ + (CONFIG_SYS_MEMORY_TOP - CONFIG_SYS_MONITOR_LEN) + +/* Used by tftpboot; env var 'loadaddr' */ +#define CONFIG_SYS_LOAD_ADDR MEMADDR(0x02000000) + +/*==============================*/ +/* U-Boot general configuration */ +/*==============================*/ + +#undef CONFIG_USE_IRQ /* Keep it simple, poll only */ +#define CONFIG_BOARD_POSTCLK_INIT +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO +#define CONFIG_MISC_INIT_R + +#define CONFIG_BOOTFILE "uImage" + /* Console I/O Buffer Size */ +#define CONFIG_SYS_CBSIZE 1024 + /* Prt buf */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) + /* max number of command args */ +#define CONFIG_SYS_MAXARGS 16 + /* Boot Argument Buffer Size */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +/*=================*/ +/* U-Boot commands */ +/*=================*/ + +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_SAVES + +/*==============================*/ +/* U-Boot autoboot configuration */ +/*==============================*/ + +#define CONFIG_BOOT_RETRY_TIME 60 /* retry after 60 secs */ + +#define CONFIG_VERSION_VARIABLE +#define CONFIG_AUTO_COMPLETE /* Support tab autocompletion */ +#define CONFIG_CMDLINE_EDITING +#define CONFIG_SYS_LONGHELP +#define CONFIG_CRC32_VERIFY +#define CONFIG_MX_CYCLIC +#define CONFIG_SHOW_BOOT_PROGRESS + +#ifdef DEBUG +#define CONFIG_PANIC_HANG 1 /* Require manual reboot */ +#endif + + +/*=========================================*/ +/* FPGA Registers (board info and control) */ +/*=========================================*/ + +/* + * These assume FPGA bitstreams from Tensilica release RB and up. Earlier + * releases may not provide any/all of these registers or at these offsets. + * Some of the FPGA registers are broken down into bitfields described by + * SHIFT left amount and field WIDTH (bits), and also by a bitMASK. + */ + +/* Date of FPGA bitstream build in binary coded decimal (BCD) */ +#define CONFIG_SYS_FPGAREG_DATE IOADDR(0x0D020000) +#define FPGAREG_MTH_SHIFT 24 /* BCD month 1..12 */ +#define FPGAREG_MTH_WIDTH 8 +#define FPGAREG_MTH_MASK 0xFF000000 +#define FPGAREG_DAY_SHIFT 16 /* BCD day 1..31 */ +#define FPGAREG_DAY_WIDTH 8 +#define FPGAREG_DAY_MASK 0x00FF0000 +#define FPGAREG_YEAR_SHIFT 0 /* BCD year 2001..9999*/ +#define FPGAREG_YEAR_WIDTH 16 +#define FPGAREG_YEAR_MASK 0x0000FFFF + +/* FPGA core clock frequency in Hz (also input to UART) */ +#define CONFIG_SYS_FPGAREG_FREQ IOADDR(0x0D020004) /* CPU clock frequency*/ + +/* + * DIP switch (left=sw1=lsb=bit0, right=sw8=msb=bit7; off=0, on=1): + * Bits 0..5 set the lower 6 bits of the default ethernet MAC. + * Bit 6 is reserved for future use by Tensilica. + * Bit 7 maps the first 128KB of ROM address space at CONFIG_SYS_ROM_BASE to + * the base of flash * (when on/1) or to the base of RAM (when off/0). + */ +#define CONFIG_SYS_FPGAREG_DIPSW IOADDR(0x0D02000C) +#define FPGAREG_MAC_SHIFT 0 /* Ethernet MAC bits 0..5 */ +#define FPGAREG_MAC_WIDTH 6 +#define FPGAREG_MAC_MASK 0x3f +#define FPGAREG_BOOT_SHIFT 7 /* Boot ROM addr mapping */ +#define FPGAREG_BOOT_WIDTH 1 +#define FPGAREG_BOOT_MASK 0x80 +#define FPGAREG_BOOT_RAM 0 +#define FPGAREG_BOOT_FLASH (1<<FPGAREG_BOOT_SHIFT) + +/* Force hard reset of board by writing a code to this register */ +#define CONFIG_SYS_FPGAREG_RESET IOADDR(0x0D020010) /* Reset board .. */ +#define CONFIG_SYS_FPGAREG_RESET_CODE 0x0000DEAD /* by writing this code */ + +/*====================*/ +/* Serial Driver Info */ +/*====================*/ + +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE (-4) +#define CONFIG_SYS_NS16550_COM1 IOADDR(0x0D050020) /* Base address */ + +/* Input clk to NS16550 (in Hz; the SYS_CLK_FREQ is in kHz) */ +#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_CLK_FREQ +#define CONFIG_CONS_INDEX 1 /* use UART0 for console */ +#define CONFIG_BAUDRATE 115200 /* Default baud rate */ +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } + +/*======================*/ +/* Ethernet Driver Info */ +/*======================*/ + +#define CONFIG_ETHBASE 00:50:C2:13:6f:00 +#define CONFIG_SYS_ETHOC_BASE IOADDR(0x0d030000) +#define CONFIG_SYS_ETHOC_BUFFER_ADDR IOADDR(0x0D800000) + +/*=====================*/ +/* Flash & Environment */ +/*=====================*/ + +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_FLASH_CFI_DRIVER /* use generic CFI driver */ +#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#ifdef CONFIG_XTFPGA_LX60 +# define CONFIG_SYS_FLASH_SIZE 0x0040000 /* 4MB */ +# define CONFIG_SYS_FLASH_SECT_SZ 0x10000 /* block size 64KB */ +# define CONFIG_SYS_FLASH_PARMSECT_SZ 0x2000 /* param size 8KB */ +# define CONFIG_SYS_FLASH_BASE IOADDR(0x08000000) +# define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE +#elif defined(CONFIG_XTFPGA_KC705) +# define CONFIG_SYS_FLASH_SIZE 0x8000000 /* 128MB */ +# define CONFIG_SYS_FLASH_SECT_SZ 0x20000 /* block size 128KB */ +# define CONFIG_SYS_FLASH_PARMSECT_SZ 0x8000 /* param size 32KB */ +# define CONFIG_SYS_FLASH_BASE IOADDR(0x00000000) +# define CONFIG_SYS_MONITOR_BASE IOADDR(0x06000000) +#else +# define CONFIG_SYS_FLASH_SIZE 0x1000000 /* 16MB */ +# define CONFIG_SYS_FLASH_SECT_SZ 0x20000 /* block size 128KB */ +# define CONFIG_SYS_FLASH_PARMSECT_SZ 0x8000 /* param size 32KB */ +# define CONFIG_SYS_FLASH_BASE IOADDR(0x08000000) +# define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE +#endif +#define CONFIG_SYS_MAX_FLASH_SECT \ + (CONFIG_SYS_FLASH_SECT_SZ/CONFIG_SYS_FLASH_PARMSECT_SZ + \ + CONFIG_SYS_FLASH_SIZE/CONFIG_SYS_FLASH_SECT_SZ - 1) +#define CONFIG_SYS_FLASH_PROTECTION /* hw flash protection */ + +/* + * Put environment in top block (64kB) + * Another option would be to put env. in 2nd param block offs 8KB, size 8KB + */ +#define CONFIG_ENV_IS_IN_FLASH +#define CONFIG_ENV_OFFSET (CONFIG_SYS_FLASH_SIZE - CONFIG_SYS_FLASH_SECT_SZ) +#define CONFIG_ENV_SIZE CONFIG_SYS_FLASH_SECT_SZ + +/* print 'E' for empty sector on flinfo */ +#define CONFIG_SYS_FLASH_EMPTY_INFO + +#endif /* __CONFIG_H */ diff --git a/include/configs/zc5202.h b/include/configs/zc5202.h new file mode 100644 index 0000000..073a42c --- /dev/null +++ b/include/configs/zc5202.h @@ -0,0 +1,37 @@ +/* + * Copyright (C) Stefano Babic <sbabic@denx.de> + * + * Configuration settings for the E+L i.MX6Q DO82 board. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __EL_ZC5202_H +#define __EL_ZC5202_H + +#define CONFIG_MXC_UART_BASE UART2_BASE +#define CONFIG_CONSOLE_DEV "ttymxc1" +#define CONFIG_MMCROOT "/dev/mmcblk0p2" + +#define CONFIG_DEFAULT_FDT_FILE "imx6q-zc5202.dtb" + +#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ + +#include "el6x_common.h" + +/* Ethernet */ +#define CONFIG_FEC_MXC +#define CONFIG_MII +#define IMX_FEC_BASE ENET_BASE_ADDR +#define CONFIG_FEC_XCV_TYPE MII100 +#define CONFIG_ETHPRIME "FEC" +#define CONFIG_FEC_MXC_PHYADDR 0 +#define CONFIG_MV88E6352_SWITCH + +#define CONFIG_CMD_PCI +#define CONFIG_PCI +#define CONFIG_PCI_PNP +#define CONFIG_PCI_SCAN_SHOW +#define CONFIG_PCIE_IMX + +#endif /*__EL6Q_CONFIG_H */ diff --git a/include/configs/zc5601.h b/include/configs/zc5601.h new file mode 100644 index 0000000..28b9c6b --- /dev/null +++ b/include/configs/zc5601.h @@ -0,0 +1,33 @@ +/* + * Copyright (C) Stefano Babic <sbabic@denx.de> + * + * Configuration settings for the E+L i.MX6Q DO82 board. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __EL_ZC5601_H +#define __EL_ZC5601_H + + +#define CONFIG_MXC_UART_BASE UART2_BASE +#define CONFIG_CONSOLE_DEV "ttymxc1" +#define CONFIG_MMCROOT "/dev/mmcblk0p1" + +#define CONFIG_DEFAULT_FDT_FILE "imx6q-zc5601.dtb" + +#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ + +#include "el6x_common.h" + +/* Ethernet */ +#define CONFIG_FEC_MXC +#define CONFIG_MII +#define IMX_FEC_BASE ENET_BASE_ADDR +#define CONFIG_FEC_XCV_TYPE RGMII +#define CONFIG_ETHPRIME "FEC" +#define CONFIG_FEC_MXC_PHYADDR 0x10 +#define CONFIG_PHYLIB +#define CONFIG_FEC_FIXED_SPEED 1000 /* No autoneg, fix Gb */ + +#endif /*__EL6Q_CONFIG_H */ diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 8dbac87..e59e412 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -86,10 +86,7 @@ # define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000 #endif -#ifdef CONFIG_ZYNQ_USB -# define CONFIG_USB_EHCI -# define CONFIG_USB_STORAGE -# define CONFIG_USB_EHCI_ZYNQ +#ifdef CONFIG_USB_EHCI_ZYNQ # define CONFIG_EHCI_IS_TDI # define CONFIG_USB_MAX_CONTROLLER_COUNT 2 diff --git a/include/configs/zynq_microzed.h b/include/configs/zynq_microzed.h deleted file mode 100644 index ec7bb1c..0000000 --- a/include/configs/zynq_microzed.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * (C) Copyright 2013 Xilinx, Inc. - * - * Configuration for Micro Zynq Evaluation and Development Board - MicroZedBoard - * See zynq-common.h for Zynq common configs - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __CONFIG_ZYNQ_MICROZED_H -#define __CONFIG_ZYNQ_MICROZED_H - -#define CONFIG_SYS_NO_FLASH - -#define CONFIG_ZYNQ_USB - -#include <configs/zynq-common.h> - -#endif /* __CONFIG_ZYNQ_MICROZED_H */ diff --git a/include/configs/zynq_picozed.h b/include/configs/zynq_picozed.h deleted file mode 100644 index adc4d0f..0000000 --- a/include/configs/zynq_picozed.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * (C) Copyright 2015 Xilinx, Inc. - * - * Configuration for PicoZed - * See zynq-common.h for Zynq common configs - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __CONFIG_ZYNQ_PICOZED_H -#define __CONFIG_ZYNQ_PICOZED_H - -#define CONFIG_SYS_NO_FLASH - -#define CONFIG_ZYNQ_USB - -#include <configs/zynq-common.h> - -#endif /* __CONFIG_ZYNQ_PICOZED_H */ diff --git a/include/configs/zynq_zc70x.h b/include/configs/zynq_zc70x.h index 8a04590..fc46fec 100644 --- a/include/configs/zynq_zc70x.h +++ b/include/configs/zynq_zc70x.h @@ -10,9 +10,6 @@ #ifndef __CONFIG_ZYNQ_ZC70X_H #define __CONFIG_ZYNQ_ZC70X_H -#define CONFIG_SYS_NO_FLASH - -#define CONFIG_ZYNQ_USB #define CONFIG_ZYNQ_I2C0 #define CONFIG_ZYNQ_EEPROM diff --git a/include/configs/zynq_zc770.h b/include/configs/zynq_zc770.h deleted file mode 100644 index 35622ae..0000000 --- a/include/configs/zynq_zc770.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * (C) Copyright 2013 Xilinx, Inc. - * - * Configuration settings for the Xilinx Zynq ZC770 board. - * See zynq-common.h for Zynq common configs - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __CONFIG_ZYNQ_ZC770_H -#define __CONFIG_ZYNQ_ZC770_H - -#define CONFIG_SYS_NO_FLASH - -#if defined(CONFIG_ZC770_XM012) -# undef CONFIG_SYS_NO_FLASH - -#endif - -#include <configs/zynq-common.h> - -#endif /* __CONFIG_ZYNQ_ZC770_H */ diff --git a/include/configs/zynq_zed.h b/include/configs/zynq_zed.h deleted file mode 100644 index 150cb4a..0000000 --- a/include/configs/zynq_zed.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * (C) Copyright 2013 Xilinx, Inc. - * - * Configuration for Zynq Evaluation and Development Board - ZedBoard - * See zynq-common.h for Zynq common configs - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __CONFIG_ZYNQ_ZED_H -#define __CONFIG_ZYNQ_ZED_H - -#define CONFIG_SYS_NO_FLASH - -#define CONFIG_ZYNQ_USB - -#include <configs/zynq-common.h> - -#endif /* __CONFIG_ZYNQ_ZED_H */ diff --git a/include/configs/zynq_zybo.h b/include/configs/zynq_zybo.h index 637b1c5..b9ff391 100644 --- a/include/configs/zynq_zybo.h +++ b/include/configs/zynq_zybo.h @@ -11,9 +11,6 @@ #ifndef __CONFIG_ZYNQ_ZYBO_H #define __CONFIG_ZYNQ_ZYBO_H -#define CONFIG_SYS_NO_FLASH - -#define CONFIG_ZYNQ_USB #define CONFIG_ZYNQ_I2C0 #define CONFIG_ZYNQ_I2C1 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 |