diff options
Diffstat (limited to 'include/configs')
| -rw-r--r-- | include/configs/at91sam9n12ek.h | 4 | ||||
| -rw-r--r-- | include/configs/cpu9260.h | 4 | ||||
| -rw-r--r-- | include/configs/ethernut5.h | 2 | ||||
| -rw-r--r-- | include/configs/meesc.h | 4 | ||||
| -rw-r--r-- | include/configs/otc570.h | 4 | ||||
| -rw-r--r-- | include/configs/pm9261.h | 4 | ||||
| -rw-r--r-- | include/configs/pm9263.h | 4 | ||||
| -rw-r--r-- | include/configs/pm9g45.h | 4 | ||||
| -rw-r--r-- | include/configs/vl_ma2sc.h | 4 |
9 files changed, 17 insertions, 17 deletions
diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h index 4ec1799..e23549d 100644 --- a/include/configs/at91sam9n12ek.h +++ b/include/configs/at91sam9n12ek.h @@ -113,8 +113,8 @@ #define CONFIG_SYS_NAND_BASE 0x40000000 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) -#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIO_PORTD, 4 -#define CONFIG_SYS_NAND_READY_PIN AT91_PIO_PORTD, 5 +#define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(4) +#define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PD(5) /* PMECC & PMERRLOC */ #define CONFIG_ATMEL_NAND_HWECC diff --git a/include/configs/cpu9260.h b/include/configs/cpu9260.h index 22c0a09..39f7062 100644 --- a/include/configs/cpu9260.h +++ b/include/configs/cpu9260.h @@ -280,8 +280,8 @@ #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 #define CONFIG_SYS_NAND_DBW_8 1 -#define CONFIG_SYS_NAND_READY_PIN AT91_PIO_PORTC, 13 -#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIO_PORTC, 14 +#define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PC(13) +#define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PC(14) #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h index 252df54..480d867 100644 --- a/include/configs/ethernut5.h +++ b/include/configs/ethernut5.h @@ -149,7 +149,7 @@ #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* our CLE is AD22 */ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) -#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIO_PORTC, 14 +#define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PC(14) #endif /* JFFS2 */ diff --git a/include/configs/meesc.h b/include/configs/meesc.h index 91f6e2f..86ce5f2 100644 --- a/include/configs/meesc.h +++ b/include/configs/meesc.h @@ -143,8 +143,8 @@ # define CONFIG_SYS_NAND_DBW_8 # define CONFIG_SYS_NAND_MASK_ALE (1 << 21) # define CONFIG_SYS_NAND_MASK_CLE (1 << 22) -# define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIO_PORTD, 15 -# define CONFIG_SYS_NAND_READY_PIN AT91_PIO_PORTA, 22 +# define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(15) +# define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PA(22) #endif /* Ethernet */ diff --git a/include/configs/otc570.h b/include/configs/otc570.h index 3f4e073..629967d 100644 --- a/include/configs/otc570.h +++ b/include/configs/otc570.h @@ -193,8 +193,8 @@ # define CONFIG_SYS_NAND_DBW_8 # define CONFIG_SYS_NAND_MASK_ALE (1 << 21) # define CONFIG_SYS_NAND_MASK_CLE (1 << 22) -# define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIO_PORTD, 15 -# define CONFIG_SYS_NAND_READY_PIN AT91_PIO_PORTA, 22 +# define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(15) +# define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PA(22) #endif /* Ethernet */ diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h index acf6d61..f977e25 100644 --- a/include/configs/pm9261.h +++ b/include/configs/pm9261.h @@ -219,8 +219,8 @@ #define CONFIG_SYS_NAND_MASK_ALE (1 << 22) /* our CLE is AD21 */ #define CONFIG_SYS_NAND_MASK_CLE (1 << 21) -#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIO_PORTC, 14 -#define CONFIG_SYS_NAND_READY_PIN AT91_PIO_PORTA, 16 +#define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PC(14) +#define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PA(16) /* NOR flash */ #define CONFIG_SYS_FLASH_CFI 1 diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h index 533e249..dffc336 100644 --- a/include/configs/pm9263.h +++ b/include/configs/pm9263.h @@ -241,8 +241,8 @@ #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* our CLE is AD22 */ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) -#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIO_PORTD, 15 -#define CONFIG_SYS_NAND_READY_PIN AT91_PIO_PORTB, 30 +#define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(15) +#define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PB(30) #endif diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h index e0c388e..03a25c8 100644 --- a/include/configs/pm9g45.h +++ b/include/configs/pm9g45.h @@ -106,8 +106,8 @@ #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* our CLE is AD22 */ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) -#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIO_PORTC, 14 -#define CONFIG_SYS_NAND_READY_PIN AT91_PIO_PORTD, 3 +#define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PC(14) +#define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PD(3) #endif diff --git a/include/configs/vl_ma2sc.h b/include/configs/vl_ma2sc.h index aacb84c..88aaa95 100644 --- a/include/configs/vl_ma2sc.h +++ b/include/configs/vl_ma2sc.h @@ -320,8 +320,8 @@ #define CONFIG_SYS_NAND_DBW_8 1 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* our ALE is AD21 */ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) /* our CLE is AD22 */ -#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIO_PORTD, 15 -#define CONFIG_SYS_NAND_READY_PIN AT91_PIO_PORTB, 0 +#define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(15) +#define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PB(0) #define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #endif |