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-rw-r--r--include/configs/am335x_evm.h67
-rw-r--r--include/configs/am43xx_evm.h64
-rw-r--r--include/configs/cm_t54.h3
-rw-r--r--include/configs/dra7xx_evm.h89
-rw-r--r--include/configs/pcm051.h140
-rw-r--r--include/configs/tam3517-common.h1
-rw-r--r--include/configs/ti_armv7_common.h19
-rw-r--r--include/configs/tseries.h6
8 files changed, 211 insertions, 178 deletions
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index 35ae0e6..df1a6fc 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -61,7 +61,7 @@
"${optargs} " \
"root=${nandroot} " \
"rootfstype=${nandrootfstype}\0" \
- "nandroot=ubi0:rootfs rw ubi.mtd=7,2048\0" \
+ "nandroot=ubi0:rootfs rw ubi.mtd=9,2048\0" \
"nandrootfstype=ubifs rootwait=1\0" \
"nandboot=echo Booting from nand ...; " \
"run nandargs; " \
@@ -223,22 +223,20 @@
/* USB gadget RNDIS */
#define CONFIG_SPL_MUSB_NEW_SUPPORT
-/* General network SPL, both CPSW and USB gadget RNDIS */
-#define CONFIG_SPL_NET_SUPPORT
-#define CONFIG_SPL_ENV_SUPPORT
-#define CONFIG_SPL_NET_VCI_STRING "AM335x U-Boot SPL"
-
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds"
+#endif
#ifdef CONFIG_NAND
-#define CONFIG_NAND_OMAP_GPMC
-#define CONFIG_NAND_OMAP_ELM
+/* NAND: device related configs */
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
CONFIG_SYS_NAND_PAGE_SIZE)
#define CONFIG_SYS_NAND_PAGE_SIZE 2048
#define CONFIG_SYS_NAND_OOBSIZE 64
#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
+/* NAND: driver related configs */
+#define CONFIG_NAND_OMAP_GPMC
+#define CONFIG_NAND_OMAP_ELM
#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
10, 11, 12, 13, 14, 15, 16, 17, \
@@ -252,15 +250,34 @@
#define CONFIG_SYS_NAND_ECCBYTES 14
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW
-#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
+#define MTDIDS_DEFAULT "nand0=nand.0"
+#define MTDPARTS_DEFAULT "mtdparts=nand.0:" \
+ "128k(NAND.SPL)," \
+ "128k(NAND.SPL.backup1)," \
+ "128k(NAND.SPL.backup2)," \
+ "128k(NAND.SPL.backup3)," \
+ "256k(NAND.u-boot-spl-os)," \
+ "1m(NAND.u-boot)," \
+ "128k(NAND.u-boot-env)," \
+ "128k(NAND.u-boot-env.backup1)," \
+ "8m(NAND.kernel)," \
+ "-(NAND.rootfs)"
+#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x000c0000
+#undef CONFIG_ENV_IS_NOWHERE
+#define CONFIG_ENV_IS_IN_NAND
+#define CONFIG_ENV_OFFSET 0x001c0000
+#define CONFIG_ENV_OFFSET_REDUND 0x001e0000
+#define CONFIG_SYS_ENV_SECT_SIZE CONFIG_SYS_NAND_BLOCK_SIZE
+/* NAND: SPL related configs */
+#ifdef CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_NAND_AM33XX_BCH
+#endif
#ifdef CONFIG_SPL_OS_BOOT
#define CONFIG_CMD_SPL_NAND_OFS 0x00080000 /* os parameters */
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */
#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif
-#endif
-#endif
+#endif /* !CONFIG_NAND */
/*
* For NOR boot, we must set this to the start of where NOR is mapped
@@ -314,10 +331,10 @@
/* disable EFI partitions and partition UUID support */
#undef CONFIG_PARTITION_UUIDS
#undef CONFIG_EFI_PARTITION
-/*
- * Disable CPSW SPL support so we fit within the 101KiB limit.
- */
-#undef CONFIG_SPL_ETH_SUPPORT
+/* General network SPL */
+#define CONFIG_SPL_NET_SUPPORT
+#define CONFIG_SPL_ENV_SUPPORT
+#define CONFIG_SPL_NET_VCI_STRING "AM335x U-Boot SPL"
#endif
/* USB Device Firmware Update support */
@@ -399,6 +416,7 @@
#elif defined(CONFIG_EMMC_BOOT)
#undef CONFIG_ENV_IS_NOWHERE
#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SPL_ENV_SUPPORT
#define CONFIG_SYS_MMC_ENV_DEV 1
#define CONFIG_SYS_MMC_ENV_PART 2
#define CONFIG_ENV_OFFSET 0x0
@@ -417,23 +435,6 @@
#define CONFIG_PHYLIB
#define CONFIG_PHY_SMSC
-/* NAND support */
-#ifdef CONFIG_NAND
-#define CONFIG_CMD_NAND
-#if !defined(CONFIG_SPI_BOOT) && !defined(CONFIG_NOR_BOOT)
-#define MTDIDS_DEFAULT "nand0=omap2-nand.0"
-#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:128k(SPL)," \
- "128k(SPL.backup1)," \
- "128k(SPL.backup2)," \
- "128k(SPL.backup3),1792k(u-boot)," \
- "128k(u-boot-spl-os)," \
- "128k(u-boot-env),5m(kernel),-(rootfs)"
-#define CONFIG_ENV_IS_IN_NAND
-#define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */
-#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
-#endif
-#endif
-
/*
* NOR Size = 16 MiB
* Number of Sectors/Blocks = 128
diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h
index e262040..0707827 100644
--- a/include/configs/am43xx_evm.h
+++ b/include/configs/am43xx_evm.h
@@ -265,4 +265,68 @@
#define CONFIG_SPL_NET_SUPPORT
#define CONFIG_SYS_RX_ETH_BUFFER 64
+/* NAND support */
+#ifdef CONFIG_NAND
+/* NAND: device related configs */
+#define CONFIG_SYS_NAND_PAGE_SIZE 4096
+#define CONFIG_SYS_NAND_OOBSIZE 224
+#define CONFIG_SYS_NAND_BLOCK_SIZE (256*1024)
+#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
+ CONFIG_SYS_NAND_PAGE_SIZE)
+#define CONFIG_SYS_NAND_5_ADDR_CYCLE
+/* NAND: driver related configs */
+#define CONFIG_NAND_OMAP_GPMC
+#define CONFIG_NAND_OMAP_ELM
+#define CONFIG_SYS_NAND_ONFI_DETECTION
+#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH16_CODE_HW
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
+#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
+ 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, \
+ 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, \
+ 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, \
+ 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, \
+ 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, \
+ 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, \
+ 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, \
+ 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, \
+ 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, \
+ 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, \
+ 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, \
+ 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, \
+ 130, 131, 132, 133, 134, 135, 136, 137, 138, 139, \
+ 140, 141, 142, 143, 144, 145, 146, 147, 148, 149, \
+ 150, 151, 152, 153, 154, 155, 156, 157, 158, 159, \
+ 160, 161, 162, 163, 164, 165, 166, 167, 168, 169, \
+ 170, 171, 172, 173, 174, 175, 176, 177, 178, 179, \
+ 180, 181, 182, 183, 184, 185, 186, 187, 188, 189, \
+ 190, 191, 192, 193, 194, 195, 196, 197, 198, 199, \
+ 200, 201, 202, 203, 204, 205, 206, 207, 208, 209, \
+ }
+#define CONFIG_SYS_NAND_ECCSIZE 512
+#define CONFIG_SYS_NAND_ECCBYTES 26
+#define MTDIDS_DEFAULT "nand0=nand.0"
+#define MTDPARTS_DEFAULT "mtdparts=nand.0:" \
+ "256k(NAND.SPL)," \
+ "256k(NAND.SPL.backup1)," \
+ "256k(NAND.SPL.backup2)," \
+ "256k(NAND.SPL.backup3)," \
+ "512k(NAND.u-boot-spl-os)," \
+ "1m(NAND.u-boot)," \
+ "256k(NAND.u-boot-env)," \
+ "256k(NAND.u-boot-env.backup1)," \
+ "7m(NAND.kernel)," \
+ "-(NAND.rootfs)"
+#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x00180000
+/* NAND: SPL related configs */
+#ifdef CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_NAND_AM33XX_BCH
+#endif
+/* NAND: SPL falcon mode configs */
+#ifdef CONFIG_SPL_OS_BOOT
+#define CONFIG_CMD_SPL_NAND_OFS 0x00100000 /* os parameters */
+#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00300000 /* kernel offset */
+#define CONFIG_CMD_SPL_WRITE_SIZE CONFIG_SYS_NAND_BLOCK_SIZE
+#endif
+#endif /* !CONFIG_NAND */
+
#endif /* __CONFIG_AM43XX_EVM_H */
diff --git a/include/configs/cm_t54.h b/include/configs/cm_t54.h
index db04095..df93a59 100644
--- a/include/configs/cm_t54.h
+++ b/include/configs/cm_t54.h
@@ -19,6 +19,9 @@
#undef CONFIG_MISC_INIT_R
#undef CONFIG_SPL_OS_BOOT
+/* Enable Generic board */
+#define CONFIG_SYS_GENERIC_BOARD
+
/* Device Tree defines */
#define CONFIG_OF_LIBFDT
#define CONFIG_OF_BOARD_SETUP
diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h
index 8d0a0eb..4143a4d 100644
--- a/include/configs/dra7xx_evm.h
+++ b/include/configs/dra7xx_evm.h
@@ -13,6 +13,7 @@
#define __CONFIG_DRA7XX_EVM_H
#define CONFIG_DRA7XX
+#define CONFIG_BOARD_EARLY_INIT_F
#ifndef CONFIG_QSPI_BOOT
/* MMC ENV related defines */
@@ -143,4 +144,92 @@
#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
CONFIG_SYS_SCSI_MAX_LUN)
+/* NAND support */
+#ifdef CONFIG_NAND
+/* NAND: device related configs */
+#define CONFIG_SYS_NAND_PAGE_SIZE 2048
+#define CONFIG_SYS_NAND_OOBSIZE 64
+#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
+#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
+#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
+ CONFIG_SYS_NAND_PAGE_SIZE)
+#define CONFIG_SYS_NAND_5_ADDR_CYCLE
+/* NAND: driver related configs */
+#define CONFIG_NAND_OMAP_GPMC
+#define CONFIG_NAND_OMAP_ELM
+#define CONFIG_SYS_NAND_ONFI_DETECTION
+#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
+#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
+ 10, 11, 12, 13, 14, 15, 16, 17, \
+ 18, 19, 20, 21, 22, 23, 24, 25, \
+ 26, 27, 28, 29, 30, 31, 32, 33, \
+ 34, 35, 36, 37, 38, 39, 40, 41, \
+ 42, 43, 44, 45, 46, 47, 48, 49, \
+ 50, 51, 52, 53, 54, 55, 56, 57, }
+#define CONFIG_SYS_NAND_ECCSIZE 512
+#define CONFIG_SYS_NAND_ECCBYTES 14
+#define MTDIDS_DEFAULT "nand0=nand.0"
+#define MTDPARTS_DEFAULT "mtdparts=nand.0:" \
+ "128k(NAND.SPL)," \
+ "128k(NAND.SPL.backup1)," \
+ "128k(NAND.SPL.backup2)," \
+ "128k(NAND.SPL.backup3)," \
+ "256k(NAND.u-boot-spl-os)," \
+ "1m(NAND.u-boot)," \
+ "128k(NAND.u-boot-env)," \
+ "128k(NAND.u-boot-env.backup1)," \
+ "8m(NAND.kernel)," \
+ "-(NAND.rootfs)"
+#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x000c0000
+/* NAND: SPL related configs */
+#ifdef CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_NAND_AM33XX_BCH
+#endif
+/* NAND: SPL falcon mode configs */
+#ifdef CONFIG_SPL_OS_BOOT
+#define CONFIG_CMD_SPL_NAND_OFS 0x00080000 /* os-boot params*/
+#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */
+#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
+#endif
+#endif /* !CONFIG_NAND */
+
+/* Parallel NOR Support */
+#if defined(CONFIG_NOR)
+/* NOR: device related configs */
+#define CONFIG_SYS_MAX_FLASH_SECT 512
+#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
+#define CONFIG_SYS_FLASH_SIZE (64 * 1024 * 1024) /* 64 MB */
+/* #define CONFIG_INIT_IGNORE_ERROR */
+#undef CONFIG_SYS_NO_FLASH
+#define CONFIG_CMD_FLASH
+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
+#define CONFIG_SYS_FLASH_PROTECTION
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_FLASH_CFI_MTD
+#define CONFIG_SYS_MAX_FLASH_BANKS 1
+#define CONFIG_SYS_FLASH_BASE (0x08000000)
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
+/* Reduce SPL size by removing unlikey targets */
+#ifdef CONFIG_NOR_BOOT
+#define CONFIG_ENV_IS_IN_FLASH
+#define CONFIG_ENV_SECT_SIZE (128 * 1024) /* 128 KiB */
+#define MTDIDS_DEFAULT "nor0=physmap-flash.0"
+#define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0:" \
+ "128k(NOR.SPL)," \
+ "128k(NOR.SPL.backup1)," \
+ "128k(NOR.SPL.backup2)," \
+ "128k(NOR.SPL.backup3)," \
+ "256k(NOR.u-boot-spl-os)," \
+ "1m(NOR.u-boot)," \
+ "128k(NOR.u-boot-env)," \
+ "128k(NOR.u-boot-env.backup1)," \
+ "8m(NOR.kernel)," \
+ "-(NOR.rootfs)"
+#define CONFIG_ENV_OFFSET 0x001c0000
+#define CONFIG_ENV_OFFSET_REDUND 0x001e0000
+#endif
+#endif /* NOR support */
+
#endif /* __CONFIG_DRA7XX_EVM_H */
diff --git a/include/configs/pcm051.h b/include/configs/pcm051.h
index dcf5537..5efcd76 100644
--- a/include/configs/pcm051.h
+++ b/include/configs/pcm051.h
@@ -19,35 +19,13 @@
#ifndef __CONFIG_PCM051_H
#define __CONFIG_PCM051_H
-#define CONFIG_AM33XX
-#define CONFIG_OMAP
-#define CONFIG_OMAP_COMMON
-
-#include <asm/arch/omap.h>
+#include <configs/ti_am335x_common.h>
#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
-#define CONFIG_SYS_MALLOC_LEN (1024 << 10)
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
-#define CONFIG_SYS_PROMPT "U-Boot# "
-#define CONFIG_SYS_NO_FLASH
#define MACH_TYPE_PCM051 4144 /* Until the next sync */
#define CONFIG_MACH_TYPE MACH_TYPE_PCM051
-#define CONFIG_OF_LIBFDT
-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-
-/* commands to include */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_ASKENV
-#define CONFIG_VERSION_VARIABLE
-
/* set to negative value for no autoboot */
-#define CONFIG_BOOTDELAY 1
-#define CONFIG_ENV_VARS_UBOOT_CONFIG
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
#define CONFIG_EXTRA_ENV_SETTINGS \
"loadaddr=0x80007fc0\0" \
@@ -104,21 +82,6 @@
#define V_OSCK 25000000 /* Clock output from T2 */
#define V_SCLK (V_OSCK)
-#define CONFIG_CMD_ECHO
-
-/* max number of command args */
-#define CONFIG_SYS_MAXARGS 16
-
-/* Console I/O Buffer Size */
-#define CONFIG_SYS_CBSIZE 512
-
-/* Print Buffer Size */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
- + sizeof(CONFIG_SYS_PROMPT) + 16)
-
-/* Boot Argument Buffer Size */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-
/*
* memtest works on 8 MB in DRAM after skipping 32MB from
* start addr of ram disk
@@ -127,41 +90,13 @@
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START \
+ (8 * 1024 * 1024))
-#define CONFIG_SYS_LOAD_ADDR 0x80007fc0 /* Default load address */
-
-#define CONFIG_MMC
-#define CONFIG_GENERIC_MMC
-#define CONFIG_OMAP_HSMMC
-#define CONFIG_CMD_MMC
-#define CONFIG_DOS_PARTITION
-#define CONFIG_CMD_FAT
-#define CONFIG_CMD_EXT2
-
-#define CONFIG_SPI
-#define CONFIG_OMAP3_SPI
-#define CONFIG_MTD_DEVICE
#define CONFIG_SPI_FLASH
#define CONFIG_SPI_FLASH_WINBOND
#define CONFIG_CMD_SF
#define CONFIG_SF_DEFAULT_SPEED 24000000
- /* Physical Memory Map */
-#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
-#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 19) /* 512MiB */
-
-#define CONFIG_SYS_SDRAM_BASE 0x80000000
-#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
- GENERATED_GBL_DATA_SIZE)
- /* Platform/Board specific defs */
-#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
-#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
-
#define CONFIG_CONS_INDEX 1
/* NS16550 Configuration */
-#define CONFIG_SYS_NS16550
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE (-4)
-#define CONFIG_SYS_NS16550_CLK (48000000)
#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */
#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */
#define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */
@@ -170,65 +105,26 @@
#define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */
/* I2C Configuration */
-#define CONFIG_I2C
-#define CONFIG_CMD_I2C
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
-#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
-#define CONFIG_SYS_I2C_OMAP24XX
#define CONFIG_CMD_EEPROM
#define CONFIG_ENV_EEPROM_IS_ON_I2C
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
#define CONFIG_SYS_I2C_MULTI_EEPROMS
-#define CONFIG_OMAP_GPIO
-
-#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_BAUDRATE_TABLE { 110, 300, 600, 1200, 2400, \
4800, 9600, 14400, 19200, 28800, 38400, 56000, 57600, 115200 }
/* CPU */
-#define CONFIG_ARCH_CPU_INIT
-
-#define CONFIG_ENV_OVERWRITE
-#define CONFIG_SYS_CONSOLE_INFO_QUIET
-
#define CONFIG_ENV_IS_NOWHERE
-/* Defines for SPL */
-#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_BOARD_INIT
-/*
- * Place the image at the start of the ROM defined image space.
- * We limit our size to the ROM-defined downloaded image area, and use the
- * rest of the space for stack.
- */
-#define CONFIG_SPL_TEXT_BASE 0x402F0400
-#define CONFIG_SPL_MAX_SIZE (0x4030C000 - CONFIG_SPL_TEXT_BASE)
-#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
-
-#define CONFIG_SPL_BSS_START_ADDR 0x80000000
-#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
-
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
-#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
-#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
-#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
-#define CONFIG_SPL_MMC_SUPPORT
-#define CONFIG_SPL_FAT_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBDISK_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_GPIO_SUPPORT
#define CONFIG_SPL_YMODEM_SUPPORT
#define CONFIG_SPL_NET_SUPPORT
#define CONFIG_SPL_ENV_SUPPORT
#define CONFIG_SPL_NET_VCI_STRING "pcm051 U-Boot SPL"
#define CONFIG_SPL_ETH_SUPPORT
+#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds"
+
+#ifdef CONFIG_SPI_BOOT
#define CONFIG_SPL_SPI_SUPPORT
#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
@@ -236,23 +132,6 @@
#define CONFIG_SPL_SPI_CS 0
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
#define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000
-#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds"
-
-/*
- * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
- * 64 bytes before this address should be set aside for u-boot.img's
- * header. That is 0x800FFFC0--0x80100000 should not be used for any
- * other needs.
- */
-#define CONFIG_SYS_TEXT_BASE 0x80800000
-#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
-#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
-
-/* Since SPL did pll and ddr initialization for us,
- * we don't need to do it twice.
- */
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_SKIP_LOWLEVEL_INIT
#endif
/*
@@ -282,17 +161,6 @@
/* Unsupported features */
#undef CONFIG_USE_IRQ
-#define CONFIG_CMD_NET
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_PING
-#define CONFIG_DRIVER_TI_CPSW
-#define CONFIG_MII
-#define CONFIG_BOOTP_DNS
-#define CONFIG_BOOTP_DNS2
-#define CONFIG_BOOTP_SEND_HOSTNAME
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_SUBNETMASK
-#define CONFIG_NET_RETRY_COUNT 10
#define CONFIG_NET_MULTI
#define CONFIG_PHY_GIGE
#define CONFIG_PHYLIB
diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h
index e1fc754..bcf0a63 100644
--- a/include/configs/tam3517-common.h
+++ b/include/configs/tam3517-common.h
@@ -17,6 +17,7 @@
#define CONFIG_OMAP34XX /* which is a 34XX */
#define CONFIG_OMAP_GPIO
#define CONFIG_OMAP_COMMON
+#define CONFIG_SYS_GENERIC_BOARD
#define CONFIG_SYS_TEXT_BASE 0x80008000
diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h
index 26ac251..85171db 100644
--- a/include/configs/ti_armv7_common.h
+++ b/include/configs/ti_armv7_common.h
@@ -202,15 +202,18 @@
#define CONFIG_SPL_OS_BOOT
/*
- * Place the image at the start of the ROM defined image space.
- * We limit our size to the ROM-defined downloaded image area, and use the
- * rest of the space for stack. We load U-Boot itself into memory at
- * 0x80800000 for legacy reasons (to not conflict with older SPLs). We
- * have our BSS be placed 1MiB after this, to allow for the default
- * Linux kernel address of 0x80008000 to work, in the Falcon Mode case.
- * We have the SPL malloc pool at the end of the BSS area.
+ * Place the image at the start of the ROM defined image space (per
+ * CONFIG_SPL_TEXT_BASE and we limit our size to the ROM-defined
+ * downloaded image area. We initalize DRAM as soon as we can so that
+ * we can place stack, malloc and BSS there. We load U-Boot itself into
+ * memory at 0x80800000 for legacy reasons (to not conflict with older
+ * SPLs). We have our BSS be placed 2MiB after this, to allow for the
+ * default Linux kernel address of 0x80008000 to work with most sized
+ * kernels, in the Falcon Mode case. We have the SPL malloc pool at the
+ * end of the BSS area. We place our stack at 32MiB after the start of
+ * DRAM to allow room for all of the above.
*/
-#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
+#define CONFIG_SPL_STACK (CONFIG_SYS_SDRAM_BASE + (32 << 20))
#ifndef CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_TEXT_BASE 0x80800000
#endif
diff --git a/include/configs/tseries.h b/include/configs/tseries.h
index 1fd6e32..1dd13fd 100644
--- a/include/configs/tseries.h
+++ b/include/configs/tseries.h
@@ -243,8 +243,12 @@
#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
#elif defined(CONFIG_NAND)
-#undef CONFIG_ENV_IS_NOWHERE
+/* No NAND env support in SPL */
+#ifdef CONFIG_SPL_BUILD
+#define CONFIG_ENV_IS_NOWHERE
+#else
#define CONFIG_ENV_IS_IN_NAND
+#endif
#define CONFIG_ENV_OFFSET 0x120000 /* TODO: Adresse definieren */
#define CONFIG_SYS_ENV_SECT_SIZE CONFIG_ENV_SIZE
#else