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-rw-r--r--include/configs/MPC8610HPCD.h2
-rw-r--r--include/configs/MPC8641HPCN.h2
-rw-r--r--include/configs/TQM834x.h27
-rw-r--r--include/configs/atngw100.h10
-rw-r--r--include/configs/atstk1002.h4
-rw-r--r--include/configs/atstk1004.h2
-rw-r--r--include/configs/pcs440ep.h2
-rw-r--r--include/configs/sbc8641d.h2
-rw-r--r--include/configs/xsengine.h18
-rw-r--r--include/configs/yosemite.h2
10 files changed, 28 insertions, 43 deletions
diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h
index a53953c..3920147 100644
--- a/include/configs/MPC8610HPCD.h
+++ b/include/configs/MPC8610HPCD.h
@@ -42,6 +42,7 @@
#define CONFIG_PCIE1 1 /* PCIe 1 connected to ULI bridge */
#define CONFIG_PCIE2 1 /* PCIe 2 connected to slot */
#define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */
+#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
#define CONFIG_ENV_OVERWRITE
@@ -314,6 +315,7 @@
#define CONFIG_NET_MULTI
#define CONFIG_CMD_NET
#define CONFIG_PCI_PNP /* do pci plug-and-play */
+#define CONFIG_CMD_REGINFO
#define CONFIG_ULI526X
#ifdef CONFIG_ULI526X
diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h
index 985182f..a8d0077 100644
--- a/include/configs/MPC8641HPCN.h
+++ b/include/configs/MPC8641HPCN.h
@@ -49,6 +49,7 @@
#define CONFIG_PCI1 1 /* PCIE controler 1 (ULI bridge) */
#define CONFIG_PCI2 1 /* PCIE controler 2 (slot) */
#define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */
+#define CONFIG_FSL_LAW 1 /* Use common FSL law init code */
#define CONFIG_TSEC_ENET /* tsec ethernet support */
#define CONFIG_ENV_OVERWRITE
@@ -536,6 +537,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_CMD_PING
#define CONFIG_CMD_I2C
+#define CONFIG_CMD_REGINFO
#if defined(CFG_RAMBOOT)
#undef CONFIG_CMD_ENV
diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h
index 7373d7b..024ecfa 100644
--- a/include/configs/TQM834x.h
+++ b/include/configs/TQM834x.h
@@ -492,24 +492,7 @@ extern int tqm834x_num_flash_banks;
* Environment Configuration
*/
-#if defined(CONFIG_TSEC_ENET)
-#define CONFIG_HAS_ETH0
-#define CONFIG_ETHADDR D2:DA:5E:44:BC:29
-#define CONFIG_HAS_ETH1
-#define CONFIG_ETH1ADDR 1E:F3:40:21:92:53
-#endif
-
-#define CONFIG_IPADDR 192.168.205.1
-
-#define CONFIG_HOSTNAME tqm8349
-#define CONFIG_ROOTPATH /opt/eldk/ppc_6xx
-#define CONFIG_BOOTFILE /tftpboot/tqm83xx/uImage
-
-#define CONFIG_SERVERIP 192.168.1.1
-#define CONFIG_GATEWAYIP 192.168.1.1
-#define CONFIG_NETMASK 255.255.255.0
-
-#define CONFIG_LOADADDR 200000 /* default location for tftp and bootm */
+#define CONFIG_LOADADDR 400000 /* default location for tftp and bootm */
#define CONFIG_BOOTDELAY 6 /* -1 disables auto-boot */
#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
@@ -524,7 +507,7 @@ extern int tqm834x_num_flash_banks;
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
- "hostname=tqm83xx\0" \
+ "hostname=tqm834x\0" \
"nfsargs=setenv bootargs root=/dev/nfs rw " \
"nfsroot=${serverip}:${rootpath}\0" \
"ramargs=setenv bootargs root=/dev/ram rw\0" \
@@ -536,13 +519,13 @@ extern int tqm834x_num_flash_banks;
"bootm ${kernel_addr}\0" \
"flash_self=run ramargs addip addtty;" \
"bootm ${kernel_addr} ${ramdisk_addr}\0" \
- "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;" \
+ "net_nfs=tftp 400000 ${bootfile};run nfsargs addip addtty;" \
"bootm\0" \
"rootpath=/opt/eldk/ppc_6xx\0" \
- "bootfile=/tftpboot/tqm83xx/uImage\0" \
+ "bootfile=/tftpboot/tqm834x/uImage\0" \
"kernel_addr=80060000\0" \
"ramdisk_addr=80160000\0" \
- "load=tftp 100000 /tftpboot/tqm83xx/u-boot.bin\0" \
+ "load=tftp 100000 /tftpboot/tqm834x/u-boot.bin\0" \
"update=protect off 80000000 8003ffff; " \
"era 80000000 8003ffff; cp.b 100000 80000000 40000\0" \
"upd=run load;run update\0" \
diff --git a/include/configs/atngw100.h b/include/configs/atngw100.h
index 414e130..5aad043 100644
--- a/include/configs/atngw100.h
+++ b/include/configs/atngw100.h
@@ -170,13 +170,9 @@
#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)
#define CFG_LONGHELP 1
-#define CFG_MEMTEST_START \
- ({ DECLARE_GLOBAL_DATA_PTR; gd->bd->bi_dram[0].start; })
-#define CFG_MEMTEST_END \
- ({ \
- DECLARE_GLOBAL_DATA_PTR; \
- gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size; \
- })
+#define CFG_MEMTEST_START CFG_SDRAM_BASE
+#define CFG_MEMTEST_END (CFG_MEMTEST_START + 0x1f00000)
+
#define CFG_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 }
#endif /* __CONFIG_H */
diff --git a/include/configs/atstk1002.h b/include/configs/atstk1002.h
index b33e26f..95aeab6 100644
--- a/include/configs/atstk1002.h
+++ b/include/configs/atstk1002.h
@@ -184,8 +184,8 @@
#define CFG_MALLOC_LEN (256*1024)
#define CFG_DMA_ALLOC_LEN (16384)
-/* Allow 2MB for the kernel run-time image */
-#define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 0x00200000)
+/* Allow 4MB for the kernel run-time image */
+#define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 0x00400000)
#define CFG_BOOTPARAMS_LEN (16 * 1024)
/* Other configuration settings that shouldn't have to change all that often */
diff --git a/include/configs/atstk1004.h b/include/configs/atstk1004.h
index 1bad171..b81fc21 100644
--- a/include/configs/atstk1004.h
+++ b/include/configs/atstk1004.h
@@ -167,7 +167,7 @@
#define CFG_MALLOC_LEN (256*1024)
-/* Allow 4MB for the kernel run-time image */
+/* Allow 2MB for the kernel run-time image */
#define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 0x00200000)
#define CFG_BOOTPARAMS_LEN (16 * 1024)
diff --git a/include/configs/pcs440ep.h b/include/configs/pcs440ep.h
index d66f4bd..07fc23e 100644
--- a/include/configs/pcs440ep.h
+++ b/include/configs/pcs440ep.h
@@ -66,7 +66,7 @@
*----------------------------------------------------------------------*/
#define CFG_INIT_RAM_DCACHE 1 /* d-cache as init ram */
#define CFG_INIT_RAM_ADDR 0x70000000 /* DCache */
-#define CFG_INIT_RAM_END (8 << 10)
+#define CFG_INIT_RAM_END (4 << 10)
#define CFG_GBL_DATA_SIZE 256 /* num bytes initial data*/
#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h
index 54eac38..1991a8c 100644
--- a/include/configs/sbc8641d.h
+++ b/include/configs/sbc8641d.h
@@ -53,6 +53,7 @@
#define CONFIG_PCI1 1 /* PCIE controler 1 (slot 1) */
#define CONFIG_PCI2 1 /* PCIE controler 2 (slot 2) */
#define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */
+#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
#define CONFIG_TSEC_ENET /* tsec ethernet support */
#define CONFIG_ENV_OVERWRITE
@@ -479,6 +480,7 @@
#include <config_cmd_default.h>
#define CONFIG_CMD_PING
#define CONFIG_CMD_I2C
+ #define CONFIG_CMD_REGINFO
#if defined(CONFIG_PCI)
#define CONFIG_CMD_PCI
diff --git a/include/configs/xsengine.h b/include/configs/xsengine.h
index d167e01..4d1bdd7 100644
--- a/include/configs/xsengine.h
+++ b/include/configs/xsengine.h
@@ -33,7 +33,7 @@
#define CONFIG_XSENGINE 1
#define CONFIG_MMC 1
#define CONFIG_DOS_PARTITION 1
-#define OARD_LATE_INIT 1
+#define BOARD_LATE_INIT 1
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
#define CFG_HZ 3686400 /* incrementer freq: 3.6864 MHz */
@@ -86,8 +86,8 @@
#define CFG_ENV_SIZE 0x4000 /* 16kB Total Size of Environment Sector */
/* timeout values are in ticks */
-#define CFG_FLASH_ERASE_TOUT (75*CFG_HZ) /* Timeout for Flash Erase */
-#define CFG_FLASH_WRITE_TOUT (50*CFG_HZ) /* Timeout for Flash Write */
+#define CFG_FLASH_ERASE_TOUT (75*CFG_HZ) /* Timeout for Flash Erase */
+#define CFG_FLASH_WRITE_TOUT (50*CFG_HZ) /* Timeout for Flash Write */
/* Size of malloc() pool */
#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 256*1024)
@@ -96,7 +96,7 @@
/* Hardware drivers */
#define CONFIG_DRIVER_SMC91111
#define CONFIG_SMC91111_BASE 0x04000300
-#define CONFIG_SMC_USE_32_BIT 1
+#define CONFIG_SMC_USE_32_BIT 1
/* select serial console configuration */
#define CONFIG_FFUART 1
@@ -138,15 +138,15 @@
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "XS-Engine u-boot> " /* Monitor Command Prompt */
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
-#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
#define CFG_MAXARGS 16 /* max number of command args */
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
#define CFG_MEMTEST_START 0xA0400000 /* memtest works on */
#define CFG_MEMTEST_END 0xA0800000 /* 4 ... 8 MB in DRAM */
-#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
+#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } /* valid baudrates */
#define CFG_MMC_BASE 0xF0000000
-#define CFG_LOAD_ADDR 0xA0000000 /* load kernel to this address */
+#define CFG_LOAD_ADDR 0xA0000000 /* load kernel to this address */
/* Stack sizes - The stack sizes are set up in start.S using the settings below */
#define CONFIG_STACKSIZE (128*1024) /* regular stack */
@@ -168,7 +168,7 @@
/* GP direction register */
#define CFG_GPDR0_VAL 0x0000A000 /* CS1, PROG(FPGA) */
#define CFG_GPDR1_VAL 0x00022A80 /* nPWE, FFUART + BTUART pins */
-#define CFG_GPDR2_VAL 0x0000C000 /* CS2, CS3 */
+#define CFG_GPDR2_VAL 0x0000C000 /* CS2, CS3 */
/* GP rising edge detect register */
#define CFG_GRER0_VAL 0x00000000
@@ -185,7 +185,7 @@
#define CFG_GAFR0_U_VAL 0x00000010 /* RDY */
#define CFG_GAFR1_L_VAL 0x09988050 /* FFUART + BTUART pins */
#define CFG_GAFR1_U_VAL 0x00000008 /* nPWE */
-#define CFG_GAFR2_L_VAL 0xA0000000 /* CS2, CS3 */
+#define CFG_GAFR2_L_VAL 0xA0000000 /* CS2, CS3 */
#define CFG_GAFR2_U_VAL 0x00000000
#define CFG_PSSR_VAL 0x00000020 /* Power manager sleep status */
diff --git a/include/configs/yosemite.h b/include/configs/yosemite.h
index a8eeff9..4c86bc5 100644
--- a/include/configs/yosemite.h
+++ b/include/configs/yosemite.h
@@ -75,7 +75,7 @@
*----------------------------------------------------------------------*/
#define CFG_INIT_RAM_DCACHE 1 /* d-cache as init ram */
#define CFG_INIT_RAM_ADDR 0x70000000 /* DCache */
-#define CFG_INIT_RAM_END (8 << 10)
+#define CFG_INIT_RAM_END (4 << 10)
#define CFG_GBL_DATA_SIZE 256 /* num bytes initial data*/
#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET