diff options
Diffstat (limited to 'include/configs')
| -rw-r--r-- | include/configs/ml401.h | 41 | ||||
| -rw-r--r-- | include/configs/suzaku.h | 3 | ||||
| -rw-r--r-- | include/configs/xupv2p.h | 174 |
3 files changed, 201 insertions, 17 deletions
diff --git a/include/configs/ml401.h b/include/configs/ml401.h index 4dc2afc..f4a8a1f 100644 --- a/include/configs/ml401.h +++ b/include/configs/ml401.h @@ -31,27 +31,31 @@ #define CONFIG_ML401 1 /* ML401 Board */ /* uart */ -#define CONFIG_SERIAL_BASE CONFIG_XILINX_UARTLITE_0_BASEADDR -#define CONFIG_BAUDRATE CONFIG_XILINX_UARTLITE_0_BAUDRATE +#define CONFIG_SERIAL_BASE XILINX_UART_BASEADDR +#define CONFIG_BAUDRATE XILINX_UART_BAUDRATE #define CFG_BAUDRATE_TABLE { CONFIG_BAUDRATE } /* setting reset address */ #define CFG_RESET_ADDRESS TEXT_BASE +/* ethernet */ +#define CONFIG_EMACLITE 1 +#define XPAR_EMAC_0_DEVICE_ID XPAR_XEMAC_NUM_INSTANCES + /* gpio */ #define CFG_GPIO_0 1 -#define CFG_GPIO_0_ADDR CONFIG_XILINX_GPIO_0_BASEADDR +#define CFG_GPIO_0_ADDR XILINX_GPIO_BASEADDR /* interrupt controller */ #define CFG_INTC_0 1 -#define CFG_INTC_0_ADDR CONFIG_XILINX_INTC_0_BASEADDR -#define CFG_INTC_0_NUM CONFIG_XILINX_INTC_0_NUM_INTR_INPUTS +#define CFG_INTC_0_ADDR XILINX_INTC_BASEADDR +#define CFG_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS /* timer */ #define CFG_TIMER_0 1 -#define CFG_TIMER_0_ADDR CONFIG_XILINX_TIMER_0_BASEADDR -#define CFG_TIMER_0_IRQ CONFIG_XILINX_TIMER_0_IRQ -#define FREQUENCE 66666666 +#define CFG_TIMER_0_ADDR XILINX_TIMER_BASEADDR +#define CFG_TIMER_0_IRQ XILINX_TIMER_IRQ +#define FREQUENCE XILINX_CLOCK_FREQ #define CFG_TIMER_0_PRELOAD ( FREQUENCE/1000 ) /* @@ -62,6 +66,7 @@ * * CFG_GBL_DATA_OFFSET = 0x1000_0000 + 0x0400_0000 - 0x1000 = 0x13FF_F000 * CFG_MONITOR_BASE = 0x13FF_F000 - 0x40000 = 0x13FB_F000 + * CFG_MALLOC_BASE = 0x13FB_F000 - 0x40000 = 0x13F7_F000 * * 0x1000_0000 CFG_SDRAM_BASE * FREE @@ -71,16 +76,18 @@ * FREE * * STACK + * 0x13F7_F000 CFG_MALLOC_BASE + * MALLOC_AREA 256kB Alloc * 0x11FB_F000 CFG_MONITOR_BASE - * MONITOR_CODE + * MONITOR_CODE 256kB Env * 0x13FF_F000 CFG_GBL_DATA_OFFSET - * GLOBAL_DATA + * GLOBAL_DATA 4kB bd, gd * 0x1400_0000 CFG_SDRAM_BASE + CFG_SDRAM_SIZE */ /* ddr sdram - main memory */ -#define CFG_SDRAM_BASE CONFIG_XILINX_ERAM_START -#define CFG_SDRAM_SIZE CONFIG_XILINX_ERAM_SIZE +#define CFG_SDRAM_BASE XILINX_RAM_START +#define CFG_SDRAM_SIZE XILINX_RAM_SIZE #define CFG_MEMTEST_START CFG_SDRAM_BASE #define CFG_MEMTEST_END (CFG_SDRAM_BASE + 0x1000) @@ -92,7 +99,9 @@ #define SIZE 0x40000 #define CFG_MONITOR_LEN SIZE #define CFG_MONITOR_BASE (CFG_GBL_DATA_OFFSET - CFG_MONITOR_LEN) +#define CFG_MONITOR_END (CFG_MONITOR_BASE + CFG_MONITOR_LEN) #define CFG_MALLOC_LEN SIZE +#define CFG_MALLOC_BASE (CFG_MONITOR_BASE - CFG_MALLOC_LEN) /* stack */ #define CFG_INIT_SP_OFFSET CFG_MONITOR_BASE @@ -101,8 +110,8 @@ #define FLASH #ifdef FLASH - #define CFG_FLASH_BASE CONFIG_XILINX_FLASH_START - #define CFG_FLASH_SIZE CONFIG_XILINX_FLASH_SIZE + #define CFG_FLASH_BASE XILINX_FLASH_START + #define CFG_FLASH_SIZE XILINX_FLASH_SIZE #define CFG_FLASH_CFI 1 #define CFG_FLASH_CFI_DRIVER 1 #define CFG_FLASH_EMPTY_INFO 1 /* ?empty sector */ @@ -214,8 +223,8 @@ /* system ace */ /*#define CONFIG_SYSTEMACE #define DEBUG_SYSTEMACE -#define CFG_SYSTEMACE_BASE 0xCF000000 -#define CFG_SYSTEMACE_WIDTH 8 +#define CFG_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR +#define CFG_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH #define CONFIG_DOS_PARTITION */ #endif /* __CONFIG_H */ diff --git a/include/configs/suzaku.h b/include/configs/suzaku.h index 1ee6be1..be19269 100644 --- a/include/configs/suzaku.h +++ b/include/configs/suzaku.h @@ -44,8 +44,9 @@ #define CFG_FLASH_SIZE 0x00400000 #define CFG_RESET_ADDRESS 0xfff00100 #define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ -#define CFG_MONITOR_BASE (CFG_SDRAM_BASE + CFG_SDRAM_SIZE - (1024 * 1024)) +#define CFG_MONITOR_BASE (CFG_SDRAM_BASE + CFG_SDRAM_SIZE - (1024 * 1024)) #define CFG_MALLOC_LEN (256 << 10) /* Reserve 256 kB for malloc */ +#define CFG_MALLOC_BASE (CFG_MONITOR_BASE - (1024 * 1024)) #define CONFIG_BAUDRATE 115200 #define CFG_BAUDRATE_TABLE { 115200 } diff --git a/include/configs/xupv2p.h b/include/configs/xupv2p.h new file mode 100644 index 0000000..224db5c --- /dev/null +++ b/include/configs/xupv2p.h @@ -0,0 +1,174 @@ +/* + * (C) Copyright 2007 Czech Technical University. + * + * Michal SIMEK <monstr@monstr.eu> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "../board/xilinx/xupv2p/xparameters.h" + +#define CONFIG_MICROBLAZE 1 /* MicroBlaze CPU */ +#define CONFIG_XUPV2P 1 + +/* uart */ +#define CONFIG_SERIAL_BASE XILINX_UART_BASEADDR +#define CONFIG_BAUDRATE XILINX_UART_BAUDRATE +#define CFG_BAUDRATE_TABLE { CONFIG_BAUDRATE } + +/* ethernet */ +#define CONFIG_EMAC 1 +#define XPAR_EMAC_0_DEVICE_ID XPAR_XEMAC_NUM_INSTANCES + +/* + * setting reset address + * + * TEXT_BASE is set to place, where the U-BOOT run in RAM, but + * if you want to store U-BOOT in flash, set CFG_RESET_ADDRESS + * to FLASH memory and after loading bitstream jump to FLASH. + * U-BOOT auto-relocate to TEXT_BASE. After RESET command Microblaze + * jump to CFG_RESET_ADDRESS where is the original U-BOOT code. + */ +#define CFG_RESET_ADDRESS 0x36000000 + +/* gpio */ +#define CFG_GPIO_0 1 +#define CFG_GPIO_0_ADDR XILINX_GPIO_BASEADDR + +/* interrupt controller */ +#define CFG_INTC_0 1 +#define CFG_INTC_0_ADDR XILINX_INTC_BASEADDR +#define CFG_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS + +/* timer */ +#define CFG_TIMER_0 1 +#define CFG_TIMER_0_ADDR XILINX_TIMER_BASEADDR +#define CFG_TIMER_0_IRQ XILINX_TIMER_IRQ +#define FREQUENCE XILINX_CLOCK_FREQ +#define CFG_TIMER_0_PRELOAD ( FREQUENCE/1000 ) + +/* + * memory layout - Example + * TEXT_BASE = 0x3600_0000; + * CFG_SRAM_BASE = 0x3000_0000; + * CFG_SRAM_SIZE = 0x1000_0000; + * + * CFG_GBL_DATA_OFFSET = 0x3000_0000 + 0x1000_0000 - 0x1000 = 0x3FFF_F000 + * CFG_MONITOR_BASE = 0x3FFF_F000 - 0x40000 = 0x3FFB_F000 + * CFG_MALLOC_BASE = 0x3FFB_F000 - 0x40000 = 0x3FF7_F000 + * + * 0x3000_0000 CFG_SDRAM_BASE + * FREE + * 0x3600_0000 TEXT_BASE + * U-BOOT code + * 0x3602_0000 + * FREE + * + * STACK + * 0x3FF7_F000 CFG_MALLOC_BASE + * MALLOC_AREA 256kB Alloc + * 0x3FFB_F000 CFG_MONITOR_BASE + * MONITOR_CODE 256kB Env + * 0x3FFF_F000 CFG_GBL_DATA_OFFSET + * GLOBAL_DATA 4kB bd, gd + * 0x4000_0000 CFG_SDRAM_BASE + CFG_SDRAM_SIZE + */ + +/* ddr sdram - main memory */ +#define CFG_SDRAM_BASE XILINX_RAM_START +#define CFG_SDRAM_SIZE XILINX_RAM_SIZE +#define CFG_MEMTEST_START CFG_SDRAM_BASE +#define CFG_MEMTEST_END (CFG_SDRAM_BASE + 0x1000) + +/* global pointer */ +#define CFG_GBL_DATA_SIZE 0x1000 /* size of global data */ +#define CFG_GBL_DATA_OFFSET (CFG_SDRAM_BASE + CFG_SDRAM_SIZE - CFG_GBL_DATA_SIZE) /* start of global data */ + +/* monitor code */ +#define SIZE 0x40000 +#define CFG_MONITOR_LEN SIZE +#define CFG_MONITOR_BASE (CFG_GBL_DATA_OFFSET - CFG_MONITOR_LEN) +#define CFG_MONITOR_END (CFG_MONITOR_BASE + CFG_MONITOR_LEN) +#define CFG_MALLOC_LEN SIZE +#define CFG_MALLOC_BASE (CFG_MONITOR_BASE - CFG_MALLOC_LEN) + +/* stack */ +#define CFG_INIT_SP_OFFSET CFG_MALLOC_BASE + +#define CFG_NO_FLASH 1 +#define CFG_ENV_IS_NOWHERE 1 +#define CFG_ENV_SIZE 0x1000 +#define CFG_ENV_ADDR (CFG_MONITOR_BASE - CFG_ENV_SIZE) +#define CONFIG_COMMANDS (CONFIG__CMD_DFL |\ + CFG_CMD_MEMORY |\ + CFG_CMD_IRQ |\ + CFG_CMD_BDI |\ + CFG_CMD_NET |\ + CFG_CMD_IMI |\ + CFG_CMD_ECHO |\ + CFG_CMD_CACHE |\ + CFG_CMD_RUN |\ + CFG_CMD_AUTOSCRIPT |\ + CFG_CMD_ASKENV |\ + CFG_CMD_LOADS |\ + CFG_CMD_LOADB |\ + CFG_CMD_MISC |\ + CFG_CMD_PING \ + ) + +/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ +#include <cmd_confdefs.h> + +/* Miscellaneous configurable options */ +#define CFG_PROMPT "U-Boot-mONStR> " +#define CFG_CBSIZE 512 /* size of console buffer */ +#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) /* print buffer size */ +#define CFG_MAXARGS 15 /* max number of command args */ +#define CFG_LONGHELP +#define CFG_LOAD_ADDR 0x12000000 /* default load address */ + +#define CONFIG_BOOTDELAY 30 +#define CONFIG_BOOTARGS "root=romfs" +#define CONFIG_HOSTNAME "ml401" +#define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" +#define CONFIG_IPADDR 192.168.0.3 +#define CONFIG_SERVERIP 192.168.0.5 +#define CONFIG_GATEWAYIP 192.168.0.1 +#define CONFIG_ETHADDR 00:E0:0C:00:00:FD + +/* architecture dependent code */ +#define CFG_USR_EXCEP /* user exception */ +#define CFG_HZ 1000 + +#define CONFIG_PREBOOT "echo U-BOOT by mONStR;" \ + "base 0;" \ + "echo" + + +/* system ace */ +/*#define CONFIG_SYSTEMACE +#define DEBUG_SYSTEMACE +#define CFG_SYSTEMACE_BASE 0xCF000000 +#define CFG_SYSTEMACE_WIDTH 16 +#define CONFIG_DOS_PARTITION*/ + +#endif /* __CONFIG_H */ |