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-rw-r--r--include/configs/afeb9260.h1
-rw-r--r--include/configs/apollon.h74
-rw-r--r--include/configs/at91cap9adk.h10
-rw-r--r--include/configs/at91rm9200dk.h2
-rw-r--r--include/configs/at91sam9260ek.h10
-rw-r--r--include/configs/at91sam9261ek.h8
-rw-r--r--include/configs/at91sam9263ek.h9
-rw-r--r--include/configs/at91sam9rlek.h7
-rw-r--r--include/configs/cmc_pu2.h2
-rw-r--r--include/configs/csb637.h2
-rw-r--r--include/configs/kb9202.h2
-rw-r--r--include/configs/mp2usb.h2
12 files changed, 97 insertions, 32 deletions
diff --git a/include/configs/afeb9260.h b/include/configs/afeb9260.h
index 755952f..f077ad9 100644
--- a/include/configs/afeb9260.h
+++ b/include/configs/afeb9260.h
@@ -29,6 +29,7 @@
/* ARM asynchronous clock */
#define AT91_MAIN_CLOCK 18429952 /* from 18.432 MHz crystal */
#define AT91_MASTER_CLOCK 89999598 /* peripheral = main / 2 */
+#define CFG_AT91_PLLB 0x107c3e18 /* PLLB settings for USB */
#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
#define AT91_SLOW_CLOCK 32768 /* slow clock */
diff --git a/include/configs/apollon.h b/include/configs/apollon.h
index d71ed44..dff47fc 100644
--- a/include/configs/apollon.h
+++ b/include/configs/apollon.h
@@ -53,6 +53,9 @@
#define CONFIG_SYS_USE_NOR 1
#endif
+/* uncommnet if you want to use UBI */
+#define CONFIG_SYS_USE_UBI
+
#include <asm/arch/omap2420.h> /* get chip and board defs */
#define V_SCLK 12000000
@@ -73,8 +76,9 @@
* Size of malloc() pool
*/
#define CONFIG_ENV_SIZE SZ_128K /* Total Size of Environment Sector */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_128K)
-#define CONFIG_SYS_GBL_DATA_SIZE 128 /* bytes reserved for initial data */
+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_1M)
+/* bytes reserved for initial data */
+#define CONFIG_SYS_GBL_DATA_SIZE 128
/*
* Hardware drivers
@@ -116,6 +120,13 @@
#define CONFIG_CMD_DIAG
#define CONFIG_CMD_ONENAND
+#ifdef CONFIG_SYS_USE_UBI
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_UBI
+#define CONFIG_RBTREE
+#define CONFIG_MTD_PARTITIONS
+#endif
+
#undef CONFIG_CMD_AUTOSCRIPT
#ifndef CONFIG_SYS_USE_NOR
@@ -133,24 +144,39 @@
#define CONFIG_BOOTFILE "uImage"
#define CONFIG_ETHADDR 00:0E:99:00:24:20
-#ifdef CONFIG_APOLLON_PLUS
-# define CONFIG_BOOTARGS "root=/dev/nfs rw mem=64M console=ttyS0,115200n8 ip=192.168.116.25:192.168.116.1:192.168.116.1:255.255.255.0:apollon:eth0:off nfsroot=/tftpboot/nfsroot profile=2"
+#ifdef CONFIG_APOLLON_PLUS
+#define CONFIG_SYS_MEM "mem=64M"
+#else
+#define CONFIG_SYS_MEM "mem=128"
+#endif
+
+#ifdef CONFIG_SYS_USE_UBI
+#define CONFIG_SYS_UBI "ubi.mtd=4"
#else
-# define CONFIG_BOOTARGS "root=/dev/nfs rw mem=128M console=ttyS0,115200n8 ip=192.168.116.25:192.168.116.1:192.168.116.1:255.255.255.0:apollon:eth0:off nfsroot=/tftpboot/nfsroot profile=2"
+#define CONFIG_SYS_UBI ""
#endif
+#define CONFIG_BOOTARGS "root=/dev/nfs rw " CONFIG_SYS_MEM \
+ " console=ttyS0,115200n8" \
+ " ip=192.168.116.25:192.168.116.1:192.168.116.1:255.255.255.0:" \
+ "apollon:eth0:off nfsroot=/tftpboot/nfsroot profile=2 " \
+ CONFIG_SYS_UBI
+
#define CONFIG_EXTRA_ENV_SETTINGS \
"Image=tftp 0x80008000 Image; go 0x80008000\0" \
"zImage=tftp 0x80180000 zImage; go 0x80180000\0" \
"uImage=tftp 0x80180000 uImage; bootm 0x80180000\0" \
"uboot=tftp 0x80008000 u-boot.bin; go 0x80008000\0" \
- "xloader=tftp 0x80180000 x-load.bin; cp.w 0x80180000 0x00000400 0x1000; go 0x00000400\0" \
+ "xloader=tftp 0x80180000 x-load.bin; " \
+ " cp.w 0x80180000 0x00000400 0x1000; go 0x00000400\0" \
"syncmode50=mw.w 0x1e442 0xc0c4; mw 0x6800a060 0xe30d1201\0" \
"syncmode=mw.w 0x1e442 0xe0f4; mw 0x6800a060 0xe30d1201\0" \
"norboot=cp32 0x18040000 0x80008000 0x200000; go 0x80008000\0" \
- "oneboot=onenand read 0x80008000 0x40000 0x200000; go 0x80008000\0"\
+ "oneboot=onenand read 0x80008000 0x40000 0x200000; go 0x80008000\0" \
"onesyncboot=run syncmode oneboot\0" \
- "updateb=tftp 0x80180000 u-boot-onenand.bin; onenand erase 0x0 0x20000; onenand write 0x80180000 0x0 0x20000\0" \
+ "updateb=tftp 0x80180000 u-boot-onenand.bin; " \
+ " onenand erase 0x0 0x20000; onenand write 0x80180000 0x0 0x20000\0" \
+ "ubi=setenv bootargs ${bootargs} ubi.mtd=4 ${mtdparts}; run uImage\0" \
"bootcmd=run uboot\0"
/*
@@ -164,14 +190,15 @@
/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-
-#define CONFIG_SYS_MEMTEST_START (OMAP2420_SDRC_CS0) /* memtest works on */
+/* Boot Argument Buffer Size */
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
+/* memtest works on */
+#define CONFIG_SYS_MEMTEST_START (OMAP2420_SDRC_CS0)
#define CONFIG_SYS_MEMTEST_END (OMAP2420_SDRC_CS0+SZ_31M)
#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
-#define CONFIG_SYS_LOAD_ADDR (OMAP2420_SDRC_CS0) /* default load address */
+/* default load address */
+#define CONFIG_SYS_LOAD_ADDR (OMAP2420_SDRC_CS0)
/* The 2420 has 12 GP timers, they can be driven by the SysClk (12/13/19.2)
* or by 32KHz clk, or from external sig. This rate is divided by a local
@@ -211,13 +238,15 @@
# define CONFIG_SYS_MAX_FLASH_BANKS 1
# define CONFIG_SYS_MAX_FLASH_SECT 1024
/*-----------------------------------------------------------------------
-
* CFI FLASH driver setup
*/
-# define CONFIG_SYS_FLASH_CFI 1 /* Flash memory is CFI compliant */
+/* Flash memory is CFI compliant */
+# define CONFIG_SYS_FLASH_CFI 1
# define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/cfi_flash.c */
-/* #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 */ /* Use buffered writes (~10x faster) */
-# define CONFIG_SYS_FLASH_PROTECTION 1 /* Use h/w sector protection*/
+/* Use buffered writes (~10x faster) */
+/* #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 */
+/* Use h/w sector protection*/
+# define CONFIG_SYS_FLASH_PROTECTION 1
#else /* !CONFIG_SYS_USE_NOR */
# define CONFIG_SYS_NO_FLASH 1
@@ -228,4 +257,15 @@
#define CONFIG_ENV_IS_IN_ONENAND 1
#define CONFIG_ENV_ADDR 0x00020000
+#ifdef CONFIG_SYS_USE_UBI
+#define CONFIG_JFFS2_CMDLINE
+#define MTDIDS_DEFAULT "onenand0=onenand"
+#define MTDPARTS_DEFAULT "mtdparts=onenand:128k(bootloader)," \
+ "128k(params)," \
+ "2m(kernel)," \
+ "16m(rootfs)," \
+ "32m(fs)," \
+ "-(ubifs)"
+#endif
+
#endif /* __CONFIG_H */
diff --git a/include/configs/at91cap9adk.h b/include/configs/at91cap9adk.h
index 30a7cb4..aeb06ac 100644
--- a/include/configs/at91cap9adk.h
+++ b/include/configs/at91cap9adk.h
@@ -29,9 +29,11 @@
/* ARM asynchronous clock */
#define AT91_CPU_NAME "AT91CAP9"
-#define AT91_MAIN_CLOCK 200000000 /* from 12 MHz crystal */
-#define AT91_MASTER_CLOCK 100000000 /* peripheral = main / 2 */
-#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
+#define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
+#define AT91_MASTER_CLOCK 100000000 /* peripheral */
+#define AT91_CPU_CLOCK 200000000 /* cpu */
+#define CFG_AT91_PLLB 0x10073e01 /* PLLB settings for USB */
+#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
#define AT91_SLOW_CLOCK 32768 /* slow clock */
@@ -136,6 +138,8 @@
#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00700000 /* AT91_BASE_UHP */
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91cap9"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
+#define CONFIG_USB_STORAGE 1
+#define CONFIG_CMD_FAT 1
#define CONFIG_SYS_LOAD_ADDR 0x72000000 /* load address */
diff --git a/include/configs/at91rm9200dk.h b/include/configs/at91rm9200dk.h
index 633a053..5c239d7 100644
--- a/include/configs/at91rm9200dk.h
+++ b/include/configs/at91rm9200dk.h
@@ -72,6 +72,8 @@
#define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
#define SDRC_MR_VAL3 0x00000000 /* Normal Mode */
#define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
+#else
+#define CONFIG_SKIP_RELOCATE_UBOOT
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
/*
* Size of malloc() pool
diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h
index be9a8eb..fbc470f 100644
--- a/include/configs/at91sam9260ek.h
+++ b/include/configs/at91sam9260ek.h
@@ -28,9 +28,12 @@
#define __CONFIG_H
/* ARM asynchronous clock */
-#define AT91_MAIN_CLOCK 198656000 /* from 18.432 MHz crystal */
-#define AT91_MASTER_CLOCK 99328000 /* peripheral = main / 2 */
-#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
+#define AT91_CPU_NAME "AT91SAM9260"
+#define AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */
+#define AT91_MASTER_CLOCK 100000000 /* peripheral */
+#define AT91_CPU_CLOCK 200000000 /* cpu */
+#define CFG_AT91_PLLB 0x107c3e18 /* PLLB settings for USB */
+#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
#define AT91_SLOW_CLOCK 32768 /* slow clock */
@@ -121,6 +124,7 @@
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
#define CONFIG_USB_STORAGE 1
+#define CONFIG_CMD_FAT 1
#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h
index add31c9..bd66823 100644
--- a/include/configs/at91sam9261ek.h
+++ b/include/configs/at91sam9261ek.h
@@ -29,9 +29,10 @@
/* ARM asynchronous clock */
#define AT91_CPU_NAME "AT91SAM9261"
-#define AT91_MAIN_CLOCK 198656000 /* from 18.432 MHz crystal */
-#define AT91_MASTER_CLOCK 99328000 /* peripheral = main / 2 */
-#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
+#define AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */
+#define AT91_MASTER_CLOCK 100000000 /* peripheral */
+#define AT91_CPU_CLOCK 200000000 /* cpu */
+#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
#define AT91_SLOW_CLOCK 32768 /* slow clock */
@@ -136,6 +137,7 @@
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9261"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
#define CONFIG_USB_STORAGE 1
+#define CONFIG_CMD_FAT 1
#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h
index 555cb7f..a2b09ca 100644
--- a/include/configs/at91sam9263ek.h
+++ b/include/configs/at91sam9263ek.h
@@ -29,9 +29,11 @@
/* ARM asynchronous clock */
#define AT91_CPU_NAME "AT91SAM9263"
-#define AT91_MAIN_CLOCK 199919000 /* from 16.367 MHz crystal */
-#define AT91_MASTER_CLOCK 99959500 /* peripheral = main / 2 */
-#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
+#define AT91_MAIN_CLOCK 16367660 /* 16.367 MHz crystal */
+#define AT91_MASTER_CLOCK 100000000 /* peripheral */
+#define AT91_CPU_CLOCK 200000000 /* cpu */
+#define CFG_AT91_PLLB 0x133a3e8d /* PLLB settings for USB */
+#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
#define AT91_SLOW_CLOCK 32768 /* slow clock */
@@ -142,6 +144,7 @@
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
#define CONFIG_USB_STORAGE 1
+#define CONFIG_CMD_FAT 1
#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h
index 648d60e..35dac47 100644
--- a/include/configs/at91sam9rlek.h
+++ b/include/configs/at91sam9rlek.h
@@ -29,9 +29,10 @@
/* ARM asynchronous clock */
#define AT91_CPU_NAME "AT91SAM9RL"
-#define AT91_MAIN_CLOCK 200000000 /* from 12.000 MHz crystal */
-#define AT91_MASTER_CLOCK 100000000 /* peripheral = main / 2 */
-#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
+#define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
+#define AT91_MASTER_CLOCK 100000000 /* peripheral */
+#define AT91_CPU_CLOCK 200000000 /* cpu */
+#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
#define AT91_SLOW_CLOCK 32768 /* slow clock */
diff --git a/include/configs/cmc_pu2.h b/include/configs/cmc_pu2.h
index 527921e..cdd308d 100644
--- a/include/configs/cmc_pu2.h
+++ b/include/configs/cmc_pu2.h
@@ -71,6 +71,8 @@
#define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
#define SDRC_MR_VAL3 0x00000000 /* Normal Mode */
#define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
+#else
+#define CONFIG_SKIP_RELOCATE_UBOOT
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
/*
diff --git a/include/configs/csb637.h b/include/configs/csb637.h
index 38fd25c..682db44 100644
--- a/include/configs/csb637.h
+++ b/include/configs/csb637.h
@@ -72,6 +72,8 @@
#define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
#define SDRC_MR_VAL3 0x00000000 /* Normal Mode */
#define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
+#else
+#define CONFIG_SKIP_RELOCATE_UBOOT
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
/*
* Size of malloc() pool
diff --git a/include/configs/kb9202.h b/include/configs/kb9202.h
index 55cda32..1ce8c69 100644
--- a/include/configs/kb9202.h
+++ b/include/configs/kb9202.h
@@ -51,6 +51,8 @@
#define CONFIG_INITRD_TAG 1
#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SKIP_RELOCATE_UBOOT /* undef this for direct boot from */
+ /* NOR flash without preloader */
#define CONFIG_SYS_LONGHELP
diff --git a/include/configs/mp2usb.h b/include/configs/mp2usb.h
index 2ffeae6..cbbdb0c 100644
--- a/include/configs/mp2usb.h
+++ b/include/configs/mp2usb.h
@@ -76,6 +76,8 @@
#define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
#define SDRC_MR_VAL3 0x00000000 /* Normal Mode */
#define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
+#else
+#define CONFIG_SKIP_RELOCATE_UBOOT
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
/*