diff options
Diffstat (limited to 'include/configs')
52 files changed, 622 insertions, 121 deletions
diff --git a/include/configs/ASH405.h b/include/configs/ASH405.h index a11a9b8..2ee4f80 100644 --- a/include/configs/ASH405.h +++ b/include/configs/ASH405.h @@ -125,7 +125,6 @@ #define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ #undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */ -#define CONFIG_SYS_IGNORE_405_UART_ERRATA_59 /* ignore ppc405gp errata #59 */ #define CONFIG_SYS_BASE_BAUD 691200 #undef CONFIG_UART1_CONSOLE /* define for uart1 as console */ diff --git a/include/configs/CATcenter.h b/include/configs/CATcenter.h index 1e36660..fa9fc23 100644 --- a/include/configs/CATcenter.h +++ b/include/configs/CATcenter.h @@ -184,7 +184,6 @@ #define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ #undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */ -#define CONFIG_SYS_IGNORE_405_UART_ERRATA_59 /* ignore ppc405gp errata #59 */ #define CONFIG_SYS_BASE_BAUD 691200 /* The following table includes the supported baudrates */ diff --git a/include/configs/CMS700.h b/include/configs/CMS700.h index eebce38..40fef88 100644 --- a/include/configs/CMS700.h +++ b/include/configs/CMS700.h @@ -125,7 +125,6 @@ #define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ #undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */ -#define CONFIG_SYS_IGNORE_405_UART_ERRATA_59 /* ignore ppc405gp errata #59 */ #define CONFIG_SYS_BASE_BAUD 691200 #define CONFIG_UART1_CONSOLE /* define for uart1 as console */ diff --git a/include/configs/CPCI2DP.h b/include/configs/CPCI2DP.h index 3287734..5c88c47 100644 --- a/include/configs/CPCI2DP.h +++ b/include/configs/CPCI2DP.h @@ -112,7 +112,6 @@ #define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ #undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */ -#define CONFIG_SYS_IGNORE_405_UART_ERRATA_59 /* ignore ppc405gp errata #59 */ #define CONFIG_SYS_BASE_BAUD 691200 #define CONFIG_UART1_CONSOLE /* define for uart1 as console */ diff --git a/include/configs/CPCI405.h b/include/configs/CPCI405.h index 89ba139..f032a8d 100644 --- a/include/configs/CPCI405.h +++ b/include/configs/CPCI405.h @@ -125,7 +125,6 @@ #define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ #undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */ -#define CONFIG_SYS_IGNORE_405_UART_ERRATA_59 /* ignore ppc405gp errata #59 */ #define CONFIG_SYS_BASE_BAUD 691200 /* The following table includes the supported baudrates */ diff --git a/include/configs/CPCI4052.h b/include/configs/CPCI4052.h index d0b4d11..2677cfb 100644 --- a/include/configs/CPCI4052.h +++ b/include/configs/CPCI4052.h @@ -134,7 +134,6 @@ #define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ #undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */ -#define CONFIG_SYS_IGNORE_405_UART_ERRATA_59 /* ignore ppc405gp errata #59 */ #define CONFIG_SYS_BASE_BAUD 691200 /* The following table includes the supported baudrates */ diff --git a/include/configs/CPCI405AB.h b/include/configs/CPCI405AB.h index 69c8c6e..aae0d73 100644 --- a/include/configs/CPCI405AB.h +++ b/include/configs/CPCI405AB.h @@ -133,7 +133,6 @@ #define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ #undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */ -#define CONFIG_SYS_IGNORE_405_UART_ERRATA_59 /* ignore ppc405gp errata #59 */ #define CONFIG_SYS_BASE_BAUD 691200 /* The following table includes the supported baudrates */ diff --git a/include/configs/CPCI405DT.h b/include/configs/CPCI405DT.h index be8c238..2333208 100644 --- a/include/configs/CPCI405DT.h +++ b/include/configs/CPCI405DT.h @@ -135,7 +135,6 @@ #define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ #undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */ -#define CONFIG_SYS_IGNORE_405_UART_ERRATA_59 /* ignore ppc405gp errata #59 */ #define CONFIG_SYS_BASE_BAUD 691200 /* The following table includes the supported baudrates */ diff --git a/include/configs/DP405.h b/include/configs/DP405.h index 884f3fe..187547d 100644 --- a/include/configs/DP405.h +++ b/include/configs/DP405.h @@ -117,7 +117,6 @@ #define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ #undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */ -#define CONFIG_SYS_IGNORE_405_UART_ERRATA_59 /* ignore ppc405gp errata #59 */ #define CONFIG_SYS_BASE_BAUD 691200 #undef CONFIG_UART1_CONSOLE /* define for uart1 as console */ diff --git a/include/configs/G2000.h b/include/configs/G2000.h index b445fae..bf9fd82 100644 --- a/include/configs/G2000.h +++ b/include/configs/G2000.h @@ -152,7 +152,6 @@ #define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ #undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */ -#define CONFIG_SYS_IGNORE_405_UART_ERRATA_59 /* ignore ppc405gp errata #59 */ #define CONFIG_SYS_BASE_BAUD 691200 #undef CONFIG_UART1_CONSOLE /* define for uart1 as console */ diff --git a/include/configs/HH405.h b/include/configs/HH405.h index e5de8ef..ed9a235 100644 --- a/include/configs/HH405.h +++ b/include/configs/HH405.h @@ -177,7 +177,6 @@ #define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ #undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */ -#define CONFIG_SYS_IGNORE_405_UART_ERRATA_59 /* ignore ppc405gp errata #59 */ #define CONFIG_SYS_BASE_BAUD 691200 #define CONFIG_UART1_CONSOLE /* define for uart1 as console */ diff --git a/include/configs/HUB405.h b/include/configs/HUB405.h index 1106b0d..0e7d2c0 100644 --- a/include/configs/HUB405.h +++ b/include/configs/HUB405.h @@ -118,7 +118,6 @@ #define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ #undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */ -#define CONFIG_SYS_IGNORE_405_UART_ERRATA_59 /* ignore ppc405gp errata #59 */ #define CONFIG_SYS_BASE_BAUD 691200 #undef CONFIG_UART1_CONSOLE /* define for uart1 as console */ diff --git a/include/configs/OCRTC.h b/include/configs/OCRTC.h index 32814d4..2591f1d 100644 --- a/include/configs/OCRTC.h +++ b/include/configs/OCRTC.h @@ -105,7 +105,6 @@ #define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ #undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */ -#define CONFIG_SYS_IGNORE_405_UART_ERRATA_59 /* ignore ppc405gp errata #59 */ #define CONFIG_SYS_BASE_BAUD 691200 /* The following table includes the supported baudrates */ diff --git a/include/configs/ORSG.h b/include/configs/ORSG.h index 58e9328..13d6e04 100644 --- a/include/configs/ORSG.h +++ b/include/configs/ORSG.h @@ -105,7 +105,6 @@ #define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ #undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */ -#define CONFIG_SYS_IGNORE_405_UART_ERRATA_59 /* ignore ppc405gp errata #59 */ #define CONFIG_SYS_BASE_BAUD 691200 /* The following table includes the supported baudrates */ diff --git a/include/configs/PCI405.h b/include/configs/PCI405.h index d0a37d7..4e39799 100644 --- a/include/configs/PCI405.h +++ b/include/configs/PCI405.h @@ -111,7 +111,6 @@ #define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ #undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */ -#define CONFIG_SYS_IGNORE_405_UART_ERRATA_59 /* ignore ppc405gp errata #59 */ #define CONFIG_SYS_BASE_BAUD 691200 /* The following table includes the supported baudrates */ diff --git a/include/configs/PLU405.h b/include/configs/PLU405.h index e9f1646..7f2337b 100644 --- a/include/configs/PLU405.h +++ b/include/configs/PLU405.h @@ -138,7 +138,6 @@ #define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ #undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */ -#define CONFIG_SYS_IGNORE_405_UART_ERRATA_59 /* ignore ppc405gp errata #59 */ #define CONFIG_SYS_BASE_BAUD 691200 #undef CONFIG_UART1_CONSOLE /* define for uart1 as console */ diff --git a/include/configs/PMC405.h b/include/configs/PMC405.h index 8d07d77..43e9532 100644 --- a/include/configs/PMC405.h +++ b/include/configs/PMC405.h @@ -132,7 +132,6 @@ #define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ #undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */ -#define CONFIG_SYS_IGNORE_405_UART_ERRATA_59 /* ignore ppc405gp errata #59 */ #define CONFIG_SYS_BASE_BAUD 691200 /* The following table includes the supported baudrates */ diff --git a/include/configs/PPChameleonEVB.h b/include/configs/PPChameleonEVB.h index d4322b6..d2eae1d 100644 --- a/include/configs/PPChameleonEVB.h +++ b/include/configs/PPChameleonEVB.h @@ -192,7 +192,6 @@ #define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ #undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */ -#define CONFIG_SYS_IGNORE_405_UART_ERRATA_59 /* ignore ppc405gp errata #59 */ #define CONFIG_SYS_BASE_BAUD 691200 /* The following table includes the supported baudrates */ diff --git a/include/configs/SPD823TS.h b/include/configs/SPD823TS.h index 9201346..d4154d2 100644 --- a/include/configs/SPD823TS.h +++ b/include/configs/SPD823TS.h @@ -67,6 +67,7 @@ #define CONFIG_CMD_IDE +#undef CONFIG_CMD_ENV #undef CONFIG_CMD_FLASH diff --git a/include/configs/VCMA9.h b/include/configs/VCMA9.h index 83d0d56..d9bcf6b 100644 --- a/include/configs/VCMA9.h +++ b/include/configs/VCMA9.h @@ -36,7 +36,6 @@ #define CONFIG_ARM920T 1 /* This is an ARM920T Core */ #define CONFIG_S3C2410 1 /* in a SAMSUNG S3C2410 SoC */ #define CONFIG_VCMA9 1 /* on a MPL VCMA9 Board */ -#define LITTLEENDIAN 1 /* used by usb_ohci.c */ /* input clock of PLL */ #define CONFIG_SYS_CLK_FREQ 12000000/* VCMA9 has 12MHz input clock */ diff --git a/include/configs/VOH405.h b/include/configs/VOH405.h index f173bcc..38a1d0d 100644 --- a/include/configs/VOH405.h +++ b/include/configs/VOH405.h @@ -134,7 +134,6 @@ #define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ #undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */ -#define CONFIG_SYS_IGNORE_405_UART_ERRATA_59 /* ignore ppc405gp errata #59 */ #define CONFIG_SYS_BASE_BAUD 691200 #define CONFIG_UART1_CONSOLE /* define for uart1 as console */ diff --git a/include/configs/VOM405.h b/include/configs/VOM405.h index 90efc6d..db00c65 100644 --- a/include/configs/VOM405.h +++ b/include/configs/VOM405.h @@ -121,7 +121,6 @@ #define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ #undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */ -#define CONFIG_SYS_IGNORE_405_UART_ERRATA_59 /* ignore ppc405gp errata #59 */ #define CONFIG_SYS_BASE_BAUD 691200 #undef CONFIG_UART1_CONSOLE /* define for uart1 as console */ diff --git a/include/configs/WUH405.h b/include/configs/WUH405.h index de6e12f..99188bc 100644 --- a/include/configs/WUH405.h +++ b/include/configs/WUH405.h @@ -122,7 +122,6 @@ #define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ #undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */ -#define CONFIG_SYS_IGNORE_405_UART_ERRATA_59 /* ignore ppc405gp errata #59 */ #define CONFIG_SYS_BASE_BAUD 691200 #define CONFIG_UART1_CONSOLE /* define for uart1 as console */ diff --git a/include/configs/actux1.h b/include/configs/actux1.h index a3b04b1..adbc399 100644 --- a/include/configs/actux1.h +++ b/include/configs/actux1.h @@ -39,6 +39,7 @@ #define CONFIG_DISPLAY_CPUINFO 1 #define CONFIG_DISPLAY_BOARDINFO 1 +#define CONFIG_IXP_SERIAL #define CONFIG_SYS_IXP425_CONSOLE IXP425_UART2 #define CONFIG_BAUDRATE 115200 #define CONFIG_BOOTDELAY 3 @@ -172,8 +173,6 @@ /* include IXP4xx NPE support */ #define CONFIG_IXP4XX_NPE 1 -/* use separate flash sector with ucode images */ -#define CONFIG_IXP4XX_NPE_EXT_UCODE_BASE 0x50040000 #define CONFIG_NET_MULTI 1 /* NPE0 PHY address */ #define CONFIG_PHY_ADDR 0 @@ -208,6 +207,7 @@ #define CONFIG_SYS_USE_PPCENV 1 #define CONFIG_EXTRA_ENV_SETTINGS \ + "npe_ucode=50040000\0" \ "mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root)\0" \ "kerneladdr=50050000\0" \ "rootaddr=50170000\0" \ diff --git a/include/configs/actux2.h b/include/configs/actux2.h index 7e6e8f2..4c579eb 100644 --- a/include/configs/actux2.h +++ b/include/configs/actux2.h @@ -32,6 +32,7 @@ #define CONFIG_DISPLAY_CPUINFO 1 #define CONFIG_DISPLAY_BOARDINFO 1 +#define CONFIG_IXP_SERIAL #define CONFIG_SYS_IXP425_CONSOLE IXP425_UART2 #define CONFIG_BAUDRATE 115200 #define CONFIG_BOOTDELAY 5 @@ -147,8 +148,6 @@ /* include IXP4xx NPE support */ #define CONFIG_IXP4XX_NPE 1 -/* use separate flash sector with ucode images */ -#define CONFIG_IXP4XX_NPE_EXT_UCODE_BASE 0x50040000 #define CONFIG_NET_MULTI 1 /* NPE0 PHY address */ #define CONFIG_PHY_ADDR 0x00 @@ -185,6 +184,7 @@ #define CONFIG_SYS_USE_PPCENV 1 #define CONFIG_EXTRA_ENV_SETTINGS \ + "npe_ucode=50040000\0" \ "mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root)\0" \ "kerneladdr=50050000\0" \ "rootaddr=50170000\0" \ diff --git a/include/configs/actux3.h b/include/configs/actux3.h index 3f42ed4..694f522 100644 --- a/include/configs/actux3.h +++ b/include/configs/actux3.h @@ -32,6 +32,7 @@ #define CONFIG_DISPLAY_CPUINFO 1 #define CONFIG_DISPLAY_BOARDINFO 1 +#define CONFIG_IXP_SERIAL #define CONFIG_SYS_IXP425_CONSOLE IXP425_UART2 #define CONFIG_BAUDRATE 115200 #define CONFIG_BOOTDELAY 3 @@ -146,8 +147,6 @@ /* include IXP4xx NPE support */ #define CONFIG_IXP4XX_NPE 1 -/* use separate flash sector with ucode images */ -#define CONFIG_IXP4XX_NPE_EXT_UCODE_BASE 0x50040000 #define CONFIG_NET_MULTI 1 /* NPE0 PHY address */ @@ -185,6 +184,7 @@ #define CONFIG_SYS_USE_PPCENV 1 #define CONFIG_EXTRA_ENV_SETTINGS \ + "npe_ucode=50040000\0" \ "mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root)\0" \ "kerneladdr=50050000\0" \ "rootaddr=50170000\0" \ diff --git a/include/configs/actux4.h b/include/configs/actux4.h index 3cf1b20..cdc9956 100644 --- a/include/configs/actux4.h +++ b/include/configs/actux4.h @@ -32,6 +32,7 @@ #define CONFIG_DISPLAY_CPUINFO 1 #define CONFIG_DISPLAY_BOARDINFO 1 +#define CONFIG_IXP_SERIAL #define CONFIG_SYS_IXP425_CONSOLE IXP425_UART1 #define CONFIG_BAUDRATE 115200 #define CONFIG_BOOTDELAY 3 @@ -149,8 +150,6 @@ /* include IXP4xx NPE support */ #define CONFIG_IXP4XX_NPE 1 -/* use separate flash sector with ucode images */ -#define CONFIG_IXP4XX_NPE_EXT_UCODE_BASE 0x51000000 #define CONFIG_NET_MULTI 1 /* NPE0 PHY address */ @@ -181,6 +180,7 @@ #define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x3f000) #define CONFIG_EXTRA_ENV_SETTINGS \ + "npe_ucode=51000000\0" \ "mtd=IXP4XX-Flash.0:252k(uboot),4k(uboot_env);" \ "IXP4XX-Flash.1:128k(ucode),1280k(linux),-(root)\0" \ "kerneladdr=51020000\0" \ diff --git a/include/configs/afeb9260.h b/include/configs/afeb9260.h index e996bbd..9eed342 100644 --- a/include/configs/afeb9260.h +++ b/include/configs/afeb9260.h @@ -114,7 +114,6 @@ /* USB */ #define CONFIG_USB_OHCI_NEW 1 -#define LITTLEENDIAN 1 #define CONFIG_DOS_PARTITION 1 #define CONFIG_SYS_USB_OHCI_CPU_INIT 1 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9260_UHP_BASE */ diff --git a/include/configs/at91cap9adk.h b/include/configs/at91cap9adk.h index f1c5526..01da99b 100644 --- a/include/configs/at91cap9adk.h +++ b/include/configs/at91cap9adk.h @@ -131,7 +131,6 @@ /* USB */ #define CONFIG_USB_OHCI_NEW 1 -#define LITTLEENDIAN 1 #define CONFIG_DOS_PARTITION 1 #define CONFIG_SYS_USB_OHCI_CPU_INIT 1 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00700000 /* AT91_BASE_UHP */ diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index 4501cae..2f1a41f 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -116,7 +116,6 @@ /* USB */ #define CONFIG_USB_OHCI_NEW 1 -#define LITTLEENDIAN 1 #define CONFIG_DOS_PARTITION 1 #define CONFIG_SYS_USB_OHCI_CPU_INIT 1 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9260_UHP_BASE */ diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h index 668fe3b..ebecfa4 100644 --- a/include/configs/at91sam9261ek.h +++ b/include/configs/at91sam9261ek.h @@ -129,7 +129,6 @@ /* USB */ #define CONFIG_USB_OHCI_NEW 1 -#define LITTLEENDIAN 1 #define CONFIG_DOS_PARTITION 1 #define CONFIG_SYS_USB_OHCI_CPU_INIT 1 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9261_UHP_BASE */ diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index c6603ff..09b871a 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -136,7 +136,6 @@ /* USB */ #define CONFIG_USB_OHCI_NEW 1 -#define LITTLEENDIAN 1 #define CONFIG_DOS_PARTITION 1 #define CONFIG_SYS_USB_OHCI_CPU_INIT 1 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a00000 /* AT91SAM9263_UHP_BASE */ diff --git a/include/configs/bf533-ezkit.h b/include/configs/bf533-ezkit.h index e871737..48c0252 100644 --- a/include/configs/bf533-ezkit.h +++ b/include/configs/bf533-ezkit.h @@ -198,7 +198,7 @@ #define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */ #define CONFIG_SYS_I2C_SPEED 50000 -#define CONFIG_SYS_I2C_SLAVE 0xFE +#define CONFIG_SYS_I2C_SLAVE 0 #define CONFIG_SYS_BOOTM_LEN 0x4000000 /* Large Image Length, set to 64 Meg */ diff --git a/include/configs/bf533-stamp.h b/include/configs/bf533-stamp.h index 5ad99a2..ee41c7e 100644 --- a/include/configs/bf533-stamp.h +++ b/include/configs/bf533-stamp.h @@ -300,7 +300,7 @@ #define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */ #define CONFIG_SYS_I2C_SPEED 50000 -#define CONFIG_SYS_I2C_SLAVE 0xFE +#define CONFIG_SYS_I2C_SLAVE 0 #endif /* CONFIG_SOFT_I2C */ /* diff --git a/include/configs/bf537-stamp.h b/include/configs/bf537-stamp.h index ac5aaa5..27567fa 100644 --- a/include/configs/bf537-stamp.h +++ b/include/configs/bf537-stamp.h @@ -305,13 +305,11 @@ /* * I2C settings - * By default PF1 is used as SDA and PF0 as SCL on the Stamp board */ -/* #define CONFIG_SOFT_I2C 1*/ /* I2C bit-banged */ -#define CONFIG_HARD_I2C 1 /* I2C TWI */ -#if defined CONFIG_HARD_I2C -#define CONFIG_TWICLK_KHZ 50 -#endif +#define CONFIG_HARD_I2C 1 +#define CONFIG_BFIN_TWI_I2C 1 +#define CFG_I2C_SPEED 50000 +#define CFG_I2C_SLAVE 0 #define CONFIG_EBIU_SDRRC_VAL 0x306 #define CONFIG_EBIU_SDGCTL_VAL 0x91114d @@ -321,39 +319,6 @@ #define CONFIG_EBIU_AMBCTL0_VAL 0x7BB07BB0 #define CONFIG_EBIU_AMBCTL1_VAL 0xFFC27BB0 -#if defined CONFIG_SOFT_I2C -/* - * Software (bit-bang) I2C driver configuration - */ -#define PF_SCL PF0 -#define PF_SDA PF1 - -#define I2C_INIT (*pFIO_DIR |= PF_SCL); asm("ssync;") -#define I2C_ACTIVE (*pFIO_DIR |= PF_SDA); *pFIO_INEN &= ~PF_SDA; asm("ssync;") -#define I2C_TRISTATE (*pFIO_DIR &= ~PF_SDA); *pFIO_INEN |= PF_SDA; asm("ssync;") -#define I2C_READ ((volatile)(*pFIO_FLAG_D & PF_SDA) != 0); asm("ssync;") -#define I2C_SDA(bit) if(bit) { \ - *pFIO_FLAG_S = PF_SDA; \ - asm("ssync;"); \ - } \ - else { \ - *pFIO_FLAG_C = PF_SDA; \ - asm("ssync;"); \ - } -#define I2C_SCL(bit) if(bit) { \ - *pFIO_FLAG_S = PF_SCL; \ - asm("ssync;"); \ - } \ - else { \ - *pFIO_FLAG_C = PF_SCL; \ - asm("ssync;"); \ - } -#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */ -#endif - -#define CONFIG_SYS_I2C_SPEED 50000 -#define CONFIG_SYS_I2C_SLAVE 0xFE - /* 0xFF, 0x7BB07BB0, 0x22547BB0 */ /* #define AMGCTLVAL (AMBEN_P0 | AMBEN_P1 | AMBEN_P2 | AMCKEN) #define AMBCTL0VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B1TT_4 | ~B1RDYPOL | \ diff --git a/include/configs/csb272.h b/include/configs/csb272.h index 874f2c0..5d3b09a 100644 --- a/include/configs/csb272.h +++ b/include/configs/csb272.h @@ -162,7 +162,6 @@ * */ #define CONFIG_SYS_EXT_SERIAL_CLOCK 3868400 /* use external serial clock */ -#undef CONFIG_SYS_IGNORE_405_UART_ERRATA_59 /* ignore ppc405gp errata #59 */ #undef CONFIG_SYS_BASE_BAUD #define CONFIG_BAUDRATE 38400 /* Default baud rate */ #define CONFIG_SYS_BAUDRATE_TABLE \ diff --git a/include/configs/csb472.h b/include/configs/csb472.h index 2e30e69..a33efde 100644 --- a/include/configs/csb472.h +++ b/include/configs/csb472.h @@ -161,7 +161,6 @@ * */ #undef CONFIG_SYS_EXT_SERIAL_CLOCK /* use internal serial clock */ -#undef CONFIG_SYS_IGNORE_405_UART_ERRATA_59 /* ignore ppc405gp errata #59 */ #define CONFIG_SYS_BASE_BAUD 691200 #define CONFIG_BAUDRATE 38400 /* Default baud rate */ #define CONFIG_SYS_BAUDRATE_TABLE \ diff --git a/include/configs/davinci_dvevm.h b/include/configs/davinci_dvevm.h index a727f56..667c0d8 100644 --- a/include/configs/davinci_dvevm.h +++ b/include/configs/davinci_dvevm.h @@ -171,6 +171,8 @@ #define CONFIG_SYS_LONGHELP #define CONFIG_CRC32_VERIFY #define CONFIG_MX_CYCLIC +#define CONFIG_MUSB_HCD +#define CONFIG_USB_DAVINCI /*===================*/ /* Linux Information */ /*===================*/ @@ -203,6 +205,22 @@ #else #error "Either CONFIG_SYS_USE_NAND or CONFIG_SYS_USE_NOR _MUST_ be defined !!!" #endif +/*==========================*/ +/* USB MSC support (if any) */ +/*==========================*/ +#ifdef CONFIG_USB_DAVINCI +#define CONFIG_CMD_USB +#ifdef CONFIG_MUSB_HCD +#define CONFIG_USB_STORAGE +#define CONFIG_CMD_STORAGE +#define CONFIG_CMD_FAT +#define CONFIG_DOS_PARTITION +#endif +#ifdef CONFIG_USB_KEYBOARD +#define CONFIG_SYS_USB_EVENT_POLL +#define CONFIG_PREBOOT "usb start" +#endif +#endif /*=======================*/ /* KGDB support (if any) */ /*=======================*/ diff --git a/include/configs/delta.h b/include/configs/delta.h index fd97b74..abb2676 100644 --- a/include/configs/delta.h +++ b/include/configs/delta.h @@ -131,8 +131,6 @@ #define CONFIG_SYS_USB_OHCI_SLOT_NAME "delta" #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3 -#define LITTLEENDIAN 1 /* used by usb_ohci.c */ - #define CONFIG_BOOTDELAY -1 #define CONFIG_ETHADDR 08:00:3e:26:0a:5b #define CONFIG_NETMASK 255.255.0.0 diff --git a/include/configs/gdppc440etx.h b/include/configs/gdppc440etx.h new file mode 100644 index 0000000..d193919 --- /dev/null +++ b/include/configs/gdppc440etx.h @@ -0,0 +1,194 @@ +/* + * (C) Copyright 2008 + * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de + * + * Based on include/configs/yosemite.h + * (C) Copyright 2005-2007 + * Stefan Roese, DENX Software Engineering, sr@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * gdppc440etx.h - configuration for G&D 440EP/GR ETX-Module + */ +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * High Level Configuration Options + */ +#define CONFIG_440GR 1 /* Specific PPC440GR support */ +#define CONFIG_HOSTNAME gdppc440etx +#define CONFIG_440 1 /* ... PPC440 family */ +#define CONFIG_4xx 1 /* ... PPC4xx family */ +#define CONFIG_SYS_CLK_FREQ 66666666 /* external freq to pll */ + +/* + * Include common defines/options for all AMCC eval boards + */ +#include "amcc-common.h" + +#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f*/ +#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ + +/* + * Base addresses -- Note these are effective addresses where the + * actual resources get mapped (not physical addresses) + */ +#define CONFIG_SYS_FLASH_BASE 0xfc000000 /* start of FLASH */ +#define CONFIG_SYS_PCI_MEMBASE 0xa0000000 /* mapped pci memory */ +#define CONFIG_SYS_PCI_MEMBASE1 CONFIG_SYS_PCI_MEMBASE + 0x10000000 +#define CONFIG_SYS_PCI_MEMBASE2 CONFIG_SYS_PCI_MEMBASE1 + 0x10000000 +#define CONFIG_SYS_PCI_MEMBASE3 CONFIG_SYS_PCI_MEMBASE2 + 0x10000000 + +/*Don't change either of these*/ +#define CONFIG_SYS_PERIPHERAL_BASE 0xef600000 /* internal peripheral*/ +#define CONFIG_SYS_PCI_BASE 0xe0000000 /* internal PCI regs */ +/*Don't change either of these*/ + +#define CONFIG_SYS_USB_DEVICE 0x50000000 +#define CONFIG_SYS_BOOT_BASE_ADDR 0xf0000000 + +/* + * Initial RAM & stack pointer (placed in SDRAM) + */ +#define CONFIG_SYS_INIT_RAM_DCACHE 1 /* d-cache as init ram*/ +#define CONFIG_SYS_INIT_RAM_ADDR 0x70000000 /* DCache */ +#define CONFIG_SYS_INIT_RAM_END (4 << 10) +#define CONFIG_SYS_GBL_DATA_SIZE 256 /* num bytes init data*/ +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END \ + - CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET + +/* + * Serial Port + */ +#define CONFIG_SYS_EXT_SERIAL_CLOCK 11059200 /* ext. 11.059MHz clk */ +#define CONFIG_UART1_CONSOLE + +/* + * Environment + * Define here the location of the environment variables (FLASH or EEPROM). + * Note: DENX encourages to use redundant environment in FLASH. + */ +#define CONFIG_ENV_IS_IN_FLASH 1 /* FLASH for env. vars*/ + +/* + * FLASH related + */ +#define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible*/ +#define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */ +#define CONFIG_SYS_FLASH_CFI_AMD_RESET 1 /* AMD RESET for STM 29W320DB!*/ + +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ +#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors/chip */ + +#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout/Flash Erase (in ms)*/ +#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout/Flash Write (in ms)*/ + +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1/* use buffered writes (20x faster)*/ + +#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ + +#ifdef CONFIG_ENV_IS_IN_FLASH +#define CONFIG_ENV_SECT_SIZE 0x20000 /* size of one complete sector*/ +#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE-CONFIG_ENV_SECT_SIZE) +#define CONFIG_ENV_SIZE 0x2000 /* Total Size of Env. Sector */ + +/* Address and size of Redundant Environment Sector */ +#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE) +#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) +#endif /* CONFIG_ENV_IS_IN_FLASH */ + +/* + * DDR SDRAM + */ +#undef CONFIG_SPD_EEPROM /* Don't use SPD EEPROM for setup*/ +#define CONFIG_SYS_KBYTES_SDRAM (128 * 1024) /* 128MB */ +#define CONFIG_SYS_SDRAM_BANKS (2) + +#define CONFIG_SDRAM_BANK0 +#define CONFIG_SDRAM_BANK1 + +#define CONFIG_SYS_SDRAM0_TR0 0x410a4012 +#define CONFIG_SYS_SDRAM0_WDDCTR 0x40000000 +#define CONFIG_SYS_SDRAM0_RTR 0x04080000 +#define CONFIG_SYS_SDRAM0_CFG0 0x80000000 + +#undef CONFIG_SDRAM_ECC + +/* + * I2C + */ +#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed+slave address*/ + +/* + * Default environment variables + */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + CONFIG_AMCC_DEF_ENV \ + CONFIG_AMCC_DEF_ENV_POWERPC \ + CONFIG_AMCC_DEF_ENV_NOR_UPD \ + "kernel_addr=fc000000\0" \ + "ramdisk_addr=fc180000\0" \ + "" + +#define CONFIG_HAS_ETH1 1 /* add support for "eth1addr" */ +#define CONFIG_PHY_ADDR 1 +#define CONFIG_PHY1_ADDR 3 + +#ifdef DEBUG +#define CONFIG_PANIC_HANG +#endif + +/* + * Commands additional to the ones defined in amcc-common.h + */ +#define CONFIG_CMD_PCI +#undef CONFIG_CMD_EEPROM + +/* + * PCI stuff + */ + +/* General PCI */ +#define CONFIG_PCI /* include pci support */ +#undef CONFIG_PCI_PNP /* do (not) pci plug-and-play */ +#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup*/ +#define CONFIG_SYS_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to \ + CONFIG_SYS_PCI_MEMBASE*/ + +/* Board-specific PCI */ +#define CONFIG_SYS_PCI_TARGET_INIT +#define CONFIG_SYS_PCI_MASTER_INIT + +#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */ +#define CONFIG_SYS_PCI_SUBSYS_ID 0xcafe /* tbd */ + +/* + * External Bus Controller (EBC) Setup + */ +#define CONFIG_SYS_FLASH CONFIG_SYS_FLASH_BASE + +/* Memory Bank 0 (NOR-FLASH) initialization */ +#define CONFIG_SYS_EBC_PB0AP 0x03017200 +#define CONFIG_SYS_EBC_PB0CR (CONFIG_SYS_FLASH | 0xda000) + +#endif /* __CONFIG_H */ diff --git a/include/configs/ixdp425.h b/include/configs/ixdp425.h index 35b0451..70f3987 100644 --- a/include/configs/ixdp425.h +++ b/include/configs/ixdp425.h @@ -73,6 +73,7 @@ #define CONFIG_PCI +#define CONFIG_IXP_PCI #define CONFIG_NET_MULTI #define CONFIG_EEPRO100 @@ -134,6 +135,7 @@ /* * select serial console configuration */ +#define CONFIG_IXP_SERIAL #define CONFIG_SYS_IXP425_CONSOLE IXP425_UART1 /* we use UART1 for console */ /* diff --git a/include/configs/ixdpg425.h b/include/configs/ixdpg425.h index 528bccd..193008e 100644 --- a/include/configs/ixdpg425.h +++ b/include/configs/ixdpg425.h @@ -72,6 +72,7 @@ /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE +#define CONFIG_IXP_SERIAL #define CONFIG_BAUDRATE 115200 #define CONFIG_SYS_IXP425_CONSOLE IXP425_UART1 /* we use UART1 for console */ diff --git a/include/configs/korat.h b/include/configs/korat.h index d56da14..eb2c1d4 100644 --- a/include/configs/korat.h +++ b/include/configs/korat.h @@ -1,5 +1,5 @@ /* - * (C) Copyright 2007-2008 + * (C) Copyright 2007-2009 * Larry Johnson, lrj@acm.org * * (C) Copyright 2006-2007 @@ -138,15 +138,14 @@ /* * DDR SDRAM */ -#define CONFIG_SYS_MBYTES_SDRAM (512) /* 512 MiB TODO: remove */ #define CONFIG_DDR_DATA_EYE /* use DDR2 optimization */ #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for setup */ #define CONFIG_ZERO_SDRAM /* Zero SDRAM after setup */ #define CONFIG_DDR_ECC /* Use ECC when available */ #define SPD_EEPROM_ADDRESS {0x50} #define CONFIG_PROG_SDRAM_TLB -#define CONFIG_SYS_MEM_TOP_HIDE (4 << 10) /* don't use last 4kbytes */ - /* 440EPx errata CHIP 11 */ +#define CONFIG_SYS_MEM_TOP_HIDE (4 << 10) /* don't use last 4 KiB as */ + /* per 440EPx Errata CHIP_11 */ /* * I2C @@ -173,42 +172,59 @@ #define CONFIG_SYS_DTT_MIN_TEMP -30 #define CONFIG_PREBOOT "echo;" \ - "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \ + "echo Type \\\"run flash_cf\\\" to mount from CompactFlash(R);" \ "echo" #undef CONFIG_BOOTARGS /* Setup some board specific values for the default environment variables */ #define CONFIG_HOSTNAME korat -#define CONFIG_SYS_BOOTFILE "bootfile=/tftpboot/korat/uImage\0" -#define CONFIG_SYS_ROOTPATH "rootpath=/opt/eldk/ppc_4xxFP\0" /* Note: kernel_addr and ramdisk_addr assume that FLASH1 is 64 MiB. */ #define CONFIG_EXTRA_ENV_SETTINGS \ - CONFIG_SYS_BOOTFILE \ - CONFIG_SYS_ROOTPATH \ + "u_boot=korat/u-boot.bin\0" \ + "load=tftp 200000 ${u_boot}\0" \ + "update=protect off F7F60000 F7FBFFFF;erase F7F60000 F7FBFFFF;" \ + "cp.b ${fileaddr} F7F60000 ${filesize};protect on " \ + "F7F60000 F7FBFFFF\0" \ + "upd=run load update\0" \ + "bootfile=korat/uImage\0" \ + "dtb=korat/korat.dtb\0" \ + "kernel_addr=F4000000\0" \ + "ramdisk_addr=F4400000\0" \ + "dtb_addr=F41E0000\0" \ + "udl=tftp 200000 ${bootfile}; erase F4000000 F41DFFFF; " \ + "cp.b ${fileaddr} F4000000 ${filesize}\0" \ + "udd=tftp 200000 ${dtb}; erase F41E0000 F41FFFFF; " \ + "cp.b ${fileaddr} F41E0000 ${filesize}\0" \ + "ll=setenv kernel_addr 200000; setenv dtb_addr 1000000; " \ + "tftp ${kernel_addr} ${uImage}; tftp ${dtb_addr} " \ + "${dtb}\0" \ + "rd_size=73728\0" \ + "ramargs=setenv bootargs root=/dev/ram rw " \ + "ramdisk_size=${rd_size}\0" \ + "usbdev=sda1\0" \ + "usbargs=setenv bootargs root=/dev/${usbdev} ro rootdelay=10\0" \ + "rootpath=/opt/eldk/ppc_4xxFP\0" \ "netdev=eth0\0" \ "nfsargs=setenv bootargs root=/dev/nfs rw " \ "nfsroot=${serverip}:${rootpath}\0" \ - "ramargs=setenv bootargs root=/dev/ram rw\0" \ + "pciclk=33\0" \ + "addide=setenv bootargs ${bootargs} ide=reverse " \ + "idebus=${pciclk}\0" \ "addip=setenv bootargs ${bootargs} " \ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ ":${hostname}:${netdev}:off panic=1\0" \ "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0"\ - "flash_nfs=run nfsargs addip addtty;" \ - "bootm ${kernel_addr}\0" \ - "flash_self=run ramargs addip addtty;" \ - "bootm ${kernel_addr} ${ramdisk_addr}\0" \ - "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;" \ - "bootm\0" \ - "kernel_addr=F4000000\0" \ - "ramdisk_addr=F4400000\0" \ - "load=tftp 200000 /tftpboot/${hostname}/u-boot.bin\0" \ - "update=protect off FFFA0000 FFFFFFFF;era FFFA0000 FFFFFFFF;" \ - "cp.b 200000 FFFA0000 60000\0" \ - "upd=run load update\0" \ + "flash_cf=run usbargs addide addip addtty; " \ + "bootm ${kernel_addr} - ${dtb_addr}\0" \ + "flash_nfs=run nfsargs addide addip addtty; " \ + "bootm ${kernel_addr} - ${dtb_addr}\0" \ + "flash_self=run ramargs addip addtty; " \ + "bootm ${kernel_addr} ${ramdisk_addr} ${dtb_addr}\0" \ "" -#define CONFIG_BOOTCOMMAND "run flash_self" + +#define CONFIG_BOOTCOMMAND "run flash_cf" #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ @@ -278,15 +294,15 @@ #define CONFIG_CMD_USB /* POST support */ -#define CONFIG_POST (CONFIG_SYS_POST_CACHE | \ - CONFIG_SYS_POST_CPU | \ - CONFIG_SYS_POST_ECC | \ - CONFIG_SYS_POST_ETHER | \ - CONFIG_SYS_POST_FPU | \ - CONFIG_SYS_POST_I2C | \ - CONFIG_SYS_POST_MEMORY | \ - CONFIG_SYS_POST_RTC | \ - CONFIG_SYS_POST_SPR | \ +#define CONFIG_POST (CONFIG_SYS_POST_CACHE | \ + CONFIG_SYS_POST_CPU | \ + CONFIG_SYS_POST_ECC | \ + CONFIG_SYS_POST_ETHER | \ + CONFIG_SYS_POST_FPU | \ + CONFIG_SYS_POST_I2C | \ + CONFIG_SYS_POST_MEMORY | \ + CONFIG_SYS_POST_RTC | \ + CONFIG_SYS_POST_SPR | \ CONFIG_SYS_POST_UART) #define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) @@ -403,7 +419,7 @@ * GPIO10 Alt1 O x PerCS5 to expansion bus connector * GPIO11 Alt1 I x PerErr * GPIO12 GPIO O 0 ATMega !Reset - * GPIO13 GPIO O 1 SPI Atmega !SS + * GPIO13 GPIO x x Test Point 2 (TP2) * GPIO14 GPIO O 1 Write protect EEPROM #1 (0xA8) * GPIO15 GPIO O 0 CPU Run LED !On * GPIO16 Alt1 O x GMC1TxD0 @@ -478,7 +494,7 @@ {GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO10 EBC_CS_N(5) */ \ {GPIO0_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO11 EBC_BUS_ERR */ \ {GPIO0_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, /* GPIO12 */ \ -{GPIO0_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_1}, /* GPIO13 */ \ +{GPIO0_BASE, GPIO_DIS, GPIO_SEL , GPIO_OUT_0}, /* GPIO13 */ \ {GPIO0_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_1}, /* GPIO14 */ \ {GPIO0_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, /* GPIO15 */ \ {GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_1}, /* GPIO16 GMCTxD(4) */ \ diff --git a/include/configs/mp2usb.h b/include/configs/mp2usb.h index fb10616..9ac7e9a 100644 --- a/include/configs/mp2usb.h +++ b/include/configs/mp2usb.h @@ -216,7 +216,6 @@ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ #define CONFIG_SYS_DEVICE_DEREGISTER /* needs device_deregister */ -#define LITTLEENDIAN 1 /* used by usb_ohci.c */ #define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_HZ_CLOCK (AT91C_MASTER_CLOCK/2) /* AT91C_TC0_CMR is implicitly set to */ diff --git a/include/configs/pdnb3.h b/include/configs/pdnb3.h index f8aac1a..4da401f 100644 --- a/include/configs/pdnb3.h +++ b/include/configs/pdnb3.h @@ -68,6 +68,7 @@ /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE +#define CONFIG_IXP_SERIAL #define CONFIG_BAUDRATE 115200 #define CONFIG_SYS_IXP425_CONSOLE IXP425_UART1 /* we use UART1 for console */ diff --git a/include/configs/sbc405.h b/include/configs/sbc405.h index c156820..7197aaf 100644 --- a/include/configs/sbc405.h +++ b/include/configs/sbc405.h @@ -147,7 +147,6 @@ #define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ #undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */ -#define CONFIG_SYS_IGNORE_405_UART_ERRATA_59 /* ignore ppc405gp errata #59 */ #define CONFIG_SYS_BASE_BAUD 691200 /* The following table includes the supported baudrates */ diff --git a/include/configs/sh7763rdp.h b/include/configs/sh7763rdp.h index 8a76dad..4ea79cf 100644 --- a/include/configs/sh7763rdp.h +++ b/include/configs/sh7763rdp.h @@ -118,6 +118,7 @@ #define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER) /* Ether */ +#define CONFIG_NET_MULTI 1 #define CONFIG_SH_ETHER 1 #define CONFIG_SH_ETHER_USE_PORT (1) #define CONFIG_SH_ETHER_PHY_ADDR (0x01) diff --git a/include/configs/sh7785lcr.h b/include/configs/sh7785lcr.h index 1b59059..ebca448 100644 --- a/include/configs/sh7785lcr.h +++ b/include/configs/sh7785lcr.h @@ -123,7 +123,6 @@ #undef CONFIG_SYS_DIRECT_FLASH_TFTP /* R8A66597 */ -#define LITTLEENDIAN /* for include/usb.h */ #define CONFIG_USB_R8A66597_HCD #define CONFIG_R8A66597_BASE_ADDR SH7785LCR_USB_BASE #define CONFIG_R8A66597_XTAL 0x0000 /* 12MHz */ diff --git a/include/configs/smdk6400.h b/include/configs/smdk6400.h index 57c82d1..c61667f 100644 --- a/include/configs/smdk6400.h +++ b/include/configs/smdk6400.h @@ -293,7 +293,6 @@ #define CONFIG_SYS_USB_OHCI_SLOT_NAME "s3c6400" #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3 #define CONFIG_SYS_USB_OHCI_CPU_INIT 1 -#define LITTLEENDIAN 1 /* used by usb_ohci.c */ #define CONFIG_USB_STORAGE 1 #endif diff --git a/include/configs/trab.h b/include/configs/trab.h index 562cd60..0a7a73d 100644 --- a/include/configs/trab.h +++ b/include/configs/trab.h @@ -44,7 +44,6 @@ #define CONFIG_S3C2400 1 /* in a SAMSUNG S3C2400 SoC */ #define CONFIG_TRAB 1 /* on a TRAB Board */ #undef CONFIG_TRAB_50MHZ /* run the CPU at 50 MHz */ -#define LITTLEENDIAN 1 /* used by usb_ohci.c */ /* automatic software updates (see board/trab/auto_update.c) */ #define CONFIG_AUTO_UPDATE 1 diff --git a/include/configs/trizepsiv.h b/include/configs/trizepsiv.h index b2065ee..0a8e994 100644 --- a/include/configs/trizepsiv.h +++ b/include/configs/trizepsiv.h @@ -42,8 +42,6 @@ */ #define CONFIG_PXA27X 1 /* This is an PXA27x CPU */ -#define LITTLEENDIAN 1 /* used by usb_ohci.c */ - #define CONFIG_MMC 1 #define BOARD_LATE_INIT 1 diff --git a/include/configs/vct.h b/include/configs/vct.h new file mode 100644 index 0000000..391535e --- /dev/null +++ b/include/configs/vct.h @@ -0,0 +1,340 @@ +/* + * (C) Copyright 2008 Stefan Roese <sr@denx.de>, DENX Software Engineering + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * This file contains the configuration parameters for the VCT board + * family: + * + * vct_premium + * vct_premium_small + * vct_premium_onenand + * vct_premium_onenand_small + * vct_platinum + * vct_platinum_small + * vct_platinum_onenand + * vct_platinum_onenand_small + * vct_platinumavc + * vct_platinumavc_small + * vct_platinumavc_onenand + * vct_platinumavc_onenand_small + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define CONFIG_MIPS32 /* MIPS 4Kc CPU core */ +#define CPU_CLOCK_RATE 324000000 /* Clock for the MIPS core */ +#define CONFIG_SYS_MIPS_TIMER_FREQ (CPU_CLOCK_RATE / 2) +#define CONFIG_SYS_HZ 1000 + +#define CONFIG_SKIP_LOWLEVEL_INIT /* SDRAM is initialized by the bootstrap code */ + +#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_LEN (256 << 10) +#define CONFIG_STACKSIZE (256 << 10) +#define CONFIG_SYS_MALLOC_LEN (1 << 20) +#define CONFIG_SYS_BOOTPARAMS_LEN (128 << 10) +#define CONFIG_SYS_INIT_SP_OFFSET 0x400000 + +#if !defined(CONFIG_VCT_NAND) && !defined(CONFIG_VCT_ONENAND) +#define CONFIG_VCT_NOR +#else +#define CONFIG_SYS_NO_FLASH +#endif + +/* + * UART + */ +#define CONFIG_VCT_SERIAL +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } + +/* + * SDRAM + */ +#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CONFIG_SYS_MBYTES_SDRAM 128 +#define CONFIG_SYS_MEMTEST_START 0x80200000 +#define CONFIG_SYS_MEMTEST_END 0x80400000 +#define CONFIG_SYS_LOAD_ADDR 0x80400000 /* default load address */ + +#if defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM) +/* + * SMSC91C11x Network Card + */ +#define CONFIG_DRIVER_SMC911X +#define CONFIG_DRIVER_SMC911X_BASE 0x00000000 +#define CONFIG_DRIVER_SMC911X_32_BIT +#define CONFIG_NET_RETRY_COUNT 20 +#endif + +/* + * Commands + */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_ELF +#define CONFIG_CMD_EEPROM +#define CONFIG_CMD_I2C + +/* + * Only Premium/Platinum have ethernet support right now + */ +#if defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM) +#define CONFIG_CMD_PING +#define CONFIG_CMD_SNTP +#else +#undef CONFIG_CMD_NET +#endif + +/* + * Only Premium/Platinum have USB-EHCI support right now + */ +#if defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM) +#define CONFIG_CMD_USB +#define CONFIG_CMD_FAT +#endif + +#if defined(CONFIG_CMD_USB) +#define CONFIG_USB_STORAGE +#define CONFIG_DOS_PARTITION +#define CONFIG_ISO_PARTITION + +#define CONFIG_SUPPORT_VFAT + +/* + * USB/EHCI + */ +#define CONFIG_USB_EHCI /* Enable EHCI USB support */ +#define CONFIG_USB_EHCI_VCT /* on VCT platform */ +#define CONFIG_EHCI_DCACHE /* with dcache handling support */ +#define CONFIG_EHCI_MMIO_BIG_ENDIAN +#define CONFIG_EHCI_DESC_BIG_ENDIAN +#define CONFIG_EHCI_IS_TDI +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* re-init HCD after CMD_RESET */ +#endif /* CONFIG_CMD_USB */ + +#if !defined(CONFIG_VCT_NOR) +#undef CONFIG_CMD_FLASH +#undef CONFIG_CMD_IMLS +#endif + +#if defined(CONFIG_VCT_NAND) +#define CONFIG_CMD_NAND +#endif + +#if defined(CONFIG_VCT_ONENAND) +#define CONFIG_CMD_ONENAND +#endif + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME +#define CONFIG_BOOTP_SUBNETMASK + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_PROMPT "VCT# " /* Monitor Command Prompt */ +#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_TIMESTAMP /* Print image info with timestamp */ +#define CONFIG_CMDLINE_EDITING /* add command line history */ +#define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup*/ + +/* + * FLASH and environment organization + */ +#if defined(CONFIG_VCT_NOR) +#define CONFIG_ENV_IS_IN_FLASH +#define CONFIG_FLASH_NOT_MEM_MAPPED + +/* + * We need special accessor functions for the CFI FLASH driver. This + * can be enabled via the CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS option. + */ +#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS + +/* + * For the non-memory-mapped NOR FLASH, we need to define the + * NOR FLASH area. This can't be detected via the addr2info() + * function, since we check for flash access in the very early + * U-Boot code, before the NOR FLASH is detected. + */ +#define CONFIG_FLASH_BASE 0xb0000000 +#define CONFIG_FLASH_END 0xbfffffff + +/* + * CFI driver settings + */ +#define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */ +#define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */ +#define CONFIG_SYS_FLASH_CFI_AMD_RESET 1 /* Use AMD (Spansion) reset cmd */ +#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT /* no byte writes on IXP4xx */ + +#define CONFIG_SYS_FLASH_BASE 0xb0000000 +#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ +#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */ + +#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ +#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ + +#ifdef CONFIG_ENV_IS_IN_FLASH +#define CONFIG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */ +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) +#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */ + +/* Address and size of Redundant Environment Sector */ +#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE) +#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) +#endif /* CONFIG_ENV_IS_IN_FLASH */ +#endif /* CONFIG_VCT_NOR */ + +#if defined(CONFIG_VCT_ONENAND) +#define CONFIG_USE_ONENAND_BOARD_INIT +#define CONFIG_ENV_IS_IN_ONENAND +#define CONFIG_SYS_ONENAND_BASE 0x00000000 /* this is not real address */ +#define CONFIG_SYS_FLASH_BASE 0x00000000 +#define CONFIG_ENV_ADDR (128 << 10) /* after compr. U-Boot image */ +#define CONFIG_ENV_SIZE (128 << 10) /* erase size */ +#endif /* CONFIG_VCT_ONENAND */ + +/* + * Cache Configuration + */ +#define CONFIG_SYS_DCACHE_SIZE 16384 +#define CONFIG_SYS_ICACHE_SIZE 16384 +#define CONFIG_SYS_CACHELINE_SIZE 32 + +/* + * I2C/EEPROM + */ +#undef CONFIG_HARD_I2C /* I2C with hardware support */ +#define CONFIG_SOFT_I2C /* I2C bit-banged */ + +#define CONFIG_SYS_I2C_SPEED 83000 /* 83 kHz is supposed to work */ +#define CONFIG_SYS_I2C_SLAVE 0x7f + +/* + * Software (bit-bang) I2C driver configuration + */ +#define CONFIG_SYS_GPIO_I2C_SCL 11 +#define CONFIG_SYS_GPIO_I2C_SDA 10 + +#ifndef __ASSEMBLY__ +int vct_gpio_dir(int pin, int dir); +void vct_gpio_set(int pin, int val); +int vct_gpio_get(int pin); +#endif + +#define I2C_INIT vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SCL, 1) +#define I2C_ACTIVE vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SDA, 1) +#define I2C_TRISTATE vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SDA, 0) +#define I2C_READ vct_gpio_get(CONFIG_SYS_GPIO_I2C_SDA) +#define I2C_SDA(bit) vct_gpio_set(CONFIG_SYS_GPIO_I2C_SDA, bit) +#define I2C_SCL(bit) vct_gpio_set(CONFIG_SYS_GPIO_I2C_SCL, bit) +#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */ + +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 +/* CAT24WC32 */ +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */ +#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* The Catalyst CAT24WC32 has */ + /* 32 byte page write mode using*/ + /* last 5 bits of the address */ +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ + +#define CONFIG_BOOTCOMMAND "run test3" +#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ + +/* + * Needed for 64bit printf format + */ +#define CONFIG_SYS_64BIT_VSPRINTF 1 +#define CONFIG_SYS_64BIT_STRTOUL 1 + +/* + * UBI configuration + */ +#if defined(CONFIG_VCT_ONENAND) +#define CONFIG_SYS_USE_UBI +#define CONFIG_CMD_JFFS2 +#define CONFIG_CMD_UBI +#define CONFIG_RBTREE +#define CONFIG_MTD_PARTITIONS +#define CONFIG_JFFS2_CMDLINE + +#define MTDIDS_DEFAULT "onenand0=onenand" +#define MTDPARTS_DEFAULT "mtdparts=onenand:128k(u-boot)," \ + "128k(env)," \ + "20m(kernel)," \ + "-(rootfs)" +#endif + +/* + * We need a small, stripped down image to fit into the first 128k OneNAND + * erase block (gzipped). This image only needs basic commands for FLASH + * (NOR/OneNAND) usage and Linux kernel booting. + */ +#if defined(CONFIG_VCT_SMALL_IMAGE) +#undef CONFIG_CMD_EEPROM +#undef CONFIG_CMD_I2C +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_PING +#undef CONFIG_CMD_SNTP +#undef CONFIG_CMD_ELF +#undef CONFIG_CMD_CONSOLE +#undef CONFIG_CMD_CACHE +#undef CONFIG_CMD_BEDBUG +#undef CONFIG_CMD_AUTOSCRIPT +#undef CONFIG_CMD_IRQ +#undef CONFIG_CMD_ITEST +#undef CONFIG_CMD_MII +#undef CONFIG_CMD_MISC +#undef CONFIG_CMD_REGINFO +#undef CONFIG_CMD_STRINGS +#undef CONFIG_CMD_TERMINAL +#undef CONFIG_CMD_ASKENV +#undef CONFIG_CMD_CRC32 +#undef CONFIG_CMD_DHCP +#undef CONFIG_CMD_EEPROM +#undef CONFIG_CMD_I2C +#undef CONFIG_CMD_LOADB +#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_LOADY +#undef CONFIG_CMD_BDI +#undef CONFIG_CMD_USB +#undef CONFIG_CMD_FAT + +#undef CONFIG_DRIVER_SMC911X +#undef CONFIG_SOFT_I2C +#undef CONFIG_AUTOSCRIPT +#undef CONFIG_SYS_LONGHELP +#undef CONFIG_TIMESTAMP +#endif /* CONFIG_VCT_SMALL_IMAGE */ + +#endif /* __CONFIG_H */ |