diff options
Diffstat (limited to 'include/configs/mx6ul_14x14_ddr3_arm2.h')
| -rw-r--r-- | include/configs/mx6ul_14x14_ddr3_arm2.h | 33 |
1 files changed, 12 insertions, 21 deletions
diff --git a/include/configs/mx6ul_14x14_ddr3_arm2.h b/include/configs/mx6ul_14x14_ddr3_arm2.h index 507972f..025371a 100644 --- a/include/configs/mx6ul_14x14_ddr3_arm2.h +++ b/include/configs/mx6ul_14x14_ddr3_arm2.h @@ -8,46 +8,35 @@ #ifndef __MX6UL_14X14_DDR3_ARM2_CONFIG_H #define __MX6UL_14X14_DDR3_ARM2_CONFIG_H -#define CONFIG_DEFAULT_FDT_FILE "imx6ul-14x14-ddr3-arm2.dtb" - -#ifdef CONFIG_SYS_BOOT_QSPI -#define CONFIG_SYS_USE_QSPI +#ifdef CONFIG_QSPI_BOOT #define CONFIG_ENV_IS_IN_SPI_FLASH -#elif defined CONFIG_SYS_BOOT_SPINOR -#define CONFIG_SYS_USE_SPINOR +#elif defined CONFIG_SPI_BOOT +#define CONFIG_MXC_SPI #define CONFIG_ENV_IS_IN_SPI_FLASH -#elif defined CONFIG_SYS_BOOT_EIMNOR -#define CONFIG_SYS_USE_EIMNOR +#elif defined(CONFIG_NOR_BOOT) +#define CONFIG_MTD_NOR_FLASH #define CONFIG_ENV_IS_IN_FLASH -#elif defined CONFIG_SYS_BOOT_NAND -#define CONFIG_SYS_USE_NAND +#elif defined CONFIG_NAND_BOOT +#define CONFIG_CMD_NAND #define CONFIG_ENV_IS_IN_NAND #else -#define CONFIG_SYS_USE_QSPI #define CONFIG_ENV_IS_IN_MMC #endif -#define CONFIG_VIDEO #define BOOTARGS_CMA_SIZE "" #include "mx6ul_arm2.h" #define PHYS_SDRAM_SIZE SZ_1G -#ifdef CONFIG_SYS_USE_SPINOR -#define CONFIG_CMD_SF -#define CONFIG_SPI_FLASH -#define CONFIG_SPI_FLASH_STMICRO -#define CONFIG_MXC_SPI +#ifdef CONFIG_MXC_SPI #define CONFIG_SF_DEFAULT_BUS 0 #define CONFIG_SF_DEFAULT_SPEED 20000000 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) #define CONFIG_SF_DEFAULT_CS 0 #endif -#ifdef CONFIG_CMD_NET -#define CONFIG_CMD_PING -#define CONFIG_CMD_DHCP +#ifdef CONFIG_DM_ETH #define CONFIG_CMD_MII #define CONFIG_FEC_MXC #define CONFIG_MII @@ -57,15 +46,17 @@ #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_MXC_PHYADDR 0x1 #define CONFIG_FEC_XCV_TYPE RMII +#define CONFIG_ETHPRIME "FEC0" #elif (CONFIG_FEC_ENET_DEV == 1) #define IMX_FEC_BASE ENET2_BASE_ADDR #define CONFIG_FEC_MXC_PHYADDR 0x2 #define CONFIG_FEC_XCV_TYPE MII100 +#define CONFIG_ETHPRIME "FEC1" #endif -#define CONFIG_ETHPRIME "FEC" #define CONFIG_PHYLIB #define CONFIG_PHY_MICREL +#define CONFIG_FEC_MXC_MDIO_BASE ENET2_BASE_ADDR #endif #define CONFIG_MODULE_FUSE |