diff options
Diffstat (limited to 'include/configs/mcc200.h')
| -rw-r--r-- | include/configs/mcc200.h | 179 |
1 files changed, 90 insertions, 89 deletions
diff --git a/include/configs/mcc200.h b/include/configs/mcc200.h index c3a600e..e5812ee 100644 --- a/include/configs/mcc200.h +++ b/include/configs/mcc200.h @@ -33,7 +33,7 @@ #define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ #define CONFIG_MCC200 1 /* ... on MCC200 board */ -#define CFG_MPC5XXX_CLKIN 33000000 /* ... running at 33MHz */ +#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33MHz */ #define CONFIG_MISC_INIT_R @@ -81,7 +81,7 @@ #error "Select only one console device!" #endif #define CONFIG_BAUDRATE 115200 -#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } #define CONFIG_MII 1 @@ -131,11 +131,11 @@ #define MK_STR(x) XMK_STR(x) #ifdef CONFIG_PRS200 -# define CFG__BOARDNAME "prs200" -# define CFG__LINUX_CONSOLE "ttyS0" +# define CONFIG_SYS__BOARDNAME "prs200" +# define CONFIG_SYS__LINUX_CONSOLE "ttyS0" #else -# define CFG__BOARDNAME "mcc200" -# define CFG__LINUX_CONSOLE "ttyEU5" +# define CONFIG_SYS__BOARDNAME "mcc200" +# define CONFIG_SYS__LINUX_CONSOLE "ttyEU5" #endif /* Network */ @@ -148,7 +148,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "ubootver=" U_BOOT_VERSION "\0" \ "netdev=eth0\0" \ - "hostname=" CFG__BOARDNAME "\0" \ + "hostname=" CONFIG_SYS__BOARDNAME "\0" \ "nfsargs=setenv bootargs root=/dev/nfs rw " \ "nfsroot=${serverip}:${rootpath}\0" \ "ramargs=setenv bootargs root=/dev/mtdblock2 " \ @@ -165,10 +165,10 @@ "bootm ${kernel_addr} ${ramdisk_addr}\0" \ "net_nfs=tftp 200000 ${bootfile};" \ "run nfsargs addip addcons;bootm\0" \ - "console=" CFG__LINUX_CONSOLE "\0" \ + "console=" CONFIG_SYS__LINUX_CONSOLE "\0" \ "rootpath=/opt/eldk/ppc_6xx\0" \ - "bootfile=/tftpboot/" CFG__BOARDNAME "/uImage\0" \ - "load=tftp 200000 /tftpboot/" CFG__BOARDNAME "/u-boot.bin\0" \ + "bootfile=/tftpboot/" CONFIG_SYS__BOARDNAME "/uImage\0" \ + "load=tftp 200000 /tftpboot/" CONFIG_SYS__BOARDNAME "/u-boot.bin\0" \ "text_base=" MK_STR(TEXT_BASE) "\0" \ "kernel_addr=0xFC0C0000\0" \ "update=protect off ${text_base} +${filesize};" \ @@ -181,22 +181,22 @@ #define CONFIG_BOOTCOMMAND "run flash_self" -#define CFG_HUSH_PARSER 1 /* use "hush" command parser */ -#define CFG_PROMPT_HUSH_PS2 "> " +#define CONFIG_SYS_HUSH_PARSER 1 /* use "hush" command parser */ +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " /* * IPB Bus clocking configuration. */ -#define CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */ +#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */ /* * I2C configuration */ #define CONFIG_HARD_I2C 1 /* I2C with hardware support */ -#define CFG_I2C_MODULE 2 /* Select I2C module #1 or #2 */ +#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */ -#define CFG_I2C_SPEED 100000 /* 100 kHz */ -#define CFG_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */ +#define CONFIG_SYS_I2C_SLAVE 0x7F /* * Flash configuration (8,16 or 32 MB) @@ -207,30 +207,30 @@ * 0xFF000000 for 16 MB * 0xFF800000 for 8 MB */ -#define CFG_FLASH_BASE 0xfc000000 -#define CFG_FLASH_SIZE 0x04000000 +#define CONFIG_SYS_FLASH_BASE 0xfc000000 +#define CONFIG_SYS_FLASH_SIZE 0x04000000 -#define CFG_FLASH_CFI /* The flash is CFI compatible */ +#define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */ #define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */ -#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE } +#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } -#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ -#define CFG_MAX_FLASH_SECT 512 /* max number of sectors on one chip */ +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ +#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */ -#define CFG_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */ -#define CFG_FLASH_PROTECTION 1 /* hardware flash protection */ +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */ +#define CONFIG_SYS_FLASH_PROTECTION 1 /* hardware flash protection */ -#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ -#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ +#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ +#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ -#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ -#define CFG_FLASH_QUIET_TEST 1 /* don't warn upon unknown flash */ +#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ +#define CONFIG_SYS_FLASH_QUIET_TEST 1 /* don't warn upon unknown flash */ #define CONFIG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */ #define CONFIG_ENV_SECT_SIZE 0x40000 /* size of one complete sector */ -#define CONFIG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN) +#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) #define CONFIG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */ /* Address and size of Redundant Environment Sector */ @@ -239,43 +239,44 @@ #define CONFIG_ENV_OVERWRITE 1 /* allow modification of vendor params */ -#if TEXT_BASE == CFG_FLASH_BASE -#define CFG_LOWBOOT 1 +#if TEXT_BASE == CONFIG_SYS_FLASH_BASE +#define CONFIG_SYS_LOWBOOT 1 #endif /* * Memory map */ -#define CFG_MBAR 0xf0000000 -#define CFG_SDRAM_BASE 0x00000000 -#define CFG_DEFAULT_MBAR 0x80000000 +#define CONFIG_SYS_MBAR 0xf0000000 +#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CONFIG_SYS_DEFAULT_MBAR 0x80000000 /* Use SRAM until RAM will be available */ -#define CFG_INIT_RAM_ADDR MPC5XXX_SRAM -#define CFG_INIT_RAM_END MPC5XXX_SRAM_SIZE /* End of used area in DPRAM */ +#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM +#define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_SIZE /* End of used area in DPRAM */ -#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ -#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) -#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CFG_MONITOR_BASE TEXT_BASE -#if (CFG_MONITOR_BASE < CFG_FLASH_BASE) -# define CFG_RAMBOOT 1 +#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) +# define CONFIG_SYS_RAMBOOT 1 #endif -#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ -#define CFG_MALLOC_LEN (512 << 10) /* Reserve 512 kB for malloc() */ -#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ +#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ +#define CONFIG_SYS_MALLOC_LEN (512 << 10) /* Reserve 512 kB for malloc() */ +#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ /* * Ethernet configuration */ -/*#define CONFIG_MPC5xxx_FEC 1*/ +/* #define CONFIG_MPC5xxx_FEC 1 */ +/* #define CONFIG_MPC5xxx_FEC_MII100 */ /* - * Define CONFIG_FEC_10MBIT to force FEC at 10Mb + * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb */ -/* #define CONFIG_FEC_10MBIT 1 */ +/* #define CONFIG_MPC5xxx_FEC_MII10 */ #define CONFIG_PHY_ADDR 1 /* @@ -288,7 +289,7 @@ #if defined(CONFIG_LCD) #define CONFIG_SPLASH_SCREEN 1 -#define CFG_CONSOLE_IS_IN_ENV 1 +#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 #define LCD_BPP LCD_MONOCHROME #endif @@ -299,64 +300,64 @@ /* 0x90000004 = 64MB SDRAM */ #if defined(CONFIG_LCD) /* set PSC2 in UART mode */ -#define CFG_GPS_PORT_CONFIG 0x00000044 +#define CONFIG_SYS_GPS_PORT_CONFIG 0x00000044 #else -#define CFG_GPS_PORT_CONFIG 0x00000004 +#define CONFIG_SYS_GPS_PORT_CONFIG 0x00000004 #endif /* * Miscellaneous configurable options */ -#define CFG_LONGHELP /* undef to save memory */ -#define CFG_PROMPT "=> " /* Monitor Command Prompt */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ #if defined(CONFIG_CMD_KGDB) -#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #else -#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ #endif -#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ -#define CFG_MAXARGS 16 /* max number of command args */ -#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ -#define CFG_MEMTEST_START 0x00100000 /* memtest works on */ -#define CFG_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */ +#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ +#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */ -#define CFG_LOAD_ADDR 0x100000 /* default load address */ +#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ -#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ +#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ -#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */ +#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */ #if defined(CONFIG_CMD_KGDB) -# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */ +# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ #endif /* * Various low-level settings */ -#define CFG_HID0_INIT HID0_ICE | HID0_ICFI -#define CFG_HID0_FINAL HID0_ICE +#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI +#define CONFIG_SYS_HID0_FINAL HID0_ICE -#define CFG_BOOTCS_START CFG_FLASH_BASE -#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE -#define CFG_BOOTCS_CFG 0x0004fb00 -#define CFG_CS0_START CFG_FLASH_BASE -#define CFG_CS0_SIZE CFG_FLASH_SIZE +#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE +#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE +#define CONFIG_SYS_BOOTCS_CFG 0x0004fb00 +#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE +#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE /* Quad UART @0x80000000 (MBAR is relocated to 0xF0000000) */ -#define CFG_CS2_START 0x80000000 -#define CFG_CS2_SIZE 0x00001000 -#define CFG_CS2_CFG 0x1d300 +#define CONFIG_SYS_CS2_START 0x80000000 +#define CONFIG_SYS_CS2_SIZE 0x00001000 +#define CONFIG_SYS_CS2_CFG 0x1d300 /* Second Quad UART @0x80010000 */ -#define CFG_CS1_START 0x80010000 -#define CFG_CS1_SIZE 0x00001000 -#define CFG_CS1_CFG 0x1d300 +#define CONFIG_SYS_CS1_START 0x80010000 +#define CONFIG_SYS_CS1_SIZE 0x00001000 +#define CONFIG_SYS_CS1_CFG 0x1d300 /* Leica - build revision resistors */ /* -#define CFG_CS3_START 0x80020000 -#define CFG_CS3_SIZE 0x00000004 -#define CFG_CS3_CFG 0x1d300 +#define CONFIG_SYS_CS3_START 0x80020000 +#define CONFIG_SYS_CS3_SIZE 0x00000004 +#define CONFIG_SYS_CS3_CFG 0x1d300 */ /* @@ -364,10 +365,10 @@ * console. If undefined - PSC console * wil be default */ -#define CFG_CS_BURST 0x00000000 -#define CFG_CS_DEADCYCLE 0x33333333 +#define CONFIG_SYS_CS_BURST 0x00000000 +#define CONFIG_SYS_CS_DEADCYCLE 0x33333333 -#define CFG_RESET_ADDRESS 0xff000000 +#define CONFIG_SYS_RESET_ADDRESS 0xff000000 /* * QUART Expanders support @@ -376,8 +377,8 @@ /* * We'll use NS16550 chip routines, */ -#define CFG_NS16550 1 -#define CFG_NS16550_SERIAL 1 +#define CONFIG_SYS_NS16550 1 +#define CONFIG_SYS_NS16550_SERIAL 1 #define CONFIG_CONS_INDEX 1 /* * To achieve necessary offset on SC16C554 @@ -386,7 +387,7 @@ * should be 4, because A0-A2 pins are connected * to DA2-DA4 address bus lines. */ -#define CFG_NS16550_REG_SIZE 4 +#define CONFIG_SYS_NS16550_REG_SIZE 4 /* * LocalPlus Bus already inited in cpu_init_f(), * so can work with QUART's chip selects. @@ -394,9 +395,9 @@ * A3-A4 (DA5-DA6) lines. */ #if (CONFIG_QUART_CONSOLE > 0) && (CONFIG_QUART_CONSOLE < 5) && !defined(CONFIG_PRS200) -#define CFG_NS16550_COM1 (CFG_CS2_START | (CONFIG_QUART_CONSOLE - 1)<<5) +#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CS2_START | (CONFIG_QUART_CONSOLE - 1)<<5) #elif (CONFIG_QUART_CONSOLE > 4) && (CONFIG_QUART_CONSOLE < 9) -#define CFG_NS16550_COM1 (CFG_CS1_START | (CONFIG_QUART_CONSOLE - 5)<<5) +#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CS1_START | (CONFIG_QUART_CONSOLE - 5)<<5) #elif #error "Wrong QUART expander number." #endif @@ -405,7 +406,7 @@ * SC16C554 chip's external crystal oscillator frequency * is 7.3728 MHz */ -#define CFG_NS16550_CLK 7372800 +#define CONFIG_SYS_NS16550_CLK 7372800 #endif /* CONFIG_QUART_CONSOLE */ /*----------------------------------------------------------------------- * USB stuff |