diff options
Diffstat (limited to 'include/configs/gth2.h')
| -rw-r--r-- | include/configs/gth2.h | 80 |
1 files changed, 40 insertions, 40 deletions
diff --git a/include/configs/gth2.h b/include/configs/gth2.h index 7f7190b..aeede04 100644 --- a/include/configs/gth2.h +++ b/include/configs/gth2.h @@ -49,7 +49,7 @@ #define CONFIG_BAUDRATE 115200 /* valid baudrates */ -#define CFG_BAUDRATE_TABLE { 115200 } +#define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* Only interrupt boot if space is pressed */ /* If a long serial cable is connected but */ @@ -107,57 +107,57 @@ /* * Miscellaneous configurable options */ -#define CFG_LONGHELP /* undef to save memory */ -#define CFG_PROMPT "GTH2 # " /* Monitor Command Prompt */ -#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ -#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ -#define CFG_MAXARGS 16 /* max number of command args*/ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_PROMPT "GTH2 # " /* Monitor Command Prompt */ +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ +#define CONFIG_SYS_MAXARGS 16 /* max number of command args*/ -#define CFG_MALLOC_LEN 128*1024 +#define CONFIG_SYS_MALLOC_LEN 128*1024 -#define CFG_BOOTPARAMS_LEN 128*1024 +#define CONFIG_SYS_BOOTPARAMS_LEN 128*1024 -#define CFG_MHZ 500 +#define CONFIG_SYS_MHZ 500 -#define CFG_MIPS_TIMER_FREQ (CFG_MHZ * 1000000) +#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000) -#define CFG_HZ 1000 +#define CONFIG_SYS_HZ 1000 -#define CFG_SDRAM_BASE 0x80000000 /* Cached addr */ +#define CONFIG_SYS_SDRAM_BASE 0x80000000 /* Cached addr */ -#define CFG_LOAD_ADDR 0x81000000 /* default load address */ +#define CONFIG_SYS_LOAD_ADDR 0x81000000 /* default load address */ -#define CFG_MEMTEST_START 0x80100000 -#define CFG_MEMTEST_END 0x83000000 +#define CONFIG_SYS_MEMTEST_START 0x80100000 +#define CONFIG_SYS_MEMTEST_END 0x83000000 #define CONFIG_HW_WATCHDOG 1 /*----------------------------------------------------------------------- * FLASH and environment organization */ -#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */ -#define CFG_MAX_FLASH_SECT (128) /* max number of sectors on one chip */ +#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */ +#define CONFIG_SYS_MAX_FLASH_SECT (128) /* max number of sectors on one chip */ #define PHYS_FLASH 0xbfc00000 /* Flash Bank #1 */ /* The following #defines are needed to get flash environment right */ -#define CFG_MONITOR_BASE TEXT_BASE -#define CFG_MONITOR_LEN (192 << 10) +#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_LEN (192 << 10) -#define CFG_INIT_SP_OFFSET 0x400000 +#define CONFIG_SYS_INIT_SP_OFFSET 0x400000 /* We boot from this flash, selected with dip switch */ -#define CFG_FLASH_BASE PHYS_FLASH +#define CONFIG_SYS_FLASH_BASE PHYS_FLASH /* timeout values are in ticks */ -#define CFG_FLASH_ERASE_TOUT (2 * CFG_HZ) /* Timeout for Flash Erase */ -#define CFG_FLASH_WRITE_TOUT (2 * CFG_HZ) /* Timeout for Flash Write */ +#define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */ +#define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Write */ -#define CFG_ENV_IS_NOWHERE 1 +#define CONFIG_ENV_IS_NOWHERE 1 /* Address and size of Primary Environment Sector */ -#define CFG_ENV_ADDR 0xB0030000 -#define CFG_ENV_SIZE 0x10000 +#define CONFIG_ENV_ADDR 0xB0030000 +#define CONFIG_ENV_SIZE 0x10000 #define CONFIG_FLASH_16BIT @@ -168,11 +168,11 @@ #define CONFIG_MEMSIZE_IN_BYTES /*---ATA PCMCIA ------------------------------------*/ -#define CFG_PCMCIA_MEM_SIZE 0x4000000 /* Offset to slot 1 FIXME!!! */ +#define CONFIG_SYS_PCMCIA_MEM_SIZE 0x4000000 /* Offset to slot 1 FIXME!!! */ -#define CFG_PCMCIA_MEM_ADDR 0x20000000 -#define CFG_PCMCIA_IO_BASE 0x28000000 -#define CFG_PCMCIA_ATTR_BASE 0x30000000 +#define CONFIG_SYS_PCMCIA_MEM_ADDR 0x20000000 +#define CONFIG_SYS_PCMCIA_IO_BASE 0x28000000 +#define CONFIG_SYS_PCMCIA_ATTR_BASE 0x30000000 #define CONFIG_PCMCIA_SLOT_A @@ -183,31 +183,31 @@ #define CONFIG_IDE_PCMCIA 1 /* We only support one slot for now */ -#define CFG_IDE_MAXBUS 1 /* max. 1 IDE bus */ -#define CFG_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */ +#define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */ +#define CONFIG_SYS_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */ #undef CONFIG_IDE_LED /* LED for ide not supported */ #undef CONFIG_IDE_RESET /* reset for ide not supported */ -#define CFG_ATA_IDE0_OFFSET 0 +#define CONFIG_SYS_ATA_IDE0_OFFSET 0 -#define CFG_ATA_BASE_ADDR CFG_PCMCIA_IO_BASE +#define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_PCMCIA_IO_BASE /* Offset for data I/O */ -#define CFG_ATA_DATA_OFFSET 0 +#define CONFIG_SYS_ATA_DATA_OFFSET 0 /* Offset for normal register accesses */ -#define CFG_ATA_REG_OFFSET 0 +#define CONFIG_SYS_ATA_REG_OFFSET 0 /* Offset for alternate registers */ -#define CFG_ATA_ALT_OFFSET 0x0200 +#define CONFIG_SYS_ATA_ALT_OFFSET 0x0200 /*----------------------------------------------------------------------- * Cache Configuration */ -#define CFG_DCACHE_SIZE 16384 -#define CFG_ICACHE_SIZE 16384 -#define CFG_CACHELINE_SIZE 32 +#define CONFIG_SYS_DCACHE_SIZE 16384 +#define CONFIG_SYS_ICACHE_SIZE 16384 +#define CONFIG_SYS_CACHELINE_SIZE 32 #define GPIO_CACONFIG (1<<0) #define GPIO_DPACONFIG (1<<6) |