diff options
Diffstat (limited to 'include/configs/MPC8555CDS.h')
| -rw-r--r-- | include/configs/MPC8555CDS.h | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index 500b57c..e838345 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -38,7 +38,7 @@ #define CONFIG_MPC8555CDS 1 /* MPC8555CDS board specific */ #define CONFIG_PCI -#define CONFIG_TSEC_ENET /* tsec ethernet support */ +#define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_ENV_OVERWRITE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_DDR_DLL /* possible DLL fix needed */ @@ -69,7 +69,7 @@ extern unsigned long get_clock_freq(void); /* * These can be toggled for performance analysis, otherwise use default. */ -#define CONFIG_L2_CACHE /* toggle L2 cache */ +#define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ #define CONFIG_ADDR_STREAMING /* toggle addr streaming */ @@ -83,7 +83,7 @@ extern unsigned long get_clock_freq(void); * Base addresses -- Note these are effective addresses where the * actual resources get mapped (not physical addresses) */ -#define CFG_CCSRBAR_DEFAULT 0xff700000 /* CCSRBAR Default */ +#define CFG_CCSRBAR_DEFAULT 0xff700000 /* CCSRBAR Default */ #define CFG_CCSRBAR 0xe0000000 /* relocated CCSRBAR */ #define CFG_CCSRBAR_PHYS CFG_CCSRBAR /* physical addr of CCSRBAR */ #define CFG_IMMR CFG_CCSRBAR /* PQII uses CFG_IMMR */ @@ -155,7 +155,7 @@ extern unsigned long get_clock_freq(void); #define CFG_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CFG_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CFG_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CFG_MONITOR_BASE TEXT_BASE /* start of monitor */ #define CFG_FLASH_CFI_DRIVER #define CFG_FLASH_CFI @@ -284,16 +284,16 @@ extern unsigned long get_clock_freq(void); #define CFG_OR3_PRELIM 0xfff00ff7 #define CONFIG_L1_INIT_RAM -#define CFG_INIT_RAM_LOCK 1 +#define CFG_INIT_RAM_LOCK 1 #define CFG_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ -#define CFG_INIT_RAM_END 0x4000 /* End of used area in RAM */ +#define CFG_INIT_RAM_END 0x4000 /* End of used area in RAM */ -#define CFG_GBL_DATA_SIZE 128 /* num bytes initial data */ +#define CFG_GBL_DATA_SIZE 128 /* num bytes initial data */ #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET -#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */ -#define CFG_MALLOC_LEN (128 * 1024) /* Reserved for malloc */ +#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */ +#define CFG_MALLOC_LEN (128 * 1024) /* Reserved for malloc */ /* Serial Port */ #define CONFIG_CONS_INDEX 2 @@ -361,7 +361,7 @@ extern unsigned long get_clock_freq(void); #if defined(CONFIG_PCI) #define CONFIG_NET_MULTI -#define CONFIG_PCI_PNP /* do pci plug-and-play */ +#define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_MPC85XX_PCI2 #undef CONFIG_EEPRO100 @@ -376,7 +376,7 @@ extern unsigned long get_clock_freq(void); #if defined(CONFIG_TSEC_ENET) #ifndef CONFIG_NET_MULTI -#define CONFIG_NET_MULTI 1 +#define CONFIG_NET_MULTI 1 #endif #define CONFIG_MII 1 /* MII PHY management */ @@ -455,7 +455,7 @@ extern unsigned long get_clock_freq(void); * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ -#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/ +#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/ /* * Internal Definitions |