diff options
Diffstat (limited to 'include/configs/M52277EVB.h')
| -rw-r--r-- | include/configs/M52277EVB.h | 122 |
1 files changed, 61 insertions, 61 deletions
diff --git a/include/configs/M52277EVB.h b/include/configs/M52277EVB.h index 7f24c4e..b6226c6 100644 --- a/include/configs/M52277EVB.h +++ b/include/configs/M52277EVB.h @@ -39,9 +39,9 @@ #define CONFIG_M52277EVB /* M52277EVB board */ #define CONFIG_MCFUART -#define CFG_UART_PORT (0) +#define CONFIG_SYS_UART_PORT (0) #define CONFIG_BAUDRATE 115200 -#define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 } +#define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 } #undef CONFIG_WATCHDOG @@ -75,8 +75,8 @@ #define CONFIG_HOSTNAME M52277EVB #define CONFIG_EXTRA_ENV_SETTINGS \ - "inpclk=" MK_STR(CFG_INPUT_CLKSRC) "\0" \ - "loadaddr=" MK_STR(CFG_LOAD_ADDR) "\0" \ + "inpclk=" MK_STR(CONFIG_SYS_INPUT_CLKSRC) "\0" \ + "loadaddr=" MK_STR(CONFIG_SYS_LOAD_ADDR) "\0" \ "u-boot=u-boot.bin\0" \ "load=tftp ${loadaddr) ${u-boot}\0" \ "upd=run load; run prog\0" \ @@ -102,14 +102,14 @@ #define CONFIG_DOS_PARTITION #define CONFIG_MAC_PARTITION #define CONFIG_ISO_PARTITION -#define CFG_USB_EHCI_REGS_BASE 0xFC0B0000 -#define CFG_USB_EHCI_CPU_INIT +#define CONFIG_SYS_USB_EHCI_REGS_BASE 0xFC0B0000 +#define CONFIG_SYS_USB_EHCI_CPU_INIT #endif /* Realtime clock */ #define CONFIG_MCFRTC #undef RTC_DEBUG -#define CFG_RTC_OSCILLATOR (32 * CFG_HZ) +#define CONFIG_SYS_RTC_OSCILLATOR (32 * CONFIG_SYS_HZ) /* Timer */ #define CONFIG_MCFTMR @@ -119,35 +119,35 @@ #define CONFIG_FSL_I2C #define CONFIG_HARD_I2C /* I2C with hardware support */ #undef CONFIG_SOFT_I2C /* I2C bit-banged */ -#define CFG_I2C_SPEED 80000 /* I2C speed and slave address */ -#define CFG_I2C_SLAVE 0x7F -#define CFG_I2C_OFFSET 0x58000 -#define CFG_IMMR CFG_MBAR +#define CONFIG_SYS_I2C_SPEED 80000 /* I2C speed and slave address */ +#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C_OFFSET 0x58000 +#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR /* Input, PCI, Flexbus, and VCO */ #define CONFIG_EXTRA_CLOCK -#define CFG_INPUT_CLKSRC 16000000 +#define CONFIG_SYS_INPUT_CLKSRC 16000000 #define CONFIG_PRAM 512 /* 512 KB */ -#define CFG_PROMPT "-> " -#define CFG_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_PROMPT "-> " +#define CONFIG_SYS_LONGHELP /* undef to save memory */ #if defined(CONFIG_CMD_KGDB) -#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #else -#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ #endif -#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ -#define CFG_MAXARGS 16 /* max number of command args */ -#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ -#define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 0x10000) +#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x10000) -#define CFG_HZ 1000 +#define CONFIG_SYS_HZ 1000 -#define CFG_MBAR 0xFC000000 +#define CONFIG_SYS_MBAR 0xFC000000 /* * Low Level Configuration Settings @@ -158,36 +158,36 @@ /*----------------------------------------------------------------------- * Definitions for initial stack pointer and data area (in DPRAM) */ -#define CFG_INIT_RAM_ADDR 0x80000000 -#define CFG_INIT_RAM_END 0x8000 /* End of used area in internal SRAM */ -#define CFG_INIT_RAM_CTRL 0x21 -#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ -#define CFG_GBL_DATA_OFFSET ((CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) - 16) -#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET +#define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 +#define CONFIG_SYS_INIT_RAM_END 0x8000 /* End of used area in internal SRAM */ +#define CONFIG_SYS_INIT_RAM_CTRL 0x21 +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ +#define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) - 16) +#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET /*----------------------------------------------------------------------- * Start addresses for the final memory configuration * (Set up by the startup code) - * Please note that CFG_SDRAM_BASE _must_ start at 0 + * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 */ -#define CFG_SDRAM_BASE 0x40000000 -#define CFG_SDRAM_SIZE 64 /* SDRAM size in MB */ -#define CFG_SDRAM_CFG1 0x43711630 -#define CFG_SDRAM_CFG2 0x56670000 -#define CFG_SDRAM_CTRL 0xE1092000 -#define CFG_SDRAM_EMOD 0x81810000 -#define CFG_SDRAM_MODE 0x00CD0000 - -#define CFG_MEMTEST_START CFG_SDRAM_BASE + 0x400 -#define CFG_MEMTEST_END ((CFG_SDRAM_SIZE - 3) << 20) - -#define CFG_MONITOR_BASE (CFG_FLASH_BASE + 0x400) -#define CFG_BOOTPARAMS_LEN 64*1024 -#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ -#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ +#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CONFIG_SYS_SDRAM_SIZE 64 /* SDRAM size in MB */ +#define CONFIG_SYS_SDRAM_CFG1 0x43711630 +#define CONFIG_SYS_SDRAM_CFG2 0x56670000 +#define CONFIG_SYS_SDRAM_CTRL 0xE1092000 +#define CONFIG_SYS_SDRAM_EMOD 0x81810000 +#define CONFIG_SYS_SDRAM_MODE 0x00CD0000 + +#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400 +#define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20) + +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) +#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 +#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ +#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ /* Initial Memory map for Linux */ -#define CFG_BOOTMAPSZ (CFG_SDRAM_BASE + (CFG_SDRAM_SIZE << 20)) +#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) /* Configuration for environment * Environment is embedded in u-boot in the second sector of the flash @@ -199,21 +199,21 @@ /*----------------------------------------------------------------------- * FLASH organization */ -#define CFG_FLASH_BASE CFG_CS0_BASE -#define CFG_FLASH0_BASE CFG_CS0_BASE -#define CONFIG_ENV_ADDR (CFG_FLASH_BASE + 0x8000) +#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE +#define CONFIG_SYS_FLASH0_BASE CONFIG_SYS_CS0_BASE +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x8000) #define CONFIG_ENV_SECT_SIZE 0x8000 -#define CFG_FLASH_CFI -#ifdef CFG_FLASH_CFI +#define CONFIG_SYS_FLASH_CFI +#ifdef CONFIG_SYS_FLASH_CFI # define CONFIG_FLASH_CFI_DRIVER 1 -# define CFG_FLASH_SIZE 0x1000000 /* Max size that the board might have */ -# define CFG_FLASH_CFI_WIDTH FLASH_CFI_16BIT -# define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ -# define CFG_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ -# define CFG_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ -# define CFG_FLASH_CHECKSUM +# define CONFIG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */ +# define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT +# define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ +# define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ +# define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ +# define CONFIG_SYS_FLASH_CHECKSUM #endif /* @@ -223,13 +223,13 @@ #ifdef CONFIG_CMD_JFFS2 # define CONFIG_JFFS2_DEV "nor0" # define CONFIG_JFFS2_PART_SIZE (0x01000000 - 0x40000) -# define CONFIG_JFFS2_PART_OFFSET (CFG_FLASH0_BASE + 0x40000) +# define CONFIG_JFFS2_PART_OFFSET (CONFIG_SYS_FLASH0_BASE + 0x40000) #endif /*----------------------------------------------------------------------- * Cache Configuration */ -#define CFG_CACHELINE_SIZE 16 +#define CONFIG_SYS_CACHELINE_SIZE 16 /*----------------------------------------------------------------------- * Memory bank definitions @@ -243,8 +243,8 @@ * CS5 - Available */ -#define CFG_CS0_BASE 0x00000000 -#define CFG_CS0_MASK 0x00FF0001 -#define CFG_CS0_CTRL 0x00001FA0 +#define CONFIG_SYS_CS0_BASE 0x00000000 +#define CONFIG_SYS_CS0_MASK 0x00FF0001 +#define CONFIG_SYS_CS0_CTRL 0x00001FA0 #endif /* _M52277EVB_H */ |