diff options
Diffstat (limited to 'include/asm-ppc')
| -rw-r--r-- | include/asm-ppc/fsl_ddr_dimm_params.h | 7 | ||||
| -rw-r--r-- | include/asm-ppc/fsl_ddr_sdram.h | 31 | ||||
| -rw-r--r-- | include/asm-ppc/fsl_lbc.h | 27 | ||||
| -rw-r--r-- | include/asm-ppc/immap_85xx.h | 13 | ||||
| -rw-r--r-- | include/asm-ppc/immap_qe.h | 8 | ||||
| -rw-r--r-- | include/asm-ppc/mp.h | 31 | ||||
| -rw-r--r-- | include/asm-ppc/processor.h | 2 |
7 files changed, 114 insertions, 5 deletions
diff --git a/include/asm-ppc/fsl_ddr_dimm_params.h b/include/asm-ppc/fsl_ddr_dimm_params.h index c794eed..55923e0 100644 --- a/include/asm-ppc/fsl_ddr_dimm_params.h +++ b/include/asm-ppc/fsl_ddr_dimm_params.h @@ -33,9 +33,15 @@ typedef struct dimm_params_s { /* used in computing base address of DIMMs */ unsigned long long base_address; + /* mirrored DIMMs */ + unsigned int mirrored_dimm; /* only for ddr3 */ /* DIMM timing parameters */ + unsigned int mtb_ps; /* medium timebase ps, only for ddr3 */ + unsigned int tAA_ps; /* minimum CAS latency time, only for ddr3 */ + unsigned int tFAW_ps; /* four active window delay, only for ddr3 */ + /* * SDRAM clock periods * The range for these are 1000-10000 so a short should be sufficient @@ -67,6 +73,7 @@ typedef struct dimm_params_s { unsigned int refresh_rate_ps; + /* DDR3 doesn't need these as below */ unsigned int tIS_ps; /* byte 32, spd->ca_setup */ unsigned int tIH_ps; /* byte 33, spd->ca_hold */ unsigned int tDS_ps; /* byte 34, spd->data_setup */ diff --git a/include/asm-ppc/fsl_ddr_sdram.h b/include/asm-ppc/fsl_ddr_sdram.h index 6e3b255..c2e5aee 100644 --- a/include/asm-ppc/fsl_ddr_sdram.h +++ b/include/asm-ppc/fsl_ddr_sdram.h @@ -19,6 +19,11 @@ #define SDRAM_TYPE_LPDDR1 6 #define SDRAM_TYPE_DDR3 7 +#define DDR_BL4 4 /* burst length 4 */ +#define DDR_BC4 DDR_BL4 /* burst chop for ddr3 */ +#define DDR_OTF 6 /* on-the-fly BC4 and BL8 */ +#define DDR_BL8 8 /* burst length 8 */ + #if defined(CONFIG_FSL_DDR1) #define FSL_DDR_MIN_TCKE_PULSE_WIDTH_DDR (1) typedef ddr1_spd_eeprom_t generic_spd_eeprom_t; @@ -68,6 +73,18 @@ typedef ddr3_spd_eeprom_t generic_spd_eeprom_t; #define SDRAM_CFG_2T_EN 0x00008000 #define SDRAM_CFG_BI 0x00000001 +#if defined(CONFIG_P4080) +#define RD_TO_PRE_MASK 0xf +#define RD_TO_PRE_SHIFT 13 +#define WR_DATA_DELAY_MASK 0xf +#define WR_DATA_DELAY_SHIFT 9 +#else +#define RD_TO_PRE_MASK 0x7 +#define RD_TO_PRE_SHIFT 13 +#define WR_DATA_DELAY_MASK 0x7 +#define WR_DATA_DELAY_SHIFT 10 +#endif + /* Record of register values computed */ typedef struct fsl_ddr_cfg_regs_s { struct { @@ -145,7 +162,11 @@ typedef struct memctl_options_s { unsigned int dynamic_power; /* DYN_PWR */ /* memory data width to use (16-bit, 32-bit, 64-bit) */ unsigned int data_bus_width; - unsigned int burst_length; /* 4, 8 */ + unsigned int burst_length; /* BL4, OTF and BL8 */ + /* On-The-Fly Burst Chop enable */ + unsigned int OTF_burst_chop_en; + /* mirrior DIMMs for DDR3 */ + unsigned int mirrored_dimm; /* Global Timing Parameters */ unsigned int cas_latency_override; @@ -164,9 +185,17 @@ typedef struct memctl_options_s { unsigned int tCKE_clock_pulse_width_ps; /* tCKE */ unsigned int tFAW_window_four_activates_ps; /* tFAW -- FOUR_ACT */ + /* Rtt impedance */ + unsigned int rtt_override; /* rtt_override enable */ + unsigned int rtt_override_value; /* that is Rtt_Nom for DDR3 */ + /* Automatic self refresh */ unsigned int auto_self_refresh_en; unsigned int sr_it; + /* ZQ calibration */ + unsigned int zq_en; + /* Write leveling */ + unsigned int wrlvl_en; } memctl_options_t; extern phys_size_t fsl_ddr_sdram(void); diff --git a/include/asm-ppc/fsl_lbc.h b/include/asm-ppc/fsl_lbc.h index 9fa0b65..bc1ebe6 100644 --- a/include/asm-ppc/fsl_lbc.h +++ b/include/asm-ppc/fsl_lbc.h @@ -397,6 +397,33 @@ #define FPAR_LP_CI 0x000007FF #define FPAR_LP_CI_SHIFT 0 +/* LSDMR - SDRAM Machine Mode Register + */ +#define LSDMR_RFEN (1 << (31 - 1)) +#define LSDMR_BSMA1516 (3 << (31 - 10)) +#define LSDMR_BSMA1617 (4 << (31 - 10)) +#define LSDMR_RFCR5 (3 << (31 - 16)) +#define LSDMR_RFCR16 (7 << (31 - 16)) +#define LSDMR_PRETOACT3 (3 << (31 - 19)) +#define LSDMR_PRETOACT7 (7 << (31 - 19)) +#define LSDMR_ACTTORW3 (3 << (31 - 22)) +#define LSDMR_ACTTORW7 (7 << (31 - 22)) +#define LSDMR_ACTTORW6 (6 << (31 - 22)) +#define LSDMR_BL8 (1 << (31 - 23)) +#define LSDMR_WRC2 (2 << (31 - 27)) +#define LSDMR_WRC4 (0 << (31 - 27)) +#define LSDMR_BUFCMD (1 << (31 - 29)) +#define LSDMR_CL3 (3 << (31 - 31)) + +#define LSDMR_OP_NORMAL (0 << (31 - 4)) +#define LSDMR_OP_ARFRSH (1 << (31 - 4)) +#define LSDMR_OP_SRFRSH (2 << (31 - 4)) +#define LSDMR_OP_MRW (3 << (31 - 4)) +#define LSDMR_OP_PRECH (4 << (31 - 4)) +#define LSDMR_OP_PCHALL (5 << (31 - 4)) +#define LSDMR_OP_ACTBNK (6 << (31 - 4)) +#define LSDMR_OP_RWINV (7 << (31 - 4)) + /* LTESR - Transfer Error Status Register */ #define LTESR_BM 0x80000000 diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h index 094fb9c..0810b8e 100644 --- a/include/asm-ppc/immap_85xx.h +++ b/include/asm-ppc/immap_85xx.h @@ -1609,8 +1609,19 @@ typedef struct ccsr_gur { char res2[12]; uint gpiocr; /* 0xe0030 - GPIO control register */ char res3[12]; +#if defined(CONFIG_MPC8569) + uint plppar1; + /* 0xe0040 - Platform port pin assignment register 1 */ + uint plppar2; + /* 0xe0044 - Platform port pin assignment register 2 */ + uint plpdir1; + /* 0xe0048 - Platform port pin direction register 1 */ + uint plpdir2; + /* 0xe004c - Platform port pin direction register 2 */ +#else uint gpoutdr; /* 0xe0040 - General-purpose output data register */ char res4[12]; +#endif uint gpindr; /* 0xe0050 - General-purpose input data register */ char res5[12]; uint pmuxcr; /* 0xe0060 - Alternate function signal multiplex control */ @@ -1651,7 +1662,7 @@ typedef struct ccsr_gur { uint svr; /* 0xe00a4 - System version register */ char res10a[8]; uint rstcr; /* 0xe00b0 - Reset control register */ -#ifdef CONFIG_MPC8568 +#if defined(CONFIG_MPC8568)||defined(CONFIG_MPC8569) char res10b[76]; par_io_t qe_par_io[7]; /* 0xe0100 - 0xe01bf */ char res10c[3136]; diff --git a/include/asm-ppc/immap_qe.h b/include/asm-ppc/immap_qe.h index 39da377..66a4735 100644 --- a/include/asm-ppc/immap_qe.h +++ b/include/asm-ppc/immap_qe.h @@ -20,7 +20,9 @@ typedef struct qe_iram { u32 iadd; /* I-RAM Address Register */ u32 idata; /* I-RAM Data Register */ - u8 res0[0x78]; + u8 res0[0x4]; + u32 iready; + u8 res1[0x70]; } __attribute__ ((packed)) qe_iram_t; /* QE Interrupt Controller @@ -580,7 +582,7 @@ typedef struct qe_immap { u8 res14[0x300]; u8 res15[0x3A00]; u8 res16[0x8000]; /* 0x108000 - 0x110000 */ -#if defined(CONFIG_MPC8568) +#if defined(CONFIG_MPC8568)||defined(CONFIG_MPC8569) u8 muram[0x10000]; /* 0x1_0000 - 0x2_0000 Multi-user RAM */ u8 res17[0x20000]; /* 0x2_0000 - 0x4_0000 */ #else @@ -592,7 +594,7 @@ typedef struct qe_immap { extern qe_map_t *qe_immr; -#if defined(CONFIG_MPC8568) +#if defined(CONFIG_MPC8568) || defined(CONFIG_MPC8569) #define QE_MURAM_SIZE 0x10000UL #elif defined(CONFIG_MPC8360) #define QE_MURAM_SIZE 0xc000UL diff --git a/include/asm-ppc/mp.h b/include/asm-ppc/mp.h new file mode 100644 index 0000000..8a5486f --- /dev/null +++ b/include/asm-ppc/mp.h @@ -0,0 +1,31 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#ifndef _ASM_MP_H_ +#define _ASM_MP_H_ + +#include <lmb.h> + +void setup_mp(void); +void cpu_mp_lmb_reserve(struct lmb *lmb); +u32 determine_mp_bootpg(void); + +#endif + diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h index 5b29de0..83e3581 100644 --- a/include/asm-ppc/processor.h +++ b/include/asm-ppc/processor.h @@ -955,6 +955,8 @@ #define SVR_8567_E 0x807E00 #define SVR_8568 0x807500 #define SVR_8568_E 0x807D00 +#define SVR_8569 0x808000 +#define SVR_8569_E 0x808800 #define SVR_8572 0x80E000 #define SVR_8572_E 0x80E800 #define SVR_P2020 0x80E200 |