diff options
Diffstat (limited to 'include/asm-m68k/m5227x.h')
| -rw-r--r-- | include/asm-m68k/m5227x.h | 237 |
1 files changed, 3 insertions, 234 deletions
diff --git a/include/asm-m68k/m5227x.h b/include/asm-m68k/m5227x.h index afd31ba..824d333 100644 --- a/include/asm-m68k/m5227x.h +++ b/include/asm-m68k/m5227x.h @@ -26,9 +26,7 @@ #ifndef __MCF5227X__ #define __MCF5227X__ -/********************************************************************* -* Interrupt Controller (INTC) -*********************************************************************/ +/* Interrupt Controller (INTC) */ #define INT0_LO_RSVD0 (0) #define INT0_LO_EPORT1 (1) #define INT0_LO_EPORT4 (4) @@ -98,235 +96,6 @@ #define INT1_HI_TOUCH_ADC (61) #define INT1_HI_PLL_LOCKS (62) -/* Bit definitions and macros for IPRH */ -#define INTC_IPRH_INT32 (0x00000001) -#define INTC_IPRH_INT33 (0x00000002) -#define INTC_IPRH_INT34 (0x00000004) -#define INTC_IPRH_INT35 (0x00000008) -#define INTC_IPRH_INT36 (0x00000010) -#define INTC_IPRH_INT37 (0x00000020) -#define INTC_IPRH_INT38 (0x00000040) -#define INTC_IPRH_INT39 (0x00000080) -#define INTC_IPRH_INT40 (0x00000100) -#define INTC_IPRH_INT41 (0x00000200) -#define INTC_IPRH_INT42 (0x00000400) -#define INTC_IPRH_INT43 (0x00000800) -#define INTC_IPRH_INT44 (0x00001000) -#define INTC_IPRH_INT45 (0x00002000) -#define INTC_IPRH_INT46 (0x00004000) -#define INTC_IPRH_INT47 (0x00008000) -#define INTC_IPRH_INT48 (0x00010000) -#define INTC_IPRH_INT49 (0x00020000) -#define INTC_IPRH_INT50 (0x00040000) -#define INTC_IPRH_INT51 (0x00080000) -#define INTC_IPRH_INT52 (0x00100000) -#define INTC_IPRH_INT53 (0x00200000) -#define INTC_IPRH_INT54 (0x00400000) -#define INTC_IPRH_INT55 (0x00800000) -#define INTC_IPRH_INT56 (0x01000000) -#define INTC_IPRH_INT57 (0x02000000) -#define INTC_IPRH_INT58 (0x04000000) -#define INTC_IPRH_INT59 (0x08000000) -#define INTC_IPRH_INT60 (0x10000000) -#define INTC_IPRH_INT61 (0x20000000) -#define INTC_IPRH_INT62 (0x40000000) -#define INTC_IPRH_INT63 (0x80000000) - -/* Bit definitions and macros for IPRL */ -#define INTC_IPRL_INT0 (0x00000001) -#define INTC_IPRL_INT1 (0x00000002) -#define INTC_IPRL_INT2 (0x00000004) -#define INTC_IPRL_INT3 (0x00000008) -#define INTC_IPRL_INT4 (0x00000010) -#define INTC_IPRL_INT5 (0x00000020) -#define INTC_IPRL_INT6 (0x00000040) -#define INTC_IPRL_INT7 (0x00000080) -#define INTC_IPRL_INT8 (0x00000100) -#define INTC_IPRL_INT9 (0x00000200) -#define INTC_IPRL_INT10 (0x00000400) -#define INTC_IPRL_INT11 (0x00000800) -#define INTC_IPRL_INT12 (0x00001000) -#define INTC_IPRL_INT13 (0x00002000) -#define INTC_IPRL_INT14 (0x00004000) -#define INTC_IPRL_INT15 (0x00008000) -#define INTC_IPRL_INT16 (0x00010000) -#define INTC_IPRL_INT17 (0x00020000) -#define INTC_IPRL_INT18 (0x00040000) -#define INTC_IPRL_INT19 (0x00080000) -#define INTC_IPRL_INT20 (0x00100000) -#define INTC_IPRL_INT21 (0x00200000) -#define INTC_IPRL_INT22 (0x00400000) -#define INTC_IPRL_INT23 (0x00800000) -#define INTC_IPRL_INT24 (0x01000000) -#define INTC_IPRL_INT25 (0x02000000) -#define INTC_IPRL_INT26 (0x04000000) -#define INTC_IPRL_INT27 (0x08000000) -#define INTC_IPRL_INT28 (0x10000000) -#define INTC_IPRL_INT29 (0x20000000) -#define INTC_IPRL_INT30 (0x40000000) -#define INTC_IPRL_INT31 (0x80000000) - -/* Bit definitions and macros for IMRH */ -#define INTC_IMRH_INT_MASK32 (0x00000001) -#define INTC_IMRH_INT_MASK33 (0x00000002) -#define INTC_IMRH_INT_MASK34 (0x00000004) -#define INTC_IMRH_INT_MASK35 (0x00000008) -#define INTC_IMRH_INT_MASK36 (0x00000010) -#define INTC_IMRH_INT_MASK37 (0x00000020) -#define INTC_IMRH_INT_MASK38 (0x00000040) -#define INTC_IMRH_INT_MASK39 (0x00000080) -#define INTC_IMRH_INT_MASK40 (0x00000100) -#define INTC_IMRH_INT_MASK41 (0x00000200) -#define INTC_IMRH_INT_MASK42 (0x00000400) -#define INTC_IMRH_INT_MASK43 (0x00000800) -#define INTC_IMRH_INT_MASK44 (0x00001000) -#define INTC_IMRH_INT_MASK45 (0x00002000) -#define INTC_IMRH_INT_MASK46 (0x00004000) -#define INTC_IMRH_INT_MASK47 (0x00008000) -#define INTC_IMRH_INT_MASK48 (0x00010000) -#define INTC_IMRH_INT_MASK49 (0x00020000) -#define INTC_IMRH_INT_MASK50 (0x00040000) -#define INTC_IMRH_INT_MASK51 (0x00080000) -#define INTC_IMRH_INT_MASK52 (0x00100000) -#define INTC_IMRH_INT_MASK53 (0x00200000) -#define INTC_IMRH_INT_MASK54 (0x00400000) -#define INTC_IMRH_INT_MASK55 (0x00800000) -#define INTC_IMRH_INT_MASK56 (0x01000000) -#define INTC_IMRH_INT_MASK57 (0x02000000) -#define INTC_IMRH_INT_MASK58 (0x04000000) -#define INTC_IMRH_INT_MASK59 (0x08000000) -#define INTC_IMRH_INT_MASK60 (0x10000000) -#define INTC_IMRH_INT_MASK61 (0x20000000) -#define INTC_IMRH_INT_MASK62 (0x40000000) -#define INTC_IMRH_INT_MASK63 (0x80000000) - -/* Bit definitions and macros for IMRL */ -#define INTC_IMRL_INT_MASK0 (0x00000001) -#define INTC_IMRL_INT_MASK1 (0x00000002) -#define INTC_IMRL_INT_MASK2 (0x00000004) -#define INTC_IMRL_INT_MASK3 (0x00000008) -#define INTC_IMRL_INT_MASK4 (0x00000010) -#define INTC_IMRL_INT_MASK5 (0x00000020) -#define INTC_IMRL_INT_MASK6 (0x00000040) -#define INTC_IMRL_INT_MASK7 (0x00000080) -#define INTC_IMRL_INT_MASK8 (0x00000100) -#define INTC_IMRL_INT_MASK9 (0x00000200) -#define INTC_IMRL_INT_MASK10 (0x00000400) -#define INTC_IMRL_INT_MASK11 (0x00000800) -#define INTC_IMRL_INT_MASK12 (0x00001000) -#define INTC_IMRL_INT_MASK13 (0x00002000) -#define INTC_IMRL_INT_MASK14 (0x00004000) -#define INTC_IMRL_INT_MASK15 (0x00008000) -#define INTC_IMRL_INT_MASK16 (0x00010000) -#define INTC_IMRL_INT_MASK17 (0x00020000) -#define INTC_IMRL_INT_MASK18 (0x00040000) -#define INTC_IMRL_INT_MASK19 (0x00080000) -#define INTC_IMRL_INT_MASK20 (0x00100000) -#define INTC_IMRL_INT_MASK21 (0x00200000) -#define INTC_IMRL_INT_MASK22 (0x00400000) -#define INTC_IMRL_INT_MASK23 (0x00800000) -#define INTC_IMRL_INT_MASK24 (0x01000000) -#define INTC_IMRL_INT_MASK25 (0x02000000) -#define INTC_IMRL_INT_MASK26 (0x04000000) -#define INTC_IMRL_INT_MASK27 (0x08000000) -#define INTC_IMRL_INT_MASK28 (0x10000000) -#define INTC_IMRL_INT_MASK29 (0x20000000) -#define INTC_IMRL_INT_MASK30 (0x40000000) -#define INTC_IMRL_INT_MASK31 (0x80000000) - -/* Bit definitions and macros for INTFRCH */ -#define INTC_INTFRCH_INTFRC32 (0x00000001) -#define INTC_INTFRCH_INTFRC33 (0x00000002) -#define INTC_INTFRCH_INTFRC34 (0x00000004) -#define INTC_INTFRCH_INTFRC35 (0x00000008) -#define INTC_INTFRCH_INTFRC36 (0x00000010) -#define INTC_INTFRCH_INTFRC37 (0x00000020) -#define INTC_INTFRCH_INTFRC38 (0x00000040) -#define INTC_INTFRCH_INTFRC39 (0x00000080) -#define INTC_INTFRCH_INTFRC40 (0x00000100) -#define INTC_INTFRCH_INTFRC41 (0x00000200) -#define INTC_INTFRCH_INTFRC42 (0x00000400) -#define INTC_INTFRCH_INTFRC43 (0x00000800) -#define INTC_INTFRCH_INTFRC44 (0x00001000) -#define INTC_INTFRCH_INTFRC45 (0x00002000) -#define INTC_INTFRCH_INTFRC46 (0x00004000) -#define INTC_INTFRCH_INTFRC47 (0x00008000) -#define INTC_INTFRCH_INTFRC48 (0x00010000) -#define INTC_INTFRCH_INTFRC49 (0x00020000) -#define INTC_INTFRCH_INTFRC50 (0x00040000) -#define INTC_INTFRCH_INTFRC51 (0x00080000) -#define INTC_INTFRCH_INTFRC52 (0x00100000) -#define INTC_INTFRCH_INTFRC53 (0x00200000) -#define INTC_INTFRCH_INTFRC54 (0x00400000) -#define INTC_INTFRCH_INTFRC55 (0x00800000) -#define INTC_INTFRCH_INTFRC56 (0x01000000) -#define INTC_INTFRCH_INTFRC57 (0x02000000) -#define INTC_INTFRCH_INTFRC58 (0x04000000) -#define INTC_INTFRCH_INTFRC59 (0x08000000) -#define INTC_INTFRCH_INTFRC60 (0x10000000) -#define INTC_INTFRCH_INTFRC61 (0x20000000) -#define INTC_INTFRCH_INTFRC62 (0x40000000) -#define INTC_INTFRCH_INTFRC63 (0x80000000) - -/* Bit definitions and macros for INTFRCL */ -#define INTC_INTFRCL_INTFRC0 (0x00000001) -#define INTC_INTFRCL_INTFRC1 (0x00000002) -#define INTC_INTFRCL_INTFRC2 (0x00000004) -#define INTC_INTFRCL_INTFRC3 (0x00000008) -#define INTC_INTFRCL_INTFRC4 (0x00000010) -#define INTC_INTFRCL_INTFRC5 (0x00000020) -#define INTC_INTFRCL_INTFRC6 (0x00000040) -#define INTC_INTFRCL_INTFRC7 (0x00000080) -#define INTC_INTFRCL_INTFRC8 (0x00000100) -#define INTC_INTFRCL_INTFRC9 (0x00000200) -#define INTC_INTFRCL_INTFRC10 (0x00000400) -#define INTC_INTFRCL_INTFRC11 (0x00000800) -#define INTC_INTFRCL_INTFRC12 (0x00001000) -#define INTC_INTFRCL_INTFRC13 (0x00002000) -#define INTC_INTFRCL_INTFRC14 (0x00004000) -#define INTC_INTFRCL_INTFRC15 (0x00008000) -#define INTC_INTFRCL_INTFRC16 (0x00010000) -#define INTC_INTFRCL_INTFRC17 (0x00020000) -#define INTC_INTFRCL_INTFRC18 (0x00040000) -#define INTC_INTFRCL_INTFRC19 (0x00080000) -#define INTC_INTFRCL_INTFRC20 (0x00100000) -#define INTC_INTFRCL_INTFRC21 (0x00200000) -#define INTC_INTFRCL_INTFRC22 (0x00400000) -#define INTC_INTFRCL_INTFRC23 (0x00800000) -#define INTC_INTFRCL_INTFRC24 (0x01000000) -#define INTC_INTFRCL_INTFRC25 (0x02000000) -#define INTC_INTFRCL_INTFRC26 (0x04000000) -#define INTC_INTFRCL_INTFRC27 (0x08000000) -#define INTC_INTFRCL_INTFRC28 (0x10000000) -#define INTC_INTFRCL_INTFRC29 (0x20000000) -#define INTC_INTFRCL_INTFRC30 (0x40000000) -#define INTC_INTFRCL_INTFRC31 (0x80000000) - -/* Bit definitions and macros for ICONFIG */ -#define INTC_ICONFIG_EMASK (0x0020) -#define INTC_ICONFIG_ELVLPRI1 (0x0200) -#define INTC_ICONFIG_ELVLPRI2 (0x0400) -#define INTC_ICONFIG_ELVLPRI3 (0x0800) -#define INTC_ICONFIG_ELVLPRI4 (0x1000) -#define INTC_ICONFIG_ELVLPRI5 (0x2000) -#define INTC_ICONFIG_ELVLPRI6 (0x4000) -#define INTC_ICONFIG_ELVLPRI7 (0x8000) - -/* Bit definitions and macros for SIMR */ -#define INTC_SIMR_SIMR(x) (((x)&0x7F)) - -/* Bit definitions and macros for CIMR */ -#define INTC_CIMR_CIMR(x) (((x)&0x7F)) - -/* Bit definitions and macros for CLMASK */ -#define INTC_CLMASK_CLMASK(x) (((x)&0x0F)) - -/* Bit definitions and macros for SLMASK */ -#define INTC_SLMASK_SLMASK(x) (((x)&0x0F)) - -/* Bit definitions and macros for ICR group */ -#define INTC_ICR_IL(x) (((x)&0x07)) - /********************************************************************* * Reset Controller Module (RCM) *********************************************************************/ @@ -513,8 +282,8 @@ /* Bit definitions and macros for PAR_DSPI */ #define GPIO_PAR_DSPI_PCS0_MASK (0x3F) -#define GPIO_PAR_DSPI_PCS0_PCS0 (0x80) -#define GPIO_PAR_DSPI_PCS0_U2RTS (0x40) +#define GPIO_PAR_DSPI_PCS0_PCS0 (0xC0) +#define GPIO_PAR_DSPI_PCS0_U2RTS (0x80) #define GPIO_PAR_DSPI_PCS0_GPIO (0x00) #define GPIO_PAR_DSPI_SIN_MASK (0xCF) #define GPIO_PAR_DSPI_SIN_SIN (0x30) |