diff options
Diffstat (limited to 'include/asm-arm')
-rw-r--r-- | include/asm-arm/arch-davinci/emac_defs.h | 4 | ||||
-rw-r--r-- | include/asm-arm/arch-davinci/gpio_defs.h | 53 | ||||
-rw-r--r-- | include/asm-arm/arch-davinci/hardware.h | 11 | ||||
-rw-r--r-- | include/asm-arm/arch-davinci/nand_defs.h | 2 | ||||
-rw-r--r-- | include/asm-arm/arch-omap3/mmc.h | 7 | ||||
-rw-r--r-- | include/asm-arm/arch-omap3/omap3.h | 2 | ||||
-rw-r--r-- | include/asm-arm/arch-omap3/sys_proto.h | 2 |
7 files changed, 77 insertions, 4 deletions
diff --git a/include/asm-arm/arch-davinci/emac_defs.h b/include/asm-arm/arch-davinci/emac_defs.h index ae75f84..96bc80e 100644 --- a/include/asm-arm/arch-davinci/emac_defs.h +++ b/include/asm-arm/arch-davinci/emac_defs.h @@ -50,7 +50,7 @@ #define EMAC_MDIO_BASE_ADDR (0x01c84000) #endif -#ifdef CONFIG_SOC_DM646x +#ifdef CONFIG_SOC_DM646X /* MDIO module input frequency */ #define EMAC_MDIO_BUS_FREQ 76500000 /* MDIO clock output frequency */ @@ -283,7 +283,7 @@ typedef struct { /* EMAC Wrapper Registers Structure */ typedef struct { -#if defined(CONFIG_SOC_DM646x) || defined(CONFIG_SOC_DM365) +#if defined(CONFIG_SOC_DM646X) || defined(CONFIG_SOC_DM365) dv_reg IDVER; dv_reg SOFTRST; dv_reg EMCTRL; diff --git a/include/asm-arm/arch-davinci/gpio_defs.h b/include/asm-arm/arch-davinci/gpio_defs.h new file mode 100644 index 0000000..ec43969 --- /dev/null +++ b/include/asm-arm/arch-davinci/gpio_defs.h @@ -0,0 +1,53 @@ +/* + * Copyright (C) 2009 Texas Instruments Incorporated + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#ifndef _GPIO_DEFS_H_ +#define _GPIO_DEFS_H_ + +#define DAVINCI_GPIO_BINTEN 0x01C67008 +#define DAVINCI_GPIO_BANK01 0x01C67010 +#define DAVINCI_GPIO_BANK23 0x01C67038 +#define DAVINCI_GPIO_BANK45 0x01C67060 +#define DAVINCI_GPIO_BANK67 0x01C67088 + +struct davinci_gpio { + unsigned int dir; + unsigned int out_data; + unsigned int set_data; + unsigned int clr_data; + unsigned int in_data; + unsigned int set_rising; + unsigned int clr_rising; + unsigned int set_falling; + unsigned int clr_falling; + unsigned int intstat; +}; + +struct davinci_gpio_bank { + int num_gpio; + unsigned int irq_num; + unsigned int irq_mask; + unsigned long *in_use; + unsigned long base; +}; + +#endif + diff --git a/include/asm-arm/arch-davinci/hardware.h b/include/asm-arm/arch-davinci/hardware.h index 313b3f3..ac32510 100644 --- a/include/asm-arm/arch-davinci/hardware.h +++ b/include/asm-arm/arch-davinci/hardware.h @@ -105,6 +105,13 @@ typedef volatile unsigned int * dv_reg_p; #define DAVINCI_ASYNC_EMIF_CNTRL_BASE 0x01d10000 #define DAVINCI_MMC_SD0_BASE 0x01d11000 +#elif defined(CONFIG_SOC_DM646X) +#define DAVINCI_ASYNC_EMIF_CNTRL_BASE 0x20008000 +#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x42000000 +#define DAVINCI_ASYNC_EMIF_DATA_CE1_BASE 0x44000000 +#define DAVINCI_ASYNC_EMIF_DATA_CE2_BASE 0x46000000 +#define DAVINCI_ASYNC_EMIF_DATA_CE3_BASE 0x48000000 + #endif /* Power and Sleep Controller (PSC) Domains */ @@ -153,6 +160,10 @@ typedef volatile unsigned int * dv_reg_p; #define DAVINCI_LPSC_GEM 39 #define DAVINCI_LPSC_IMCOP 40 +#define DAVINCI_DM646X_LPSC_EMAC 14 +#define DAVINCI_DM646X_LPSC_UART0 26 +#define DAVINCI_DM646X_LPSC_I2C 31 + void lpsc_on(unsigned int id); void dsp_on(void); diff --git a/include/asm-arm/arch-davinci/nand_defs.h b/include/asm-arm/arch-davinci/nand_defs.h index 386540e..10f3a39 100644 --- a/include/asm-arm/arch-davinci/nand_defs.h +++ b/include/asm-arm/arch-davinci/nand_defs.h @@ -28,7 +28,7 @@ #include <asm/arch/hardware.h> -#ifdef CONFIG_SOC_DM646x +#ifdef CONFIG_SOC_DM646X #define MASK_CLE 0x80000 #define MASK_ALE 0x40000 #else diff --git a/include/asm-arm/arch-omap3/mmc.h b/include/asm-arm/arch-omap3/mmc.h index 55584d9..196ffdc 100644 --- a/include/asm-arm/arch-omap3/mmc.h +++ b/include/asm-arm/arch-omap3/mmc.h @@ -223,6 +223,13 @@ typedef struct { unsigned short newpublishedrca; } mmc_resp_r6; +typedef union { + unsigned int resp[4]; + mmc_resp_r3 r3; + mmc_resp_r6 r6; + mmc_csd_reg_t Card_CSD; +} mmc_resp_t; + extern mmc_card_data mmc_dev; unsigned char mmc_lowlevel_init(void); diff --git a/include/asm-arm/arch-omap3/omap3.h b/include/asm-arm/arch-omap3/omap3.h index 6459d99..12815f6 100644 --- a/include/asm-arm/arch-omap3/omap3.h +++ b/include/asm-arm/arch-omap3/omap3.h @@ -168,6 +168,8 @@ struct gpio { * ES1 = rev 0 * * ES2 onwards, the value maps to contents of IDCODE register [31:28]. + * + * Note : CPU_3XX_ES20 is used in cache.S. Please review before changing. */ #define CPU_3XX_ES10 0 #define CPU_3XX_ES20 1 diff --git a/include/asm-arm/arch-omap3/sys_proto.h b/include/asm-arm/arch-omap3/sys_proto.h index 7361d08..2246f80 100644 --- a/include/asm-arm/arch-omap3/sys_proto.h +++ b/include/asm-arm/arch-omap3/sys_proto.h @@ -55,7 +55,7 @@ void secureworld_exit(void); void setup_auxcr(void); void try_unlock_memory(void); u32 get_boot_type(void); -void v7_flush_dcache_all(u32); +void invalidate_dcache(u32); void sr32(void *, u32, u32, u32); u32 wait_on_value(u32, u32, void *, u32); void sdelay(unsigned long); |