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-rw-r--r--include/asm-arm/arch-at91rm9200/AT91RM9200.h27
-rw-r--r--include/asm-arm/io.h5
2 files changed, 32 insertions, 0 deletions
diff --git a/include/asm-arm/arch-at91rm9200/AT91RM9200.h b/include/asm-arm/arch-at91rm9200/AT91RM9200.h
index 95db017..00bae1c 100644
--- a/include/asm-arm/arch-at91rm9200/AT91RM9200.h
+++ b/include/asm-arm/arch-at91rm9200/AT91RM9200.h
@@ -781,5 +781,32 @@ typedef struct _AT91S_PDC
#define AT91C_PIOB_ODR ((AT91_REG *) 0xFFFFF614) /* (PIOB) Output Disable Registerr */
#define AT91C_PIOB_PDSR ((AT91_REG *) 0xFFFFF63C) /* (PIOB) Pin Data Status Register */
+#else
+/* flash */
+#define AT91C_MC_PUIA 0xFFFFFF10
+#define AT91C_MC_PUP 0xFFFFFF50
+#define AT91C_MC_PUER 0xFFFFFF54
+#define AT91C_MC_ASR 0xFFFFFF04
+#define AT91C_MC_AASR 0xFFFFFF08
+#define AT91C_EBI_CFGR 0xFFFFFF64
+#define AT91C_SMC_CSR0 0xFFFFFF70
+
+/* clocks */
+#define AT91C_PLLAR 0xFFFFFC28
+#define AT91C_PLLBR 0xFFFFFC2C
+#define AT91C_MCKR 0xFFFFFC30
+
+#define AT91C_BASE_CKGR 0xFFFFFC20
+#define AT91C_CKGR_MOR 0
+
+/* sdram */
+#define AT91C_PIOC_ASR 0xFFFFF870
+#define AT91C_PIOC_BSR 0xFFFFF874
+#define AT91C_PIOC_PDR 0xFFFFF804
+#define AT91C_EBI_CSA 0xFFFFFF60
+#define AT91C_SDRC_CR 0xFFFFFF98
+#define AT91C_SDRC_MR 0xFFFFFF90
+#define AT91C_SDRC_TR 0xFFFFFF94
+
#endif /* __ASSEMBLY__ */
#endif /* AT91RM9200_H */
diff --git a/include/asm-arm/io.h b/include/asm-arm/io.h
index f4ae307..fec3a7e 100644
--- a/include/asm-arm/io.h
+++ b/include/asm-arm/io.h
@@ -57,6 +57,11 @@ static inline void unmap_physmem(void *vaddr, unsigned long flags)
}
+static inline phys_addr_t virt_to_phys(void * vaddr)
+{
+ return (phys_addr_t)(vaddr);
+}
+
/*
* Generic virtual read/write. Note that we don't support half-word
* read/writes. We define __arch_*[bl] here, and leave __arch_*w