diff options
Diffstat (limited to 'include/asm-arm')
| -rw-r--r-- | include/asm-arm/arch-arm720t/netarm_gen_module.h | 22 | ||||
| -rw-r--r-- | include/asm-arm/arch-arm720t/netarm_mem_module.h | 27 | ||||
| -rw-r--r-- | include/asm-arm/arch-arm720t/netarm_registers.h | 19 |
3 files changed, 64 insertions, 4 deletions
diff --git a/include/asm-arm/arch-arm720t/netarm_gen_module.h b/include/asm-arm/arch-arm720t/netarm_gen_module.h index 90d9da8..13656a3 100644 --- a/include/asm-arm/arch-arm720t/netarm_gen_module.h +++ b/include/asm-arm/arch-arm720t/netarm_gen_module.h @@ -1,6 +1,9 @@ /* * include/asm-armnommu/arch-netarm/netarm_gen_module.h * + * Copyright (C) 2005 + * Art Shipkowski, Videon Central, Inc., <art@videon-central.com> + * * Copyright (C) 2000, 2001 NETsilicon, Inc. * Copyright (C) 2000, 2001 Red Hat, Inc. * @@ -27,6 +30,8 @@ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. * * author(s) : Joe deBlaquiere + * + * Modified to support NS7520 by Art Shipkowski. */ #ifndef __NETARM_GEN_MODULE_REGISTERS_H @@ -49,7 +54,9 @@ #define NETARM_GEN_TIMER2_STATUS (0x1c) #define NETARM_GEN_PORTA (0x20) +#ifndef CONFIG_NETARM_NS7520 #define NETARM_GEN_PORTB (0x24) +#endif #define NETARM_GEN_PORTC (0x28) #define NETARM_GEN_INTR_ENABLE (0x30) @@ -128,8 +135,14 @@ /* PORT C Register ( 0xFFB0_0028 ) */ +#ifndef CONFIG_NETARM_NS7520 #define NETARM_GEN_PORT_MODE(x) (((x)<<24) + (0xFF00)) #define NETARM_GEN_PORT_DIR(x) (((x)<<16) + (0xFF00)) +#else +#define NETARM_GEN_PORT_MODE(x) ((x)<<24) +#define NETARM_GEN_PORT_DIR(x) ((x)<<16) +#define NETARM_GEN_PORT_CSF(x) ((x)<<8) +#endif /* Timer Registers ( 0xFFB0_0010 0xFFB0_0018 ) */ @@ -143,10 +156,15 @@ #define NETARM_GEN_TCTL_INIT_COUNT(x) ((x) & 0x1FF) #define NETARM_GEN_TSTAT_INTPEN (0x40000000) +#if ~defined(CONFIG_NETARM_NS7520) #define NETARM_GEN_TSTAT_CTC_MASK (0x000001FF) +#else +#define NETARM_GEN_TSTAT_CTC_MASK (0x0FFFFFFF) +#endif /* prescale to msecs conversion */ +#if !defined(CONFIG_NETARM_PLL_BYPASS) #define NETARM_GEN_TIMER_MSEC_P(x) ( ( ( 20480 ) * ( 0x1FF - ( (x) & \ NETARM_GEN_TSTAT_CTC_MASK ) + \ 1 ) ) / (NETARM_XTAL_FREQ/1000) ) @@ -155,9 +173,7 @@ NETARM_GEN_TSTAT_CTC_MASK ) | \ NETARM_GEN_TCTL_USE_PRESCALE ) -#if 0 -/* ifdef CONFIG_NETARM_PLL_BYPASS else */ -#error test +#else #define NETARM_GEN_TIMER_MSEC_P(x) ( ( ( 4096 ) * ( 0x1FF - ( (x) & \ NETARM_GEN_TSTAT_CTC_MASK ) + \ 1 ) ) / (NETARM_XTAL_FREQ/1000) ) diff --git a/include/asm-arm/arch-arm720t/netarm_mem_module.h b/include/asm-arm/arch-arm720t/netarm_mem_module.h index 7c63d17..f0529fd 100644 --- a/include/asm-arm/arch-arm720t/netarm_mem_module.h +++ b/include/asm-arm/arch-arm720t/netarm_mem_module.h @@ -1,6 +1,9 @@ /* * include/asm-armnommu/arch-netarm/netarm_mem_module.h * + * Copyright (C) 2005 + * Art Shipkowski, Videon Central, Inc., <art@videon-central.com> + * * Copyright (C) 2000, 2001 NETsilicon, Inc. * Copyright (C) 2000, 2001 Red Hat, Inc. * @@ -27,6 +30,8 @@ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. * * author(s) : Joe deBlaquiere + * + * Modified to support NS7520 by Art Shipkowski. */ #ifndef __NETARM_MEM_MODULE_REGISTERS_H @@ -154,4 +159,26 @@ #define NETARM_MEM_OPT_WRITE_ASYNC (0x00000000) #define NETARM_MEM_OPT_WRITE_SYNC (0x00000001) +#ifdef CONFIG_NETARM_NS7520 +/* The NS7520 has a second options register for each chip select */ +#define NETARM_MEM_CS0_OPTIONS_B (0x18) +#define NETARM_MEM_CS1_OPTIONS_B (0x28) +#define NETARM_MEM_CS2_OPTIONS_B (0x38) +#define NETARM_MEM_CS3_OPTIONS_B (0x48) +#define NETARM_MEM_CS4_OPTIONS_B (0x58) + +/* Option B Registers (0xFFC0_00x8) */ +#define NETARM_MEM_OPTB_SYNC_1_STAGE (0x00000001) +#define NETARM_MEM_OPTB_SYNC_2_STAGE (0x00000002) +#define NETARM_MEM_OPTB_BCYC_PLUS0 (0x00000000) +#define NETARM_MEM_OPTB_BCYC_PLUS4 (0x00000004) +#define NETARM_MEM_OPTB_BCYC_PLUS8 (0x00000008) +#define NETARM_MEM_OPTB_BCYC_PLUS12 (0x0000000C) + +#define NETARM_MEM_OPTB_WAIT_PLUS0 (0x00000000) +#define NETARM_MEM_OPTB_WAIT_PLUS16 (0x00000010) +#define NETARM_MEM_OPTB_WAIT_PLUS32 (0x00000020) +#define NETARM_MEM_OPTB_WAIT_PLUS48 (0x00000030) +#endif + #endif diff --git a/include/asm-arm/arch-arm720t/netarm_registers.h b/include/asm-arm/arch-arm720t/netarm_registers.h index 029c7f4..fa88128 100644 --- a/include/asm-arm/arch-arm720t/netarm_registers.h +++ b/include/asm-arm/arch-arm720t/netarm_registers.h @@ -1,6 +1,9 @@ /* * linux/include/asm-arm/arch-netarm/netarm_registers.h * + * Copyright (C) 2005 + * Art Shipkowski, Videon Central, Inc., <art@videon-central.com> + * * Copyright (C) 2000, 2001 NETsilicon, Inc. * Copyright (C) 2000, 2001 WireSpeed Communications Corporation * @@ -27,6 +30,8 @@ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. * * author(s) : Joe deBlaquiere + * + * Modified to support NS7520 by Art Shipkowski. */ #ifndef __NET_ARM_REGISTERS_H @@ -38,6 +43,8 @@ /* the input crystal/clock frequency ( in Hz ) */ #define NETARM_XTAL_FREQ_25MHz (18432000) #define NETARM_XTAL_FREQ_33MHz (23698000) +#define NETARM_XTAL_FREQ_48MHz (48000000) +#define NETARM_XTAL_FREQ_55MHz (55000000) #define NETARM_XTAL_FREQ_EMLIN1 (20000000) /* the frequency of SYS_CLK */ @@ -60,12 +67,22 @@ #define NETARM_PLL_COUNT_VAL 4 #define NETARM_XTAL_FREQ NETARM_XTAL_FREQ_25MHz -#else /* CONFIG_NETARM_NET50 */ +#elif defined(CONFIG_NETARM_NET50) /* NET+50 boards: 40 MHz (with NETARM_XTAL_FREQ_25MHz) */ #define NETARM_PLL_COUNT_VAL 8 #define NETARM_XTAL_FREQ NETARM_XTAL_FREQ_25MHz +#else /* CONFIG_NETARM_NS7520 */ + +#define NETARM_PLL_COUNT_VAL 0 + +#if defined(CONFIG_BOARD_UNC20) +#define NETARM_XTAL_FREQ NETARM_XTAL_FREQ_48MHz +#else +#define NETARM_XTAL_FREQ NETARM_XTAL_FREQ_55MHz +#endif + #endif /* #include "arm_registers.h" */ |