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-rw-r--r--examples/82559_eeprom.c17
-rw-r--r--examples/mem_to_mem_idma2intr.c8
-rw-r--r--examples/mips.lds2
-rw-r--r--examples/stubs.c6
-rw-r--r--examples/test_burst.c12
5 files changed, 25 insertions, 20 deletions
diff --git a/examples/82559_eeprom.c b/examples/82559_eeprom.c
index 1a121d4..5e2eee9 100644
--- a/examples/82559_eeprom.c
+++ b/examples/82559_eeprom.c
@@ -19,7 +19,6 @@
*/
#define _PPC_STRING_H_ /* avoid unnecessary str/mem functions */
-#define _LINUX_STRING_H_ /* avoid unnecessary str/mem functions */
#include <common.h>
#include <exports.h>
@@ -51,13 +50,17 @@ static inline unsigned short swap16(unsigned short x)
}
-static inline void *memcpy(void *dst, const void *src, unsigned int len)
+void * memcpy(void * dest,const void *src,size_t count)
{
- void * ret = dst;
- while (len-- > 0) *((char *)dst)++ = *((char *)src)++;
- return ret;
+ char *tmp = (char *) dest, *s = (char *) src;
+
+ while (count--)
+ *tmp++ = *s++;
+
+ return dest;
}
+
/* The EEPROM commands include the alway-set leading bit. */
#define EE_WRITE_CMD (5)
#define EE_READ_CMD (6)
@@ -156,7 +159,7 @@ static int reset_eeprom(unsigned long ioaddr, unsigned char *hwaddr)
int size_test;
int i;
- printf("Resetting i82559 EEPROM @ 0x%08x ... ", ioaddr);
+ printf("Resetting i82559 EEPROM @ 0x%08lx ... ", ioaddr);
size_test = do_eeprom_cmd(ioaddr, (EE_READ_CMD << 8) << 16, 27);
eeprom_addr_size = (size_test & 0xffe0000) == 0xffe0000 ? 8 : 6;
@@ -305,7 +308,7 @@ write_config_word(int bus, int dev, int func, int reg, u16 data)
int main (int argc, char *argv[])
{
unsigned char *eth_addr;
- char buf[6];
+ uchar buf[6];
int instance;
app_startup(argv);
diff --git a/examples/mem_to_mem_idma2intr.c b/examples/mem_to_mem_idma2intr.c
index 3ff2804..15779d0 100644
--- a/examples/mem_to_mem_idma2intr.c
+++ b/examples/mem_to_mem_idma2intr.c
@@ -39,8 +39,8 @@ DECLARE_GLOBAL_DATA_PTR;
#include <watchdog.h>
#else /* Standalone app of PPCBoot */
#define WATCHDOG_RESET() { \
- *(ushort *)(CFG_IMMR + 0x1000E) = 0x556c; \
- *(ushort *)(CFG_IMMR + 0x1000E) = 0xaa39; \
+ *(ushort *)(CONFIG_SYS_IMMR + 0x1000E) = 0x556c; \
+ *(ushort *)(CONFIG_SYS_IMMR + 0x1000E) = 0xaa39; \
}
#endif /* STANDALONE */
@@ -156,7 +156,7 @@ typedef struct pram_idma {
} pram_idma_t;
-volatile immap_t *immap = (immap_t *) CFG_IMMR;
+volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
volatile ibd_t *bdf;
volatile pram_idma_t *piptr;
@@ -348,7 +348,7 @@ static uint dpbase = 0;
uint dpalloc (uint size, uint align)
{
- volatile immap_t *immr = (immap_t *) CFG_IMMR;
+ volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
uint retloc;
uint align_mask, off;
uint savebase;
diff --git a/examples/mips.lds b/examples/mips.lds
index aceb6e9..939e0e6 100644
--- a/examples/mips.lds
+++ b/examples/mips.lds
@@ -53,7 +53,7 @@ SECTIONS
. = ALIGN(4);
__bss_start = .;
.sbss (NOLOAD) : { *(.sbss) }
- .bss (NOLOAD) : { *(.bss) }
+ .bss (NOLOAD) : { *(.bss) . = ALIGN(4); }
_end = .;
}
diff --git a/examples/stubs.c b/examples/stubs.c
index ec53532..a8cb954 100644
--- a/examples/stubs.c
+++ b/examples/stubs.c
@@ -162,11 +162,13 @@ gd_t *global_data;
#x ":\n" \
" mov r13, r1\n" \
" add %0, r1\n" \
- " add %1, r1\n" \
+ " mov.l @r1, r2\n" \
+ " add %1, r2\n" \
+ " mov.l @r2, r1\n" \
" jmp @r1\n" \
" nop\n" \
" nop\n" \
- : : "i"(offsetof(gd_t, jt)), "i"(XF_ ## x * sizeof(void *)) : "r1");
+ : : "i"(offsetof(gd_t, jt)), "i"(XF_ ## x * sizeof(void *)) : "r1", "r2");
#elif defined(CONFIG_SPARC)
/*
* g7 holds the pointer to the global_data. g1 is call clobbered.
diff --git a/examples/test_burst.c b/examples/test_burst.c
index d8c5ed4..7109c09 100644
--- a/examples/test_burst.c
+++ b/examples/test_burst.c
@@ -50,19 +50,19 @@
/* Define GPIO ports to signal start of burst transfers and errors */
#ifdef CONFIG_LWMON
/* Use PD.8 to signal start of burst transfers */
-#define GPIO1_DAT (((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pddat)
+#define GPIO1_DAT (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat)
#define GPIO1_BIT 0x0080
/* Configure PD.8 as general purpose output */
#define GPIO1_INIT \
- ((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pdpar &= ~GPIO1_BIT; \
- ((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pddir |= GPIO1_BIT;
+ ((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pdpar &= ~GPIO1_BIT; \
+ ((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddir |= GPIO1_BIT;
/* Use PD.9 to signal error */
-#define GPIO2_DAT (((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pddat)
+#define GPIO2_DAT (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat)
#define GPIO2_BIT 0x0040
/* Configure PD.9 as general purpose output */
#define GPIO2_INIT \
- ((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pdpar &= ~GPIO2_BIT; \
- ((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pddir |= GPIO2_BIT;
+ ((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pdpar &= ~GPIO2_BIT; \
+ ((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddir |= GPIO2_BIT;
#endif /* CONFIG_LWMON */