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-rw-r--r--drivers/mmc/socfpga_dw_mmc.c32
1 files changed, 31 insertions, 1 deletions
diff --git a/drivers/mmc/socfpga_dw_mmc.c b/drivers/mmc/socfpga_dw_mmc.c
index 6a0e971..8a96302 100644
--- a/drivers/mmc/socfpga_dw_mmc.c
+++ b/drivers/mmc/socfpga_dw_mmc.c
@@ -22,6 +22,11 @@ static const struct socfpga_clock_manager *clock_manager_base =
static const struct socfpga_system_manager *system_manager_base =
(void *)SOCFPGA_SYSMGR_ADDRESS;
+struct socfpga_dwmci_plat {
+ struct mmc_config cfg;
+ struct mmc mmc;
+};
+
/* socfpga implmentation specific driver private data */
struct dwmci_socfpga_priv_data {
struct dwmci_host host;
@@ -98,21 +103,45 @@ static int socfpga_dwmmc_ofdata_to_platdata(struct udevice *dev)
static int socfpga_dwmmc_probe(struct udevice *dev)
{
+#ifdef CONFIG_BLK
+ struct socfpga_dwmci_plat *plat = dev_get_platdata(dev);
+#endif
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
struct dwmci_socfpga_priv_data *priv = dev_get_priv(dev);
struct dwmci_host *host = &priv->host;
+
+#ifdef CONFIG_BLK
+ dwmci_setup_cfg(&plat->cfg, dev->name, host->buswidth, host->caps,
+ host->bus_hz, 400000);
+ host->mmc = &plat->mmc;
+#else
int ret;
ret = add_dwmci(host, host->bus_hz, 400000);
if (ret)
return ret;
-
+#endif
+ host->mmc->priv = &priv->host;
upriv->mmc = host->mmc;
host->mmc->dev = dev;
return 0;
}
+static int socfpga_dwmmc_bind(struct udevice *dev)
+{
+#ifdef CONFIG_BLK
+ struct socfpga_dwmci_plat *plat = dev_get_platdata(dev);
+ int ret;
+
+ ret = dwmci_bind(dev, &plat->mmc, &plat->cfg);
+ if (ret)
+ return ret;
+#endif
+
+ return 0;
+}
+
static const struct udevice_id socfpga_dwmmc_ids[] = {
{ .compatible = "altr,socfpga-dw-mshc" },
{ }
@@ -123,6 +152,7 @@ U_BOOT_DRIVER(socfpga_dwmmc_drv) = {
.id = UCLASS_MMC,
.of_match = socfpga_dwmmc_ids,
.ofdata_to_platdata = socfpga_dwmmc_ofdata_to_platdata,
+ .bind = socfpga_dwmmc_bind,
.probe = socfpga_dwmmc_probe,
.priv_auto_alloc_size = sizeof(struct dwmci_socfpga_priv_data),
};