diff options
Diffstat (limited to 'drivers')
231 files changed, 3059 insertions, 1187 deletions
diff --git a/drivers/Kconfig b/drivers/Kconfig index 4f84469..4c555a0 100644 --- a/drivers/Kconfig +++ b/drivers/Kconfig @@ -20,6 +20,8 @@ source "drivers/dfu/Kconfig" source "drivers/dma/Kconfig" +source "drivers/fpga/Kconfig" + source "drivers/gpio/Kconfig" source "drivers/hwmon/Kconfig" diff --git a/drivers/Makefile b/drivers/Makefile index 7861d34..ca98273 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -40,8 +40,22 @@ obj-$(CONFIG_OMAP_USB_PHY) += usb/phy/ obj-$(CONFIG_SPL_SATA_SUPPORT) += block/ obj-$(CONFIG_SPL_USB_HOST_SUPPORT) += block/ obj-$(CONFIG_SPL_MMC_SUPPORT) += block/ +endif + +ifdef CONFIG_TPL_BUILD + +obj-$(CONFIG_TPL_I2C_SUPPORT) += i2c/ +obj-$(CONFIG_TPL_DRIVERS_MISC_SUPPORT) += misc/ sysreset/ +obj-$(CONFIG_TPL_MMC_SUPPORT) += mmc/ +obj-$(CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT) += ddr/fsl/ +obj-$(CONFIG_TPL_NAND_SUPPORT) += mtd/nand/ +obj-$(CONFIG_TPL_SERIAL_SUPPORT) += serial/ +obj-$(CONFIG_TPL_SPI_FLASH_SUPPORT) += mtd/spi/ +obj-$(CONFIG_TPL_SPI_SUPPORT) += spi/ + +endif -else +ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),) obj-y += adc/ obj-$(CONFIG_DM_DEMO) += demo/ diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c index e3e783a..2e1ddf9 100644 --- a/drivers/block/ahci.c +++ b/drivers/block/ahci.c @@ -13,7 +13,7 @@ #include <dm.h> #include <pci.h> #include <asm/processor.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/io.h> #include <malloc.h> #include <memalign.h> diff --git a/drivers/block/dwc_ahsata.c b/drivers/block/dwc_ahsata.c index 6056fe5..c306e92 100644 --- a/drivers/block/dwc_ahsata.c +++ b/drivers/block/dwc_ahsata.c @@ -13,7 +13,7 @@ #include <common.h> #include <malloc.h> #include <linux/ctype.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/io.h> #include <linux/bitops.h> #include <asm/arch/clock.h> diff --git a/drivers/block/pata_bfin.c b/drivers/block/pata_bfin.c index 26569d7..36a1512 100644 --- a/drivers/block/pata_bfin.c +++ b/drivers/block/pata_bfin.c @@ -14,7 +14,7 @@ #include <asm/byteorder.h> #include <asm/clock.h> #include <asm/io.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/portmux.h> #include <asm/mach-common/bits/pata.h> #include <ata.h> diff --git a/drivers/block/sandbox.c b/drivers/block/sandbox.c index ac28f83..36c2ff3 100644 --- a/drivers/block/sandbox.c +++ b/drivers/block/sandbox.c @@ -12,7 +12,7 @@ #include <os.h> #include <malloc.h> #include <sandboxblockdev.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <dm/device-internal.h> DECLARE_GLOBAL_DATA_PTR; diff --git a/drivers/block/sata_dwc.c b/drivers/block/sata_dwc.c index b14985a..a226ca2 100644 --- a/drivers/block/sata_dwc.c +++ b/drivers/block/sata_dwc.c @@ -26,7 +26,7 @@ #include <command.h> #include <pci.h> #include <asm/processor.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/io.h> #include <malloc.h> #include <ata.h> diff --git a/drivers/block/sata_mv.c b/drivers/block/sata_mv.c index 8824934..414d2dc 100644 --- a/drivers/block/sata_mv.c +++ b/drivers/block/sata_mv.c @@ -37,7 +37,7 @@ #include <libata.h> #include <malloc.h> #include <sata.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/io.h> #include <linux/mbus.h> diff --git a/drivers/block/sym53c8xx.c b/drivers/block/sym53c8xx.c index 5daede7..50043e6 100644 --- a/drivers/block/sym53c8xx.c +++ b/drivers/block/sym53c8xx.c @@ -284,9 +284,8 @@ void scsi_low_level_init(int busdevfunc) */ unsigned long swap_script(unsigned long val) { - unsigned long tmp; - tmp = ((val>>24)&0xff) | ((val>>8)&0xff00) | ((val<<8)&0xff0000) | ((val<<24)&0xff000000); - return tmp; + return ((val >> 24) & 0xff) | ((val >> 8) & 0xff00) | + ((val << 8) & 0xff0000) | ((val << 24) & 0xff000000); } diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index 8f3b96a..c05ce2a 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -20,6 +20,14 @@ config SPL_CLK setting up clocks within SPL, and allows the same drivers to be used as U-Boot proper. +config CLK_BOSTON + def_bool y if TARGET_BOSTON + depends on CLK + select REGMAP + select SYSCON + help + Enable this to support the clocks + source "drivers/clk/tegra/Kconfig" source "drivers/clk/uniphier/Kconfig" source "drivers/clk/exynos/Kconfig" diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 778d748..40a5e8c 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -15,3 +15,4 @@ obj-y += tegra/ obj-$(CONFIG_CLK_UNIPHIER) += uniphier/ obj-$(CONFIG_CLK_EXYNOS) += exynos/ obj-$(CONFIG_CLK_AT91) += at91/ +obj-$(CONFIG_CLK_BOSTON) += clk_boston.o diff --git a/drivers/clk/clk_boston.c b/drivers/clk/clk_boston.c new file mode 100644 index 0000000..78f1b75 --- /dev/null +++ b/drivers/clk/clk_boston.c @@ -0,0 +1,97 @@ +/* + * Copyright (C) 2016 Imagination Technologies + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#include <common.h> +#include <clk-uclass.h> +#include <dm.h> +#include <dt-bindings/clock/boston-clock.h> +#include <regmap.h> +#include <syscon.h> + +struct clk_boston { + struct regmap *regmap; +}; + +#define BOSTON_PLAT_MMCMDIV 0x30 +# define BOSTON_PLAT_MMCMDIV_CLK0DIV (0xff << 0) +# define BOSTON_PLAT_MMCMDIV_INPUT (0xff << 8) +# define BOSTON_PLAT_MMCMDIV_MUL (0xff << 16) +# define BOSTON_PLAT_MMCMDIV_CLK1DIV (0xff << 24) + +static uint32_t ext_field(uint32_t val, uint32_t mask) +{ + return (val & mask) >> (ffs(mask) - 1); +} + +static ulong clk_boston_get_rate(struct clk *clk) +{ + struct clk_boston *state = dev_get_platdata(clk->dev); + uint32_t in_rate, mul, div; + uint mmcmdiv; + int err; + + err = regmap_read(state->regmap, BOSTON_PLAT_MMCMDIV, &mmcmdiv); + if (err) + return 0; + + in_rate = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_INPUT); + mul = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_MUL); + + switch (clk->id) { + case BOSTON_CLK_SYS: + div = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_CLK0DIV); + break; + case BOSTON_CLK_CPU: + div = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_CLK1DIV); + break; + default: + return 0; + } + + return (in_rate * mul * 1000000) / div; +} + +const struct clk_ops clk_boston_ops = { + .get_rate = clk_boston_get_rate, +}; + +static int clk_boston_ofdata_to_platdata(struct udevice *dev) +{ + struct clk_boston *state = dev_get_platdata(dev); + struct udevice *syscon; + int err; + + err = uclass_get_device_by_phandle(UCLASS_SYSCON, dev, + "regmap", &syscon); + if (err) { + error("unable to find syscon device\n"); + return err; + } + + state->regmap = syscon_get_regmap(syscon); + if (!state->regmap) { + error("unable to find regmap\n"); + return -ENODEV; + } + + return 0; +} + +static const struct udevice_id clk_boston_match[] = { + { + .compatible = "img,boston-clock", + }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(clk_boston) = { + .name = "boston_clock", + .id = UCLASS_CLK, + .of_match = clk_boston_match, + .ofdata_to_platdata = clk_boston_ofdata_to_platdata, + .platdata_auto_alloc_size = sizeof(struct clk_boston), + .ops = &clk_boston_ops, +}; diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c index c07203d..bd71a96 100644 --- a/drivers/clk/rockchip/clk_rk3288.c +++ b/drivers/clk/rockchip/clk_rk3288.c @@ -695,6 +695,8 @@ static ulong rk3288_clk_get_rate(struct clk *clk) case PCLK_I2C4: case PCLK_I2C5: return gclk_rate; + case PCLK_PWM: + return PD_BUS_PCLK_HZ; default: return -ENOENT; } diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c index 0b4ea82..ea0ce2a 100644 --- a/drivers/clk/rockchip/clk_rk3399.c +++ b/drivers/clk/rockchip/clk_rk3399.c @@ -23,6 +23,10 @@ struct rk3399_clk_priv { ulong rate; }; +struct rk3399_pmuclk_priv { + struct rk3399_pmucru *pmucru; +}; + struct pll_div { u32 refdiv; u32 fbdiv; @@ -95,11 +99,11 @@ enum { /* PMUCRU_CLKSEL_CON2 */ I2C_DIV_CON_MASK = 0x7f, - I2C8_DIV_CON_SHIFT = 8, - I2C0_DIV_CON_SHIFT = 0, + CLK_I2C8_DIV_CON_SHIFT = 8, + CLK_I2C0_DIV_CON_SHIFT = 0, /* PMUCRU_CLKSEL_CON3 */ - I2C4_DIV_CON_SHIFT = 0, + CLK_I2C4_DIV_CON_SHIFT = 0, /* CLKSEL_CON0 */ ACLKM_CORE_L_DIV_CON_SHIFT = 8, @@ -507,6 +511,14 @@ void rk3399_configure_cpu(struct rk3399_cru *cru, (con >> CLK_I2C ##bus## _DIV_CON_SHIFT) & \ I2C_DIV_CON_MASK; +#define I2C_PMUCLK_REG_MASK(bus) \ + (I2C_DIV_CON_MASK << \ + CLK_I2C ##bus## _DIV_CON_SHIFT) + +#define I2C_PMUCLK_REG_VALUE(bus, clk_div) \ + ((clk_div - 1) << \ + CLK_I2C ##bus## _DIV_CON_SHIFT) + static ulong rk3399_i2c_get_clk(struct rk3399_cru *cru, ulong clk_id) { u32 div, con; @@ -754,7 +766,7 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate) break; case DCLK_VOP0: case DCLK_VOP1: - rate = rk3399_vop_set_clk(priv->cru, clk->id, rate); + ret = rk3399_vop_set_clk(priv->cru, clk->id, rate); break; default: return -ENOENT; @@ -830,3 +842,160 @@ U_BOOT_DRIVER(clk_rk3399) = { .bind = rk3399_clk_bind, .probe = rk3399_clk_probe, }; + +static ulong rk3399_i2c_get_pmuclk(struct rk3399_pmucru *pmucru, ulong clk_id) +{ + u32 div, con; + + switch (clk_id) { + case SCLK_I2C0_PMU: + con = readl(&pmucru->pmucru_clksel[2]); + div = I2C_CLK_DIV_VALUE(con, 0); + break; + case SCLK_I2C4_PMU: + con = readl(&pmucru->pmucru_clksel[3]); + div = I2C_CLK_DIV_VALUE(con, 4); + break; + case SCLK_I2C8_PMU: + con = readl(&pmucru->pmucru_clksel[2]); + div = I2C_CLK_DIV_VALUE(con, 8); + break; + default: + printf("do not support this i2c bus\n"); + return -EINVAL; + } + + return DIV_TO_RATE(PPLL_HZ, div); +} + +static ulong rk3399_i2c_set_pmuclk(struct rk3399_pmucru *pmucru, ulong clk_id, + uint hz) +{ + int src_clk_div; + + src_clk_div = PPLL_HZ / hz; + assert(src_clk_div - 1 < 127); + + switch (clk_id) { + case SCLK_I2C0_PMU: + rk_clrsetreg(&pmucru->pmucru_clksel[2], I2C_PMUCLK_REG_MASK(0), + I2C_PMUCLK_REG_VALUE(0, src_clk_div)); + break; + case SCLK_I2C4_PMU: + rk_clrsetreg(&pmucru->pmucru_clksel[3], I2C_PMUCLK_REG_MASK(4), + I2C_PMUCLK_REG_VALUE(4, src_clk_div)); + break; + case SCLK_I2C8_PMU: + rk_clrsetreg(&pmucru->pmucru_clksel[2], I2C_PMUCLK_REG_MASK(8), + I2C_PMUCLK_REG_VALUE(8, src_clk_div)); + break; + default: + printf("do not support this i2c bus\n"); + return -EINVAL; + } + + return DIV_TO_RATE(PPLL_HZ, src_clk_div); +} + +static ulong rk3399_pwm_get_clk(struct rk3399_pmucru *pmucru) +{ + u32 div, con; + + /* PWM closk rate is same as pclk_pmu */ + con = readl(&pmucru->pmucru_clksel[0]); + div = con & PMU_PCLK_DIV_CON_MASK; + + return DIV_TO_RATE(PPLL_HZ, div); +} + +static ulong rk3399_pmuclk_get_rate(struct clk *clk) +{ + struct rk3399_pmuclk_priv *priv = dev_get_priv(clk->dev); + ulong rate = 0; + + switch (clk->id) { + case PCLK_RKPWM_PMU: + rate = rk3399_pwm_get_clk(priv->pmucru); + break; + case SCLK_I2C0_PMU: + case SCLK_I2C4_PMU: + case SCLK_I2C8_PMU: + rate = rk3399_i2c_get_pmuclk(priv->pmucru, clk->id); + break; + default: + return -ENOENT; + } + + return rate; +} + +static ulong rk3399_pmuclk_set_rate(struct clk *clk, ulong rate) +{ + struct rk3399_pmuclk_priv *priv = dev_get_priv(clk->dev); + ulong ret = 0; + + switch (clk->id) { + case SCLK_I2C0_PMU: + case SCLK_I2C4_PMU: + case SCLK_I2C8_PMU: + ret = rk3399_i2c_set_pmuclk(priv->pmucru, clk->id, rate); + break; + default: + return -ENOENT; + } + + return ret; +} + +static struct clk_ops rk3399_pmuclk_ops = { + .get_rate = rk3399_pmuclk_get_rate, + .set_rate = rk3399_pmuclk_set_rate, +}; + +static void pmuclk_init(struct rk3399_pmucru *pmucru) +{ + u32 pclk_div; + + /* configure pmu pll(ppll) */ + rkclk_set_pll(&pmucru->ppll_con[0], &ppll_init_cfg); + + /* configure pmu pclk */ + pclk_div = PPLL_HZ / PMU_PCLK_HZ - 1; + assert((pclk_div + 1) * PMU_PCLK_HZ == PPLL_HZ && pclk_div < 0x1f); + rk_clrsetreg(&pmucru->pmucru_clksel[0], + PMU_PCLK_DIV_CON_MASK, + pclk_div << PMU_PCLK_DIV_CON_SHIFT); +} + +static int rk3399_pmuclk_probe(struct udevice *dev) +{ + struct rk3399_pmuclk_priv *priv = dev_get_priv(dev); + + pmuclk_init(priv->pmucru); + + return 0; +} + +static int rk3399_pmuclk_ofdata_to_platdata(struct udevice *dev) +{ + struct rk3399_pmuclk_priv *priv = dev_get_priv(dev); + + priv->pmucru = (struct rk3399_pmucru *)dev_get_addr(dev); + + return 0; +} + +static const struct udevice_id rk3399_pmuclk_ids[] = { + { .compatible = "rockchip,rk3399-pmucru" }, + { } +}; + +U_BOOT_DRIVER(pmuclk_rk3399) = { + .name = "pmuclk_rk3399", + .id = UCLASS_CLK, + .of_match = rk3399_pmuclk_ids, + .priv_auto_alloc_size = sizeof(struct rk3399_pmuclk_priv), + .ofdata_to_platdata = rk3399_pmuclk_ofdata_to_platdata, + .ops = &rk3399_pmuclk_ops, + .probe = rk3399_pmuclk_probe, +}; diff --git a/drivers/clk/uniphier/clk-uniphier-core.c b/drivers/clk/uniphier/clk-uniphier-core.c index a91924e..3948326 100644 --- a/drivers/clk/uniphier/clk-uniphier-core.c +++ b/drivers/clk/uniphier/clk-uniphier-core.c @@ -14,10 +14,39 @@ #include "clk-uniphier.h" +/** + * struct uniphier_clk_priv - private data for UniPhier clock driver + * + * @base: base address of the clock provider + * @socdata: SoC specific data + */ +struct uniphier_clk_priv { + void __iomem *base; + const struct uniphier_clk_soc_data *socdata; +}; + +int uniphier_clk_probe(struct udevice *dev) +{ + struct uniphier_clk_priv *priv = dev_get_priv(dev); + fdt_addr_t addr; + + addr = dev_get_addr(dev->parent); + if (addr == FDT_ADDR_T_NONE) + return -EINVAL; + + priv->base = devm_ioremap(dev, addr, SZ_4K); + if (!priv->base) + return -ENOMEM; + + priv->socdata = (void *)dev_get_driver_data(dev); + + return 0; +} + static int uniphier_clk_enable(struct clk *clk) { struct uniphier_clk_priv *priv = dev_get_priv(clk->dev); - struct uniphier_clk_gate_data *gate = priv->socdata->gate; + const struct uniphier_clk_gate_data *gate = priv->socdata->gate; unsigned int nr_gate = priv->socdata->nr_gate; void __iomem *reg; u32 mask, data, tmp; @@ -44,7 +73,7 @@ static int uniphier_clk_enable(struct clk *clk) static ulong uniphier_clk_get_rate(struct clk *clk) { struct uniphier_clk_priv *priv = dev_get_priv(clk->dev); - struct uniphier_clk_rate_data *rdata = priv->socdata->rate; + const struct uniphier_clk_rate_data *rdata = priv->socdata->rate; unsigned int nr_rdata = priv->socdata->nr_rate; void __iomem *reg; u32 mask, data; @@ -78,7 +107,7 @@ static ulong uniphier_clk_get_rate(struct clk *clk) static ulong uniphier_clk_set_rate(struct clk *clk, ulong rate) { struct uniphier_clk_priv *priv = dev_get_priv(clk->dev); - struct uniphier_clk_rate_data *rdata = priv->socdata->rate; + const struct uniphier_clk_rate_data *rdata = priv->socdata->rate; unsigned int nr_rdata = priv->socdata->nr_rate; void __iomem *reg; u32 mask, data, tmp; @@ -128,20 +157,47 @@ const struct clk_ops uniphier_clk_ops = { .set_rate = uniphier_clk_set_rate, }; -int uniphier_clk_probe(struct udevice *dev) -{ - struct uniphier_clk_priv *priv = dev_get_priv(dev); - fdt_addr_t addr; - - addr = dev_get_addr(dev); - if (addr == FDT_ADDR_T_NONE) - return -EINVAL; - - priv->base = devm_ioremap(dev, addr, SZ_4K); - if (!priv->base) - return -ENOMEM; - - priv->socdata = (void *)dev_get_driver_data(dev); +static const struct udevice_id uniphier_clk_match[] = { + { + .compatible = "socionext,uniphier-sld3-mio-clock", + .data = (ulong)&uniphier_mio_clk_data, + }, + { + .compatible = "socionext,uniphier-ld4-mio-clock", + .data = (ulong)&uniphier_mio_clk_data, + }, + { + .compatible = "socionext,uniphier-pro4-mio-clock", + .data = (ulong)&uniphier_mio_clk_data, + }, + { + .compatible = "socionext,uniphier-sld8-mio-clock", + .data = (ulong)&uniphier_mio_clk_data, + }, + { + .compatible = "socionext,uniphier-pro5-mio-clock", + .data = (ulong)&uniphier_mio_clk_data, + }, + { + .compatible = "socionext,uniphier-pxs2-mio-clock", + .data = (ulong)&uniphier_mio_clk_data, + }, + { + .compatible = "socionext,uniphier-ld11-mio-clock", + .data = (ulong)&uniphier_mio_clk_data, + }, + { + .compatible = "socionext,uniphier-ld20-mio-clock", + .data = (ulong)&uniphier_mio_clk_data, + }, + { /* sentinel */ } +}; - return 0; -} +U_BOOT_DRIVER(uniphier_clk) = { + .name = "uniphier-clk", + .id = UCLASS_CLK, + .of_match = uniphier_clk_match, + .probe = uniphier_clk_probe, + .priv_auto_alloc_size = sizeof(struct uniphier_clk_priv), + .ops = &uniphier_clk_ops, +}; diff --git a/drivers/clk/uniphier/clk-uniphier-mio.c b/drivers/clk/uniphier/clk-uniphier-mio.c index 2eea5eb..c1e7197 100644 --- a/drivers/clk/uniphier/clk-uniphier-mio.c +++ b/drivers/clk/uniphier/clk-uniphier-mio.c @@ -115,7 +115,7 @@ .data = 0x00020000, \ } -static struct uniphier_clk_gate_data uniphier_mio_clk_gate[] = { +static const struct uniphier_clk_gate_data uniphier_mio_clk_gate[] = { UNIPHIER_MIO_CLK_GATE_SD(0, 0), UNIPHIER_MIO_CLK_GATE_SD(1, 1), UNIPHIER_MIO_CLK_GATE_SD(2, 2), /* for PH1-Pro4 only */ @@ -126,60 +126,15 @@ static struct uniphier_clk_gate_data uniphier_mio_clk_gate[] = { UNIPHIER_MIO_CLK_GATE_USB(3, 7), /* for PH1-sLD3 only */ }; -static struct uniphier_clk_rate_data uniphier_mio_clk_rate[] = { +static const struct uniphier_clk_rate_data uniphier_mio_clk_rate[] = { UNIPHIER_MIO_CLK_RATE_SD(0, 0), UNIPHIER_MIO_CLK_RATE_SD(1, 1), UNIPHIER_MIO_CLK_RATE_SD(2, 2), /* for PH1-Pro4 only */ }; -static struct uniphier_clk_soc_data uniphier_mio_clk_data = { +const struct uniphier_clk_soc_data uniphier_mio_clk_data = { .gate = uniphier_mio_clk_gate, .nr_gate = ARRAY_SIZE(uniphier_mio_clk_gate), .rate = uniphier_mio_clk_rate, .nr_rate = ARRAY_SIZE(uniphier_mio_clk_rate), }; - -static const struct udevice_id uniphier_mio_clk_match[] = { - { - .compatible = "socionext,ph1-sld3-mioctrl", - .data = (ulong)&uniphier_mio_clk_data, - }, - { - .compatible = "socionext,ph1-ld4-mioctrl", - .data = (ulong)&uniphier_mio_clk_data, - }, - { - .compatible = "socionext,ph1-pro4-mioctrl", - .data = (ulong)&uniphier_mio_clk_data, - }, - { - .compatible = "socionext,ph1-sld8-mioctrl", - .data = (ulong)&uniphier_mio_clk_data, - }, - { - .compatible = "socionext,ph1-pro5-mioctrl", - .data = (ulong)&uniphier_mio_clk_data, - }, - { - .compatible = "socionext,proxstream2-mioctrl", - .data = (ulong)&uniphier_mio_clk_data, - }, - { - .compatible = "socionext,ph1-ld11-mioctrl", - .data = (ulong)&uniphier_mio_clk_data, - }, - { - .compatible = "socionext,ph1-ld20-mioctrl", - .data = (ulong)&uniphier_mio_clk_data, - }, - { /* sentinel */ } -}; - -U_BOOT_DRIVER(uniphier_mio_clk) = { - .name = "uniphier-mio-clk", - .id = UCLASS_CLK, - .of_match = uniphier_mio_clk_match, - .probe = uniphier_clk_probe, - .priv_auto_alloc_size = sizeof(struct uniphier_clk_priv), - .ops = &uniphier_clk_ops, -}; diff --git a/drivers/clk/uniphier/clk-uniphier.h b/drivers/clk/uniphier/clk-uniphier.h index 18aa888..0b60337 100644 --- a/drivers/clk/uniphier/clk-uniphier.h +++ b/drivers/clk/uniphier/clk-uniphier.h @@ -27,9 +27,9 @@ struct uniphier_clk_rate_data { }; struct uniphier_clk_soc_data { - struct uniphier_clk_gate_data *gate; + const struct uniphier_clk_gate_data *gate; unsigned int nr_gate; - struct uniphier_clk_rate_data *rate; + const struct uniphier_clk_rate_data *rate; unsigned int nr_rate; }; @@ -40,18 +40,6 @@ struct uniphier_clk_soc_data { .rate = f, \ } -/** - * struct uniphier_clk_priv - private data for UniPhier clock driver - * - * @base: base address of the clock provider - * @socdata: SoC specific data - */ -struct uniphier_clk_priv { - void __iomem *base; - struct uniphier_clk_soc_data *socdata; -}; - -extern const struct clk_ops uniphier_clk_ops; -int uniphier_clk_probe(struct udevice *dev); +extern const struct uniphier_clk_soc_data uniphier_mio_clk_data; #endif /* __CLK_UNIPHIER_H__ */ diff --git a/drivers/core/lists.c b/drivers/core/lists.c index 6a634e6..23b6ba7 100644 --- a/drivers/core/lists.c +++ b/drivers/core/lists.c @@ -101,36 +101,24 @@ int device_bind_driver_to_node(struct udevice *parent, const char *drv_name, #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) /** - * driver_check_compatible() - Check if a driver is compatible with this node + * driver_check_compatible() - Check if a driver matches a compatible string * - * @param blob: Device tree pointer - * @param offset: Offset of node in device tree * @param of_match: List of compatible strings to match * @param of_idp: Returns the match that was found - * @return 0 if there is a match, -ENOENT if no match, -ENODEV if the node - * does not have a compatible string, other error <0 if there is a device - * tree error + * @param compat: The compatible string to search for + * @return 0 if there is a match, -ENOENT if no match */ -static int driver_check_compatible(const void *blob, int offset, - const struct udevice_id *of_match, - const struct udevice_id **of_idp) +static int driver_check_compatible(const struct udevice_id *of_match, + const struct udevice_id **of_idp, + const char *compat) { - int ret; - - *of_idp = NULL; if (!of_match) return -ENOENT; while (of_match->compatible) { - ret = fdt_node_check_compatible(blob, offset, - of_match->compatible); - if (!ret) { + if (!strcmp(of_match->compatible, compat)) { *of_idp = of_match; return 0; - } else if (ret == -FDT_ERR_NOTFOUND) { - return -ENODEV; - } else if (ret < 0) { - return -EINVAL; } of_match++; } @@ -147,28 +135,46 @@ int lists_bind_fdt(struct udevice *parent, const void *blob, int offset, struct driver *entry; struct udevice *dev; bool found = false; - const char *name; + const char *name, *compat_list, *compat; + int compat_length, i; int result = 0; int ret = 0; - dm_dbg("bind node %s\n", fdt_get_name(blob, offset, NULL)); + name = fdt_get_name(blob, offset, NULL); + dm_dbg("bind node %s\n", name); if (devp) *devp = NULL; - for (entry = driver; entry != driver + n_ents; entry++) { - ret = driver_check_compatible(blob, offset, entry->of_match, - &id); - name = fdt_get_name(blob, offset, NULL); - if (ret == -ENOENT) { - continue; - } else if (ret == -ENODEV) { + + compat_list = fdt_getprop(blob, offset, "compatible", &compat_length); + if (!compat_list) { + if (compat_length == -FDT_ERR_NOTFOUND) { dm_dbg("Device '%s' has no compatible string\n", name); - break; - } else if (ret) { - dm_warn("Device tree error at offset %d\n", offset); - result = ret; - break; + return 0; } + dm_warn("Device tree error at offset %d\n", offset); + return compat_length; + } + + /* + * Walk through the compatible string list, attempting to match each + * compatible string in order such that we match in order of priority + * from the first string to the last. + */ + for (i = 0; i < compat_length; i += strlen(compat) + 1) { + compat = compat_list + i; + dm_dbg(" - attempt to match compatible string '%s'\n", + compat); + + for (entry = driver; entry != driver + n_ents; entry++) { + ret = driver_check_compatible(entry->of_match, &id, + compat); + if (!ret) + break; + } + if (entry == driver + n_ents) + continue; + dm_dbg(" - found match at '%s'\n", entry->name); ret = device_bind_with_driver_data(parent, entry, name, id->data, offset, &dev); @@ -188,10 +194,8 @@ int lists_bind_fdt(struct udevice *parent, const void *blob, int offset, break; } - if (!found && !result && ret != -ENODEV) { - dm_dbg("No match for node '%s'\n", - fdt_get_name(blob, offset, NULL)); - } + if (!found && !result && ret != -ENODEV) + dm_dbg("No match for node '%s'\n", name); return result; } diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c index 0299ff0..c68bcba 100644 --- a/drivers/core/regmap.c +++ b/drivers/core/regmap.c @@ -13,6 +13,8 @@ #include <mapmem.h> #include <regmap.h> +#include <asm/io.h> + DECLARE_GLOBAL_DATA_PTR; static struct regmap *regmap_alloc_count(int count) @@ -117,3 +119,21 @@ int regmap_uninit(struct regmap *map) return 0; } + +int regmap_read(struct regmap *map, uint offset, uint *valp) +{ + uint32_t *ptr = map_physmem(map->base + offset, 4, MAP_NOCACHE); + + *valp = le32_to_cpu(readl(ptr)); + + return 0; +} + +int regmap_write(struct regmap *map, uint offset, uint val) +{ + uint32_t *ptr = map_physmem(map->base + offset, 4, MAP_NOCACHE); + + writel(cpu_to_le32(val), ptr); + + return 0; +} diff --git a/drivers/core/syscon-uclass.c b/drivers/core/syscon-uclass.c index 01bd968..2148469 100644 --- a/drivers/core/syscon-uclass.c +++ b/drivers/core/syscon-uclass.c @@ -95,3 +95,14 @@ UCLASS_DRIVER(syscon) = { .per_device_auto_alloc_size = sizeof(struct syscon_uc_info), .pre_probe = syscon_pre_probe, }; + +static const struct udevice_id generic_syscon_ids[] = { + { .compatible = "syscon" }, + { } +}; + +U_BOOT_DRIVER(generic_syscon) = { + .name = "syscon", + .id = UCLASS_SYSCON, + .of_match = generic_syscon_ids, +}; diff --git a/drivers/crypto/ace_sha.c b/drivers/crypto/ace_sha.c index efef491..8f3b8b2 100644 --- a/drivers/crypto/ace_sha.c +++ b/drivers/crypto/ace_sha.c @@ -10,7 +10,7 @@ #ifdef CONFIG_SHA_HW_ACCEL #include <u-boot/sha256.h> #include <u-boot/sha1.h> -#include <asm/errno.h> +#include <linux/errno.h> /* SHA1 value for the message of zero length */ static const unsigned char sha1_digest_emptymsg[SHA1_SUM_LEN] = { diff --git a/drivers/crypto/fsl/fsl_blob.c b/drivers/crypto/fsl/fsl_blob.c index d24b8fc..38c6f94 100644 --- a/drivers/crypto/fsl/fsl_blob.c +++ b/drivers/crypto/fsl/fsl_blob.c @@ -8,7 +8,7 @@ #include <common.h> #include <malloc.h> #include <fsl_sec.h> -#include <asm-generic/errno.h> +#include <linux/errno.h> #include "jobdesc.h" #include "desc.h" #include "jr.h" diff --git a/drivers/crypto/fsl/fsl_hash.c b/drivers/crypto/fsl/fsl_hash.c index 887e88c..a63eba3 100644 --- a/drivers/crypto/fsl/fsl_hash.c +++ b/drivers/crypto/fsl/fsl_hash.c @@ -12,7 +12,7 @@ #include "jr.h" #include "fsl_hash.h" #include <hw_sha.h> -#include <asm-generic/errno.h> +#include <linux/errno.h> #define CRYPTO_MAX_ALG_NAME 80 #define SHA1_DIGEST_SIZE 20 diff --git a/drivers/ddr/fsl/ddr1_dimm_params.c b/drivers/ddr/fsl/ddr1_dimm_params.c index 00cdc22..369b325 100644 --- a/drivers/ddr/fsl/ddr1_dimm_params.c +++ b/drivers/ddr/fsl/ddr1_dimm_params.c @@ -108,22 +108,14 @@ static unsigned int byte40_table_ps[8] = { static unsigned int compute_trfc_ps_from_spd(unsigned char trctrfc_ext, unsigned char trfc) { - unsigned int trfc_ps; - - trfc_ps = (((trctrfc_ext & 0x1) * 256) + trfc) * 1000 + return ((trctrfc_ext & 0x1) * 256 + trfc) * 1000 + byte40_table_ps[(trctrfc_ext >> 1) & 0x7]; - - return trfc_ps; } static unsigned int compute_trc_ps_from_spd(unsigned char trctrfc_ext, unsigned char trc) { - unsigned int trc_ps; - - trc_ps = trc * 1000 + byte40_table_ps[(trctrfc_ext >> 4) & 0x7]; - - return trc_ps; + return trc * 1000 + byte40_table_ps[(trctrfc_ext >> 4) & 0x7]; } /* diff --git a/drivers/ddr/fsl/ddr2_dimm_params.c b/drivers/ddr/fsl/ddr2_dimm_params.c index 59baf6b..af752cc 100644 --- a/drivers/ddr/fsl/ddr2_dimm_params.c +++ b/drivers/ddr/fsl/ddr2_dimm_params.c @@ -107,22 +107,14 @@ static unsigned int byte40_table_ps[8] = { static unsigned int compute_trfc_ps_from_spd(unsigned char trctrfc_ext, unsigned char trfc) { - unsigned int trfc_ps; - - trfc_ps = (((trctrfc_ext & 0x1) * 256) + trfc) * 1000 + return (((trctrfc_ext & 0x1) * 256) + trfc) * 1000 + byte40_table_ps[(trctrfc_ext >> 1) & 0x7]; - - return trfc_ps; } static unsigned int compute_trc_ps_from_spd(unsigned char trctrfc_ext, unsigned char trc) { - unsigned int trc_ps; - - trc_ps = trc * 1000 + byte40_table_ps[(trctrfc_ext >> 4) & 0x7]; - - return trc_ps; + return trc * 1000 + byte40_table_ps[(trctrfc_ext >> 4) & 0x7]; } /* diff --git a/drivers/ddr/marvell/a38x/ddr3_a38x.c b/drivers/ddr/marvell/a38x/ddr3_a38x.c index f469907..c082122 100644 --- a/drivers/ddr/marvell/a38x/ddr3_a38x.c +++ b/drivers/ddr/marvell/a38x/ddr3_a38x.c @@ -706,11 +706,7 @@ int ddr3_tip_ext_write(u32 dev_num, u32 if_id, u32 reg_addr, int ddr3_silicon_pre_init(void) { - int result; - - result = ddr3_silicon_init(); - - return result; + return ddr3_silicon_init(); } int ddr3_post_run_alg(void) diff --git a/drivers/dma/apbh_dma.c b/drivers/dma/apbh_dma.c index a6dc935..a97fa85 100644 --- a/drivers/dma/apbh_dma.c +++ b/drivers/dma/apbh_dma.c @@ -14,7 +14,7 @@ #include <common.h> #include <malloc.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/io.h> #include <asm/arch/clock.h> #include <asm/arch/imx-regs.h> diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig new file mode 100644 index 0000000..f3f6bf7 --- /dev/null +++ b/drivers/fpga/Kconfig @@ -0,0 +1,20 @@ +menu "FPGA support" + +config FPGA + bool + +config FPGA_XILINX + bool "Enable Xilinx FPGA drivers" + select FPGA + help + Enable Xilinx FPGA specific functions which includes bitstream + (in BIT format), fpga and device validation. + +config FPGA_ZYNQMPPL + bool "Enable Xilinx FPGA driver for ZynqMP" + depends on FPGA_XILINX + help + Enable FPGA driver for loading bitstream in BIT and BIN format + on Xilinx Zynq UltraScale+ (ZynqMP) device. + +endmenu diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile index fec3fec..777706f 100644 --- a/drivers/fpga/Makefile +++ b/drivers/fpga/Makefile @@ -10,6 +10,7 @@ obj-$(CONFIG_FPGA_SPARTAN2) += spartan2.o obj-$(CONFIG_FPGA_SPARTAN3) += spartan3.o obj-$(CONFIG_FPGA_VIRTEX2) += virtex2.o obj-$(CONFIG_FPGA_ZYNQPL) += zynqpl.o +obj-$(CONFIG_FPGA_ZYNQMPPL) += zynqmppl.o obj-$(CONFIG_FPGA_XILINX) += xilinx.o obj-$(CONFIG_FPGA_LATTICE) += ivm_core.o lattice.o ifdef CONFIG_FPGA_ALTERA diff --git a/drivers/fpga/socfpga.c b/drivers/fpga/socfpga.c index 4448250..f1b2f2c 100644 --- a/drivers/fpga/socfpga.c +++ b/drivers/fpga/socfpga.c @@ -7,7 +7,7 @@ #include <common.h> #include <asm/io.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/arch/fpga_manager.h> #include <asm/arch/reset_manager.h> #include <asm/arch/system_manager.h> diff --git a/drivers/fpga/stratixv.c b/drivers/fpga/stratixv.c index cc035eb..9a81aca 100644 --- a/drivers/fpga/stratixv.c +++ b/drivers/fpga/stratixv.c @@ -8,7 +8,7 @@ #include <altera.h> #include <spi.h> #include <asm/io.h> -#include <asm/errno.h> +#include <linux/errno.h> /* Write the RBF data to FPGA via SPI */ static int program_write(int spi_bus, int spi_dev, const void *rbf_data, diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c index d459a2f..2cd0104 100644 --- a/drivers/fpga/xilinx.c +++ b/drivers/fpga/xilinx.c @@ -199,6 +199,9 @@ int xilinx_info(xilinx_desc *desc) case xilinx_zynq: printf("Zynq PL\n"); break; + case xilinx_zynqmp: + printf("ZynqMP PL\n"); + break; /* Add new family types here */ default: printf ("Unknown family type, %d\n", desc->family); @@ -227,6 +230,9 @@ int xilinx_info(xilinx_desc *desc) case devcfg: printf("Device configuration interface (Zynq)\n"); break; + case csu_dma: + printf("csu_dma configuration interface (ZynqMP)\n"); + break; /* Add new interface types here */ default: printf ("Unsupported interface type, %d\n", desc->iface); diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c new file mode 100644 index 0000000..23039c3 --- /dev/null +++ b/drivers/fpga/zynqmppl.c @@ -0,0 +1,238 @@ +/* + * (C) Copyright 2015 - 2016, Xilinx, Inc, + * Michal Simek <michal.simek@xilinx.com> + * Siva Durga Prasad <siva.durga.paladugu@xilinx.com> + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#include <console.h> +#include <common.h> +#include <zynqmppl.h> +#include <linux/sizes.h> + +#define DUMMY_WORD 0xffffffff + +/* Xilinx binary format header */ +static const u32 bin_format[] = { + DUMMY_WORD, /* Dummy words */ + DUMMY_WORD, + DUMMY_WORD, + DUMMY_WORD, + DUMMY_WORD, + DUMMY_WORD, + DUMMY_WORD, + DUMMY_WORD, + DUMMY_WORD, + DUMMY_WORD, + DUMMY_WORD, + DUMMY_WORD, + DUMMY_WORD, + DUMMY_WORD, + DUMMY_WORD, + DUMMY_WORD, + 0x000000bb, /* Sync word */ + 0x11220044, /* Sync word */ + DUMMY_WORD, + DUMMY_WORD, + 0xaa995566, /* Sync word */ +}; + +#define SWAP_NO 1 +#define SWAP_DONE 2 + +/* + * Load the whole word from unaligned buffer + * Keep in your mind that it is byte loading on little-endian system + */ +static u32 load_word(const void *buf, u32 swap) +{ + u32 word = 0; + u8 *bitc = (u8 *)buf; + int p; + + if (swap == SWAP_NO) { + for (p = 0; p < 4; p++) { + word <<= 8; + word |= bitc[p]; + } + } else { + for (p = 3; p >= 0; p--) { + word <<= 8; + word |= bitc[p]; + } + } + + return word; +} + +static u32 check_header(const void *buf) +{ + u32 i, pattern; + int swap = SWAP_NO; + u32 *test = (u32 *)buf; + + debug("%s: Let's check bitstream header\n", __func__); + + /* Checking that passing bin is not a bitstream */ + for (i = 0; i < ARRAY_SIZE(bin_format); i++) { + pattern = load_word(&test[i], swap); + + /* + * Bitstreams in binary format are swapped + * compare to regular bistream. + * Do not swap dummy word but if swap is done assume + * that parsing buffer is binary format + */ + if ((__swab32(pattern) != DUMMY_WORD) && + (__swab32(pattern) == bin_format[i])) { + swap = SWAP_DONE; + debug("%s: data swapped - let's swap\n", __func__); + } + + debug("%s: %d/%px: pattern %x/%x bin_format\n", __func__, i, + &test[i], pattern, bin_format[i]); + } + debug("%s: Found bitstream header at %px %s swapinng\n", __func__, + buf, swap == SWAP_NO ? "without" : "with"); + + return swap; +} + +static void *check_data(u8 *buf, size_t bsize, u32 *swap) +{ + u32 word, p = 0; /* possition */ + + /* Because buf doesn't need to be aligned let's read it by chars */ + for (p = 0; p < bsize; p++) { + word = load_word(&buf[p], SWAP_NO); + debug("%s: word %x %x/%px\n", __func__, word, p, &buf[p]); + + /* Find the first bitstream dummy word */ + if (word == DUMMY_WORD) { + debug("%s: Found dummy word at position %x/%px\n", + __func__, p, &buf[p]); + *swap = check_header(&buf[p]); + if (*swap) { + /* FIXME add full bitstream checking here */ + return &buf[p]; + } + } + /* Loop can be huge - support CTRL + C */ + if (ctrlc()) + return NULL; + } + return NULL; +} + +static ulong zynqmp_align_dma_buffer(u32 *buf, u32 len, u32 swap) +{ + u32 *new_buf; + u32 i; + + if ((ulong)buf != ALIGN((ulong)buf, ARCH_DMA_MINALIGN)) { + new_buf = (u32 *)ALIGN((ulong)buf, ARCH_DMA_MINALIGN); + + /* + * This might be dangerous but permits to flash if + * ARCH_DMA_MINALIGN is greater than header size + */ + if (new_buf > (u32 *)buf) { + debug("%s: Aligned buffer is after buffer start\n", + __func__); + new_buf -= ARCH_DMA_MINALIGN; + } + printf("%s: Align buffer at %px to %px(swap %d)\n", __func__, + buf, new_buf, swap); + + for (i = 0; i < (len/4); i++) + new_buf[i] = load_word(&buf[i], swap); + + buf = new_buf; + } else if (swap != SWAP_DONE) { + /* For bitstream which are aligned */ + u32 *new_buf = (u32 *)buf; + + printf("%s: Bitstream is not swapped(%d) - swap it\n", __func__, + swap); + + for (i = 0; i < (len/4); i++) + new_buf[i] = load_word(&buf[i], swap); + } + + return (ulong)buf; +} + +static int zynqmp_validate_bitstream(xilinx_desc *desc, const void *buf, + size_t bsize, u32 blocksize, u32 *swap) +{ + ulong *buf_start; + ulong diff; + + buf_start = check_data((u8 *)buf, blocksize, swap); + + if (!buf_start) + return FPGA_FAIL; + + /* Check if data is postpone from start */ + diff = (ulong)buf_start - (ulong)buf; + if (diff) { + printf("%s: Bitstream is not validated yet (diff %lx)\n", + __func__, diff); + return FPGA_FAIL; + } + + if ((ulong)buf < SZ_1M) { + printf("%s: Bitstream has to be placed up to 1MB (%px)\n", + __func__, buf); + return FPGA_FAIL; + } + + return 0; +} + +static int invoke_smc(ulong id, ulong reg0, ulong reg1, ulong reg2) +{ + struct pt_regs regs; + regs.regs[0] = id; + regs.regs[1] = reg0; + regs.regs[2] = reg1; + regs.regs[3] = reg2; + + smc_call(®s); + + return regs.regs[0]; +} + +static int zynqmp_load(xilinx_desc *desc, const void *buf, size_t bsize, + bitstream_type bstype) +{ + u32 swap; + ulong bin_buf, flags; + int ret; + + if (zynqmp_validate_bitstream(desc, buf, bsize, bsize, &swap)) + return FPGA_FAIL; + + bin_buf = zynqmp_align_dma_buffer((u32 *)buf, bsize, swap); + + debug("%s called!\n", __func__); + flush_dcache_range(bin_buf, bin_buf + bsize); + + if (bsize % 4) + bsize = bsize / 4 + 1; + else + bsize = bsize / 4; + + flags = (u32)bsize | ((u64)bstype << 32); + + ret = invoke_smc(ZYNQMP_SIP_SVC_PM_FPGA_LOAD, bin_buf, flags, 0); + if (ret) + debug("PL FPGA LOAD fail\n"); + + return ret; +} + +struct xilinx_fpga_op zynqmp_op = { + .load = zynqmp_load, +}; diff --git a/drivers/gpio/adi_gpio2.c b/drivers/gpio/adi_gpio2.c index 88cd65b..4db08a3 100644 --- a/drivers/gpio/adi_gpio2.c +++ b/drivers/gpio/adi_gpio2.c @@ -8,7 +8,7 @@ */ #include <common.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/gpio.h> #define RESOURCE_LABEL_SIZE 16 diff --git a/drivers/gpio/gpio-uniphier.c b/drivers/gpio/gpio-uniphier.c index afb27a3..ad11764 100644 --- a/drivers/gpio/gpio-uniphier.c +++ b/drivers/gpio/gpio-uniphier.c @@ -10,7 +10,7 @@ #include <linux/bitops.h> #include <linux/io.h> #include <linux/sizes.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/gpio.h> #define UNIPHIER_GPIO_PORTS_PER_BANK 8 diff --git a/drivers/gpio/mvgpio.c b/drivers/gpio/mvgpio.c index 888aa07..8bfbc3a 100644 --- a/drivers/gpio/mvgpio.c +++ b/drivers/gpio/mvgpio.c @@ -11,7 +11,7 @@ #include <common.h> #include <asm/io.h> -#include <asm/errno.h> +#include <linux/errno.h> #include "mvgpio.h" #include <asm/gpio.h> diff --git a/drivers/gpio/mxs_gpio.c b/drivers/gpio/mxs_gpio.c index c25b4c1..367b852 100644 --- a/drivers/gpio/mxs_gpio.c +++ b/drivers/gpio/mxs_gpio.c @@ -8,7 +8,7 @@ */ #include <common.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/io.h> #include <asm/arch/iomux.h> #include <asm/arch/imx-regs.h> diff --git a/drivers/gpio/omap_gpio.c b/drivers/gpio/omap_gpio.c index cd960dc..f906b97 100644 --- a/drivers/gpio/omap_gpio.c +++ b/drivers/gpio/omap_gpio.c @@ -23,7 +23,7 @@ #include <fdtdec.h> #include <asm/gpio.h> #include <asm/io.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <malloc.h> DECLARE_GLOBAL_DATA_PTR; diff --git a/drivers/gpio/pca9698.c b/drivers/gpio/pca9698.c index 3152bf6..d2663f7 100644 --- a/drivers/gpio/pca9698.c +++ b/drivers/gpio/pca9698.c @@ -11,7 +11,7 @@ #include <common.h> #include <i2c.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <pca9698.h> /* diff --git a/drivers/gpio/rk_gpio.c b/drivers/gpio/rk_gpio.c index 64abcba..5dbd228 100644 --- a/drivers/gpio/rk_gpio.c +++ b/drivers/gpio/rk_gpio.c @@ -10,7 +10,7 @@ #include <common.h> #include <dm.h> #include <syscon.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/gpio.h> #include <asm/io.h> #include <asm/arch/clock.h> diff --git a/drivers/gpio/stm32_gpio.c b/drivers/gpio/stm32_gpio.c index 50f86d3..ff245db 100644 --- a/drivers/gpio/stm32_gpio.c +++ b/drivers/gpio/stm32_gpio.c @@ -13,7 +13,7 @@ #include <common.h> #include <asm/io.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/arch/stm32.h> #include <asm/arch/gpio.h> diff --git a/drivers/gpio/zynq_gpio.c b/drivers/gpio/zynq_gpio.c index 4ab2356..8a448c9 100644 --- a/drivers/gpio/zynq_gpio.c +++ b/drivers/gpio/zynq_gpio.c @@ -12,7 +12,7 @@ #include <common.h> #include <asm/gpio.h> #include <asm/io.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <dm.h> #include <fdtdec.h> diff --git a/drivers/i2c/at91_i2c.c b/drivers/i2c/at91_i2c.c index 8e9c3ad..d71f75c 100644 --- a/drivers/i2c/at91_i2c.c +++ b/drivers/i2c/at91_i2c.c @@ -8,7 +8,7 @@ #include <asm/io.h> #include <common.h> -#include <clk_client.h> +#include <clk.h> #include <dm.h> #include <errno.h> #include <fdtdec.h> diff --git a/drivers/i2c/i2c-cdns.c b/drivers/i2c/i2c-cdns.c index 5642cd9..f49f60b 100644 --- a/drivers/i2c/i2c-cdns.c +++ b/drivers/i2c/i2c-cdns.c @@ -11,7 +11,7 @@ #include <common.h> #include <linux/types.h> #include <linux/io.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <dm/device.h> #include <dm/root.h> #include <i2c.h> diff --git a/drivers/i2c/i2c-uniphier-f.c b/drivers/i2c/i2c-uniphier-f.c index a56e058..8bfa916 100644 --- a/drivers/i2c/i2c-uniphier-f.c +++ b/drivers/i2c/i2c-uniphier-f.c @@ -10,7 +10,7 @@ #include <linux/types.h> #include <linux/io.h> #include <linux/sizes.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <dm/device.h> #include <dm/root.h> #include <i2c.h> diff --git a/drivers/i2c/i2c-uniphier.c b/drivers/i2c/i2c-uniphier.c index 39a3ebd..f391f11 100644 --- a/drivers/i2c/i2c-uniphier.c +++ b/drivers/i2c/i2c-uniphier.c @@ -10,7 +10,7 @@ #include <linux/types.h> #include <linux/io.h> #include <linux/sizes.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <dm/device.h> #include <dm/root.h> #include <i2c.h> diff --git a/drivers/i2c/kona_i2c.c b/drivers/i2c/kona_i2c.c index 11f29d9..1228ef3 100644 --- a/drivers/i2c/kona_i2c.c +++ b/drivers/i2c/kona_i2c.c @@ -6,7 +6,7 @@ #include <common.h> #include <asm/io.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/arch/sysmap.h> #include <asm/kona-common/clk.h> #include <i2c.h> diff --git a/drivers/i2c/lpc32xx_i2c.c b/drivers/i2c/lpc32xx_i2c.c index 47163cc..3e842e7 100644 --- a/drivers/i2c/lpc32xx_i2c.c +++ b/drivers/i2c/lpc32xx_i2c.c @@ -10,7 +10,7 @@ #include <common.h> #include <asm/io.h> #include <i2c.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/arch/clk.h> /* diff --git a/drivers/i2c/mv_i2c.c b/drivers/i2c/mv_i2c.c index fc02e65..7f52fa2 100644 --- a/drivers/i2c/mv_i2c.c +++ b/drivers/i2c/mv_i2c.c @@ -18,18 +18,11 @@ */ #include <common.h> -#include <asm/io.h> - -#ifdef CONFIG_HARD_I2C +#include <dm.h> #include <i2c.h> +#include <asm/io.h> #include "mv_i2c.h" -#ifdef DEBUG_I2C -#define PRINTD(x) printf x -#else -#define PRINTD(x) -#endif - /* All transfers are described by this data structure */ struct mv_i2c_msg { u8 condition; @@ -38,6 +31,16 @@ struct mv_i2c_msg { u8 data; }; +#ifdef CONFIG_ARMADA_3700 +/* Armada 3700 has no padding between the registers */ +struct mv_i2c { + u32 ibmr; + u32 idbr; + u32 icr; + u32 isr; + u32 isar; +}; +#else struct mv_i2c { u32 ibmr; u32 pad0; @@ -49,64 +52,26 @@ struct mv_i2c { u32 pad3; u32 isar; }; - -static struct mv_i2c *base; -static void i2c_board_init(struct mv_i2c *base) -{ -#ifdef CONFIG_SYS_I2C_INIT_BOARD - u32 icr; - /* - * call board specific i2c bus reset routine before accessing the - * environment, which might be in a chip on that bus. For details - * about this problem see doc/I2C_Edge_Conditions. - * - * disable I2C controller first, otherwhise it thinks we want to - * talk to the slave port... - */ - icr = readl(&base->icr); - writel(readl(&base->icr) & ~(ICR_SCLE | ICR_IUE), &base->icr); - - i2c_init_board(); - - writel(icr, &base->icr); #endif -} - -#ifdef CONFIG_I2C_MULTI_BUS -static unsigned long i2c_regs[CONFIG_MV_I2C_NUM] = CONFIG_MV_I2C_REG; -static unsigned int bus_initialized[CONFIG_MV_I2C_NUM]; -static unsigned int current_bus; - -int i2c_set_bus_num(unsigned int bus) -{ - if ((bus < 0) || (bus >= CONFIG_MV_I2C_NUM)) { - printf("Bad bus: %d\n", bus); - return -1; - } - base = (struct mv_i2c *)i2c_regs[bus]; - current_bus = bus; - - if (!bus_initialized[current_bus]) { - i2c_board_init(base); - bus_initialized[current_bus] = 1; - } - - return 0; -} - -unsigned int i2c_get_bus_num(void) +/* + * Dummy implementation that can be overwritten by a board + * specific function + */ +__weak void i2c_clk_enable(void) { - return current_bus; } -#endif /* * i2c_reset: - reset the host controller * */ -static void i2c_reset(void) +static void i2c_reset(struct mv_i2c *base) { + u32 icr_mode; + + /* Save bus mode (standard or fast speed) for later use */ + icr_mode = readl(&base->icr) & ICR_MODE_MASK; writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */ writel(readl(&base->icr) | ICR_UR, &base->icr); /* reset the unit */ udelay(100); @@ -115,7 +80,8 @@ static void i2c_reset(void) i2c_clk_enable(); writel(CONFIG_SYS_I2C_SLAVE, &base->isar); /* set our slave address */ - writel(I2C_ICR_INIT, &base->icr); /* set control reg values */ + /* set control reg values */ + writel(I2C_ICR_INIT | icr_mode, &base->icr); writel(I2C_ISR_INIT, &base->isr); /* set clear interrupt bits */ writel(readl(&base->icr) | ICR_IUE, &base->icr); /* enable unit */ udelay(100); @@ -127,7 +93,7 @@ static void i2c_reset(void) * * @return: 1 in case of success, 0 means timeout (no match within 10 ms). */ -static int i2c_isr_set_cleared(unsigned long set_mask, +static int i2c_isr_set_cleared(struct mv_i2c *base, unsigned long set_mask, unsigned long cleared_mask) { int timeout = 1000, isr; @@ -157,7 +123,7 @@ static int i2c_isr_set_cleared(unsigned long set_mask, * -5: illegal parameters * -6: bus is busy and couldn't be aquired */ -int i2c_transfer(struct mv_i2c_msg *msg) +static int i2c_transfer(struct mv_i2c *base, struct mv_i2c_msg *msg) { int ret; @@ -167,7 +133,7 @@ int i2c_transfer(struct mv_i2c_msg *msg) switch (msg->direction) { case I2C_WRITE: /* check if bus is not busy */ - if (!i2c_isr_set_cleared(0, ISR_IBB)) + if (!i2c_isr_set_cleared(base, 0, ISR_IBB)) goto transfer_error_bus_busy; /* start transmission */ @@ -186,7 +152,7 @@ int i2c_transfer(struct mv_i2c_msg *msg) writel(readl(&base->icr) | ICR_TB, &base->icr); /* transmit register empty? */ - if (!i2c_isr_set_cleared(ISR_ITE, 0)) + if (!i2c_isr_set_cleared(base, ISR_ITE, 0)) goto transfer_error_transmit_timeout; /* clear 'transmit empty' state */ @@ -194,14 +160,14 @@ int i2c_transfer(struct mv_i2c_msg *msg) /* wait for ACK from slave */ if (msg->acknack == I2C_ACKNAK_WAITACK) - if (!i2c_isr_set_cleared(0, ISR_ACKNAK)) + if (!i2c_isr_set_cleared(base, 0, ISR_ACKNAK)) goto transfer_error_ack_missing; break; case I2C_READ: /* check if bus is not busy */ - if (!i2c_isr_set_cleared(0, ISR_IBB)) + if (!i2c_isr_set_cleared(base, 0, ISR_IBB)) goto transfer_error_bus_busy; /* start receive */ @@ -219,7 +185,7 @@ int i2c_transfer(struct mv_i2c_msg *msg) writel(readl(&base->icr) | ICR_TB, &base->icr); /* receive register full? */ - if (!i2c_isr_set_cleared(ISR_IRF, 0)) + if (!i2c_isr_set_cleared(base, ISR_IRF, 0)) goto transfer_error_receive_timeout; msg->data = readl(&base->idbr); @@ -234,139 +200,89 @@ int i2c_transfer(struct mv_i2c_msg *msg) return 0; transfer_error_msg_empty: - PRINTD(("i2c_transfer: error: 'msg' is empty\n")); - ret = -1; goto i2c_transfer_finish; + debug("i2c_transfer: error: 'msg' is empty\n"); + ret = -1; + goto i2c_transfer_finish; transfer_error_transmit_timeout: - PRINTD(("i2c_transfer: error: transmit timeout\n")); - ret = -2; goto i2c_transfer_finish; + debug("i2c_transfer: error: transmit timeout\n"); + ret = -2; + goto i2c_transfer_finish; transfer_error_ack_missing: - PRINTD(("i2c_transfer: error: ACK missing\n")); - ret = -3; goto i2c_transfer_finish; + debug("i2c_transfer: error: ACK missing\n"); + ret = -3; + goto i2c_transfer_finish; transfer_error_receive_timeout: - PRINTD(("i2c_transfer: error: receive timeout\n")); - ret = -4; goto i2c_transfer_finish; + debug("i2c_transfer: error: receive timeout\n"); + ret = -4; + goto i2c_transfer_finish; transfer_error_illegal_param: - PRINTD(("i2c_transfer: error: illegal parameters\n")); - ret = -5; goto i2c_transfer_finish; + debug("i2c_transfer: error: illegal parameters\n"); + ret = -5; + goto i2c_transfer_finish; transfer_error_bus_busy: - PRINTD(("i2c_transfer: error: bus is busy\n")); - ret = -6; goto i2c_transfer_finish; + debug("i2c_transfer: error: bus is busy\n"); + ret = -6; + goto i2c_transfer_finish; i2c_transfer_finish: - PRINTD(("i2c_transfer: ISR: 0x%04x\n", readl(&base->isr))); - i2c_reset(); - return ret; + debug("i2c_transfer: ISR: 0x%04x\n", readl(&base->isr)); + i2c_reset(base); + return ret; } -/* ------------------------------------------------------------------------ */ -/* API Functions */ -/* ------------------------------------------------------------------------ */ -void i2c_init(int speed, int slaveaddr) -{ -#ifdef CONFIG_I2C_MULTI_BUS - current_bus = 0; - base = (struct mv_i2c *)i2c_regs[current_bus]; -#else - base = (struct mv_i2c *)CONFIG_MV_I2C_REG; -#endif - - i2c_board_init(base); -} - -/* - * i2c_probe: - Test if a chip answers for a given i2c address - * - * @chip: address of the chip which is searched for - * @return: 0 if a chip was found, -1 otherwhise - */ -int i2c_probe(uchar chip) +static int __i2c_read(struct mv_i2c *base, uchar chip, u8 *addr, int alen, + uchar *buffer, int len) { struct mv_i2c_msg msg; - i2c_reset(); - - msg.condition = I2C_COND_START; - msg.acknack = I2C_ACKNAK_WAITACK; - msg.direction = I2C_WRITE; - msg.data = (chip << 1) + 1; - if (i2c_transfer(&msg)) - return -1; + debug("i2c_read(chip=0x%02x, addr=0x%02x, alen=0x%02x, " + "len=0x%02x)\n", chip, *addr, alen, len); - msg.condition = I2C_COND_STOP; - msg.acknack = I2C_ACKNAK_SENDNAK; - msg.direction = I2C_READ; - msg.data = 0x00; - if (i2c_transfer(&msg)) - return -1; - - return 0; -} - -/* - * i2c_read: - Read multiple bytes from an i2c device - * - * The higher level routines take into account that this function is only - * called with len < page length of the device (see configuration file) - * - * @chip: address of the chip which is to be read - * @addr: i2c data address within the chip - * @alen: length of the i2c data address (1..2 bytes) - * @buffer: where to write the data - * @len: how much byte do we want to read - * @return: 0 in case of success - */ -int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) -{ - struct mv_i2c_msg msg; - u8 addr_bytes[3]; /* lowest...highest byte of data address */ - - PRINTD(("i2c_read(chip=0x%02x, addr=0x%02x, alen=0x%02x, " - "len=0x%02x)\n", chip, addr, alen, len)); + if (len == 0) { + printf("reading zero byte is invalid\n"); + return -EINVAL; + } - i2c_reset(); + i2c_reset(base); /* dummy chip address write */ - PRINTD(("i2c_read: dummy chip address write\n")); + debug("i2c_read: dummy chip address write\n"); msg.condition = I2C_COND_START; msg.acknack = I2C_ACKNAK_WAITACK; msg.direction = I2C_WRITE; msg.data = (chip << 1); msg.data &= 0xFE; - if (i2c_transfer(&msg)) + if (i2c_transfer(base, &msg)) return -1; /* * send memory address bytes; * alen defines how much bytes we have to send. */ - /*addr &= ((1 << CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)-1); */ - addr_bytes[0] = (u8)((addr >> 0) & 0x000000FF); - addr_bytes[1] = (u8)((addr >> 8) & 0x000000FF); - addr_bytes[2] = (u8)((addr >> 16) & 0x000000FF); - while (--alen >= 0) { - PRINTD(("i2c_read: send memory word address byte %1d\n", alen)); + debug("i2c_read: send address byte %02x (alen=%d)\n", + *addr, alen); msg.condition = I2C_COND_NORMAL; msg.acknack = I2C_ACKNAK_WAITACK; msg.direction = I2C_WRITE; - msg.data = addr_bytes[alen]; - if (i2c_transfer(&msg)) + msg.data = *(addr++); + if (i2c_transfer(base, &msg)) return -1; } /* start read sequence */ - PRINTD(("i2c_read: start read sequence\n")); + debug("i2c_read: start read sequence\n"); msg.condition = I2C_COND_START; msg.acknack = I2C_ACKNAK_WAITACK; msg.direction = I2C_WRITE; msg.data = (chip << 1); msg.data |= 0x01; - if (i2c_transfer(&msg)) + if (i2c_transfer(base, &msg)) return -1; /* read bytes; send NACK at last byte */ @@ -381,75 +297,59 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) msg.direction = I2C_READ; msg.data = 0x00; - if (i2c_transfer(&msg)) + if (i2c_transfer(base, &msg)) return -1; *buffer = msg.data; - PRINTD(("i2c_read: reading byte (0x%08x)=0x%02x\n", - (unsigned int)buffer, *buffer)); + debug("i2c_read: reading byte (%p)=0x%02x\n", + buffer, *buffer); buffer++; } - i2c_reset(); + i2c_reset(base); return 0; } -/* - * i2c_write: - Write multiple bytes to an i2c device - * - * The higher level routines take into account that this function is only - * called with len < page length of the device (see configuration file) - * - * @chip: address of the chip which is to be written - * @addr: i2c data address within the chip - * @alen: length of the i2c data address (1..2 bytes) - * @buffer: where to find the data to be written - * @len: how much byte do we want to read - * @return: 0 in case of success - */ -int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) +static int __i2c_write(struct mv_i2c *base, uchar chip, u8 *addr, int alen, + uchar *buffer, int len) { struct mv_i2c_msg msg; - u8 addr_bytes[3]; /* lowest...highest byte of data address */ - PRINTD(("i2c_write(chip=0x%02x, addr=0x%02x, alen=0x%02x, " - "len=0x%02x)\n", chip, addr, alen, len)); + debug("i2c_write(chip=0x%02x, addr=0x%02x, alen=0x%02x, " + "len=0x%02x)\n", chip, *addr, alen, len); - i2c_reset(); + i2c_reset(base); /* chip address write */ - PRINTD(("i2c_write: chip address write\n")); + debug("i2c_write: chip address write\n"); msg.condition = I2C_COND_START; msg.acknack = I2C_ACKNAK_WAITACK; msg.direction = I2C_WRITE; msg.data = (chip << 1); msg.data &= 0xFE; - if (i2c_transfer(&msg)) + if (i2c_transfer(base, &msg)) return -1; /* * send memory address bytes; * alen defines how much bytes we have to send. */ - addr_bytes[0] = (u8)((addr >> 0) & 0x000000FF); - addr_bytes[1] = (u8)((addr >> 8) & 0x000000FF); - addr_bytes[2] = (u8)((addr >> 16) & 0x000000FF); - while (--alen >= 0) { - PRINTD(("i2c_write: send memory word address\n")); + debug("i2c_read: send address byte %02x (alen=%d)\n", + *addr, alen); msg.condition = I2C_COND_NORMAL; msg.acknack = I2C_ACKNAK_WAITACK; msg.direction = I2C_WRITE; - msg.data = addr_bytes[alen]; - if (i2c_transfer(&msg)) + msg.data = *(addr++); + if (i2c_transfer(base, &msg)) return -1; } /* write bytes; send NACK at last byte */ while (len--) { - PRINTD(("i2c_write: writing byte (0x%08x)=0x%02x\n", - (unsigned int)buffer, *buffer)); + debug("i2c_write: writing byte (%p)=0x%02x\n", + buffer, *buffer); if (len == 0) msg.condition = I2C_COND_STOP; @@ -460,12 +360,246 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) msg.direction = I2C_WRITE; msg.data = *(buffer++); - if (i2c_transfer(&msg)) + if (i2c_transfer(base, &msg)) return -1; } - i2c_reset(); + i2c_reset(base); + + return 0; +} + +#ifndef CONFIG_DM_I2C + +static struct mv_i2c *base_glob; + +static void i2c_board_init(struct mv_i2c *base) +{ +#ifdef CONFIG_SYS_I2C_INIT_BOARD + u32 icr; + /* + * call board specific i2c bus reset routine before accessing the + * environment, which might be in a chip on that bus. For details + * about this problem see doc/I2C_Edge_Conditions. + * + * disable I2C controller first, otherwhise it thinks we want to + * talk to the slave port... + */ + icr = readl(&base->icr); + writel(readl(&base->icr) & ~(ICR_SCLE | ICR_IUE), &base->icr); + + i2c_init_board(); + + writel(icr, &base->icr); +#endif +} + +#ifdef CONFIG_I2C_MULTI_BUS +static unsigned long i2c_regs[CONFIG_MV_I2C_NUM] = CONFIG_MV_I2C_REG; +static unsigned int bus_initialized[CONFIG_MV_I2C_NUM]; +static unsigned int current_bus; + +int i2c_set_bus_num(unsigned int bus) +{ + if ((bus < 0) || (bus >= CONFIG_MV_I2C_NUM)) { + printf("Bad bus: %d\n", bus); + return -1; + } + + base_glob = (struct mv_i2c *)i2c_regs[bus]; + current_bus = bus; + + if (!bus_initialized[current_bus]) { + i2c_board_init(base_glob); + bus_initialized[current_bus] = 1; + } + + return 0; +} + +unsigned int i2c_get_bus_num(void) +{ + return current_bus; +} +#endif + +/* API Functions */ +void i2c_init(int speed, int slaveaddr) +{ + u32 val; + +#ifdef CONFIG_I2C_MULTI_BUS + current_bus = 0; + base_glob = (struct mv_i2c *)i2c_regs[current_bus]; +#else + base_glob = (struct mv_i2c *)CONFIG_MV_I2C_REG; +#endif + + if (speed > 100000) + val = ICR_FM; + else + val = ICR_SM; + clrsetbits_le32(&base_glob->icr, ICR_MODE_MASK, val); + + i2c_board_init(base_glob); +} + +static int __i2c_probe_chip(struct mv_i2c *base, uchar chip) +{ + struct mv_i2c_msg msg; + + i2c_reset(base); + + msg.condition = I2C_COND_START; + msg.acknack = I2C_ACKNAK_WAITACK; + msg.direction = I2C_WRITE; + msg.data = (chip << 1) + 1; + if (i2c_transfer(base, &msg)) + return -1; + + msg.condition = I2C_COND_STOP; + msg.acknack = I2C_ACKNAK_SENDNAK; + msg.direction = I2C_READ; + msg.data = 0x00; + if (i2c_transfer(base, &msg)) + return -1; return 0; } -#endif /* CONFIG_HARD_I2C */ + +/* + * i2c_probe: - Test if a chip answers for a given i2c address + * + * @chip: address of the chip which is searched for + * @return: 0 if a chip was found, -1 otherwhise + */ +int i2c_probe(uchar chip) +{ + return __i2c_probe_chip(base_glob, chip); +} + +/* + * i2c_read: - Read multiple bytes from an i2c device + * + * The higher level routines take into account that this function is only + * called with len < page length of the device (see configuration file) + * + * @chip: address of the chip which is to be read + * @addr: i2c data address within the chip + * @alen: length of the i2c data address (1..2 bytes) + * @buffer: where to write the data + * @len: how much byte do we want to read + * @return: 0 in case of success + */ +int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) +{ + u8 addr_bytes[4]; + + addr_bytes[0] = (addr >> 0) & 0xFF; + addr_bytes[1] = (addr >> 8) & 0xFF; + addr_bytes[2] = (addr >> 16) & 0xFF; + addr_bytes[3] = (addr >> 24) & 0xFF; + + return __i2c_read(base_glob, chip, addr_bytes, alen, buffer, len); +} + +/* + * i2c_write: - Write multiple bytes to an i2c device + * + * The higher level routines take into account that this function is only + * called with len < page length of the device (see configuration file) + * + * @chip: address of the chip which is to be written + * @addr: i2c data address within the chip + * @alen: length of the i2c data address (1..2 bytes) + * @buffer: where to find the data to be written + * @len: how much byte do we want to read + * @return: 0 in case of success + */ +int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) +{ + u8 addr_bytes[4]; + + addr_bytes[0] = (addr >> 0) & 0xFF; + addr_bytes[1] = (addr >> 8) & 0xFF; + addr_bytes[2] = (addr >> 16) & 0xFF; + addr_bytes[3] = (addr >> 24) & 0xFF; + + return __i2c_write(base_glob, chip, addr_bytes, alen, buffer, len); +} + +#else /* CONFIG_DM_I2C */ + +struct mv_i2c_priv { + struct mv_i2c *base; +}; + +static int mv_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs) +{ + struct mv_i2c_priv *i2c = dev_get_priv(bus); + struct i2c_msg *dmsg, *omsg, dummy; + + memset(&dummy, 0, sizeof(struct i2c_msg)); + + /* + * We expect either two messages (one with an offset and one with the + * actual data) or one message (just data or offset/data combined) + */ + if (nmsgs > 2 || nmsgs == 0) { + debug("%s: Only one or two messages are supported.", __func__); + return -1; + } + + omsg = nmsgs == 1 ? &dummy : msg; + dmsg = nmsgs == 1 ? msg : msg + 1; + + if (dmsg->flags & I2C_M_RD) + return __i2c_read(i2c->base, dmsg->addr, omsg->buf, + omsg->len, dmsg->buf, dmsg->len); + else + return __i2c_write(i2c->base, dmsg->addr, omsg->buf, + omsg->len, dmsg->buf, dmsg->len); +} + +static int mv_i2c_set_bus_speed(struct udevice *bus, unsigned int speed) +{ + struct mv_i2c_priv *priv = dev_get_priv(bus); + u32 val; + + if (speed > 100000) + val = ICR_FM; + else + val = ICR_SM; + clrsetbits_le32(&priv->base->icr, ICR_MODE_MASK, val); + + return 0; +} + +static int mv_i2c_probe(struct udevice *bus) +{ + struct mv_i2c_priv *priv = dev_get_priv(bus); + + priv->base = (void *)dev_get_addr_ptr(bus); + + return 0; +} + +static const struct dm_i2c_ops mv_i2c_ops = { + .xfer = mv_i2c_xfer, + .set_bus_speed = mv_i2c_set_bus_speed, +}; + +static const struct udevice_id mv_i2c_ids[] = { + { .compatible = "marvell,armada-3700-i2c" }, + { } +}; + +U_BOOT_DRIVER(i2c_mv) = { + .name = "i2c_mv", + .id = UCLASS_I2C, + .of_match = mv_i2c_ids, + .probe = mv_i2c_probe, + .priv_auto_alloc_size = sizeof(struct mv_i2c_priv), + .ops = &mv_i2c_ops, +}; +#endif /* CONFIG_DM_I2C */ diff --git a/drivers/i2c/mv_i2c.h b/drivers/i2c/mv_i2c.h index ae27c44..1e62892 100644 --- a/drivers/i2c/mv_i2c.h +++ b/drivers/i2c/mv_i2c.h @@ -23,12 +23,7 @@ extern void i2c_clk_enable(void); #define I2C_READ 0 #define I2C_WRITE 1 -#if (CONFIG_SYS_I2C_SPEED == 400000) -#define I2C_ICR_INIT (ICR_FM | ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD \ - | ICR_SCLE) -#else #define I2C_ICR_INIT (ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE) -#endif #define I2C_ISR_INIT 0x7FF /* ----- Control register bits ---------------------------------------- */ @@ -48,7 +43,15 @@ extern void i2c_clk_enable(void); #define ICR_ALDIE 0x1000 /* enable arbitration interrupt */ #define ICR_SADIE 0x2000 /* slave address detected int enable */ #define ICR_UR 0x4000 /* unit reset */ -#define ICR_FM 0x8000 /* Fast Mode */ +#ifdef CONFIG_ARMADA_3700 +#define ICR_SM 0x00000 /* Standard Mode */ +#define ICR_FM 0x10000 /* Fast Mode */ +#define ICR_MODE_MASK 0x30000 /* Mode mask */ +#else +#define ICR_SM 0x00000 /* Standard Mode */ +#define ICR_FM 0x08000 /* Fast Mode */ +#define ICR_MODE_MASK 0x18000 /* Mode mask */ +#endif /* ----- Status register bits ----------------------------------------- */ diff --git a/drivers/i2c/mvtwsi.c b/drivers/i2c/mvtwsi.c index 3765fed..60c8ea1 100644 --- a/drivers/i2c/mvtwsi.c +++ b/drivers/i2c/mvtwsi.c @@ -10,7 +10,7 @@ #include <common.h> #include <i2c.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/io.h> #include <linux/compat.h> #ifdef CONFIG_DM_I2C @@ -830,6 +830,7 @@ static const struct dm_i2c_ops mvtwsi_i2c_ops = { static const struct udevice_id mvtwsi_i2c_ids[] = { { .compatible = "marvell,mv64xxx-i2c", }, + { .compatible = "marvell,mv78230-i2c", }, { /* sentinel */ } }; diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c index f340208..a26f44e 100644 --- a/drivers/i2c/mxc_i2c.c +++ b/drivers/i2c/mxc_i2c.c @@ -17,7 +17,7 @@ #include <common.h> #include <asm/arch/clock.h> #include <asm/arch/imx-regs.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/imx-common/mxc_i2c.h> #include <asm/io.h> #include <i2c.h> diff --git a/drivers/i2c/mxs_i2c.c b/drivers/i2c/mxs_i2c.c index 87e05c7..d454410 100644 --- a/drivers/i2c/mxs_i2c.c +++ b/drivers/i2c/mxs_i2c.c @@ -16,7 +16,7 @@ #include <common.h> #include <malloc.h> #include <i2c.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/io.h> #include <asm/arch/clock.h> #include <asm/arch/imx-regs.h> diff --git a/drivers/i2c/rk_i2c.c b/drivers/i2c/rk_i2c.c index 63b1418..7c701cb 100644 --- a/drivers/i2c/rk_i2c.c +++ b/drivers/i2c/rk_i2c.c @@ -258,7 +258,7 @@ static int rk_i2c_write(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len, while (bytes_remain_len) { if (bytes_remain_len > RK_I2C_FIFO_SIZE) - bytes_xferred = 32; + bytes_xferred = RK_I2C_FIFO_SIZE; else bytes_xferred = bytes_remain_len; words_xferred = DIV_ROUND_UP(bytes_xferred, 4); @@ -269,17 +269,17 @@ static int rk_i2c_write(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len, if ((i * 4 + j) == bytes_xferred) break; - if (i == 0 && j == 0) { + if (i == 0 && j == 0 && pbuf == buf) { txdata |= (chip << 1); - } else if (i == 0 && j <= r_len) { + } else if (i == 0 && j <= r_len && pbuf == buf) { txdata |= (reg & (0xff << ((j - 1) * 8))) << 8; } else { txdata |= (*pbuf++)<<(j * 8); } - writel(txdata, ®s->txdata[i]); } - debug("I2c Write TXDATA[%d] = 0x%x\n", i, txdata); + writel(txdata, ®s->txdata[i]); + debug("I2c Write TXDATA[%d] = 0x%08x\n", i, txdata); } writel(I2C_CON_EN | I2C_CON_MOD(I2C_MODE_TX), ®s->con); diff --git a/drivers/i2c/zynq_i2c.c b/drivers/i2c/zynq_i2c.c index 380863b..2f6b364 100644 --- a/drivers/i2c/zynq_i2c.c +++ b/drivers/i2c/zynq_i2c.c @@ -13,7 +13,7 @@ #include <common.h> #include <asm/io.h> #include <i2c.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/arch/hardware.h> /* i2c register set */ diff --git a/drivers/misc/cros_ec.c b/drivers/misc/cros_ec.c index aea8d61..9378e96 100644 --- a/drivers/misc/cros_ec.c +++ b/drivers/misc/cros_ec.c @@ -22,7 +22,7 @@ #include <fdtdec.h> #include <malloc.h> #include <spi.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/io.h> #include <asm-generic/gpio.h> #include <dm/device-internal.h> diff --git a/drivers/misc/fsl_iim.c b/drivers/misc/fsl_iim.c index 36433a7..2feb182 100644 --- a/drivers/misc/fsl_iim.c +++ b/drivers/misc/fsl_iim.c @@ -11,7 +11,7 @@ #include <common.h> #include <fuse.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/io.h> #ifndef CONFIG_MPC512X #include <asm/arch/imx-regs.h> diff --git a/drivers/misc/mc9sdz60.c b/drivers/misc/mc9sdz60.c index cd56b58..61ed50d 100644 --- a/drivers/misc/mc9sdz60.c +++ b/drivers/misc/mc9sdz60.c @@ -7,7 +7,7 @@ #include <config.h> #include <common.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <linux/types.h> #include <i2c.h> #include <mc9sdz60.h> diff --git a/drivers/misc/mxc_ocotp.c b/drivers/misc/mxc_ocotp.c index 38344e8..6b8566c 100644 --- a/drivers/misc/mxc_ocotp.c +++ b/drivers/misc/mxc_ocotp.c @@ -14,7 +14,7 @@ #include <common.h> #include <fuse.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/io.h> #include <asm/arch/clock.h> #include <asm/arch/imx-regs.h> diff --git a/drivers/misc/mxs_ocotp.c b/drivers/misc/mxs_ocotp.c index 6c0d247..a42164c 100644 --- a/drivers/misc/mxs_ocotp.c +++ b/drivers/misc/mxs_ocotp.c @@ -14,7 +14,7 @@ #include <common.h> #include <fuse.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/io.h> #include <asm/arch/clock.h> #include <asm/arch/imx-regs.h> diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index a71afa5..ba9a723 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -80,6 +80,7 @@ config ROCKCHIP_SDHCI config MMC_UNIPHIER bool "UniPhier SD/MMC Host Controller support" depends on ARCH_UNIPHIER + depends on BLK select DM_MMC_OPS help This selects support for the SD/MMC Host Controller on UniPhier SoCs. diff --git a/drivers/mmc/atmel_sdhci.c b/drivers/mmc/atmel_sdhci.c index dd6bd33..d8f8087 100644 --- a/drivers/mmc/atmel_sdhci.c +++ b/drivers/mmc/atmel_sdhci.c @@ -136,13 +136,8 @@ static int atmel_sdhci_probe(struct udevice *dev) static int atmel_sdhci_bind(struct udevice *dev) { struct atmel_sdhci_plat *plat = dev_get_platdata(dev); - int ret; - ret = sdhci_bind(dev, &plat->mmc, &plat->cfg); - if (ret) - return ret; - - return 0; + return sdhci_bind(dev, &plat->mmc, &plat->cfg); } static const struct udevice_id atmel_sdhci_ids[] = { diff --git a/drivers/mmc/bfin_sdh.c b/drivers/mmc/bfin_sdh.c index 0e493da..993a00c 100644 --- a/drivers/mmc/bfin_sdh.c +++ b/drivers/mmc/bfin_sdh.c @@ -12,7 +12,7 @@ #include <mmc.h> #include <asm/io.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/byteorder.h> #include <asm/blackfin.h> #include <asm/clock.h> diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index afc674d..074f86c 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -120,9 +120,9 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data) if (host->fifo_mode && size) { len = 0; - if (data->flags == MMC_DATA_READ) { - if ((dwmci_readl(host, DWMCI_RINTSTS) & - DWMCI_INTMSK_RXDR)) { + if (data->flags == MMC_DATA_READ && + (mask & DWMCI_INTMSK_RXDR)) { + while (size) { len = dwmci_readl(host, DWMCI_STATUS); len = (len >> DWMCI_FIFO_SHIFT) & DWMCI_FIFO_MASK; @@ -130,12 +130,13 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data) for (i = 0; i < len; i++) *buf++ = dwmci_readl(host, DWMCI_DATA); - dwmci_writel(host, DWMCI_RINTSTS, - DWMCI_INTMSK_RXDR); + size = size > len ? (size - len) : 0; } - } else { - if ((dwmci_readl(host, DWMCI_RINTSTS) & - DWMCI_INTMSK_TXDR)) { + dwmci_writel(host, DWMCI_RINTSTS, + DWMCI_INTMSK_RXDR); + } else if (data->flags == MMC_DATA_WRITE && + (mask & DWMCI_INTMSK_TXDR)) { + while (size) { len = dwmci_readl(host, DWMCI_STATUS); len = fifo_depth - ((len >> DWMCI_FIFO_SHIFT) & @@ -144,11 +145,11 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data) for (i = 0; i < len; i++) dwmci_writel(host, DWMCI_DATA, *buf++); - dwmci_writel(host, DWMCI_RINTSTS, - DWMCI_INTMSK_TXDR); + size = size > len ? (size - len) : 0; } + dwmci_writel(host, DWMCI_RINTSTS, + DWMCI_INTMSK_TXDR); } - size = size > len ? (size - len) : 0; } /* Data arrived correctly. */ diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 57271f1..568fed7 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -284,13 +284,8 @@ static int exynos_dwmmc_probe(struct udevice *dev) static int exynos_dwmmc_bind(struct udevice *dev) { struct exynos_mmc_plat *plat = dev_get_platdata(dev); - int ret; - ret = dwmci_bind(dev, &plat->mmc, &plat->cfg); - if (ret) - return ret; - - return 0; + return dwmci_bind(dev, &plat->mmc, &plat->cfg); } static const struct udevice_id exynos_dwmmc_ids[] = { diff --git a/drivers/mmc/ftsdc010_mci.c b/drivers/mmc/ftsdc010_mci.c index c02740f..e88c632 100644 --- a/drivers/mmc/ftsdc010_mci.c +++ b/drivers/mmc/ftsdc010_mci.c @@ -13,7 +13,7 @@ #include <mmc.h> #include <asm/io.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/byteorder.h> #include <faraday/ftsdc010.h> diff --git a/drivers/mmc/gen_atmel_mci.c b/drivers/mmc/gen_atmel_mci.c index 69770df..cca0b04 100644 --- a/drivers/mmc/gen_atmel_mci.c +++ b/drivers/mmc/gen_atmel_mci.c @@ -14,7 +14,7 @@ #include <part.h> #include <malloc.h> #include <asm/io.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/byteorder.h> #include <asm/arch/clk.h> #include <asm/arch/hardware.h> diff --git a/drivers/mmc/hi6220_dw_mmc.c b/drivers/mmc/hi6220_dw_mmc.c index b0d063c..fdaf1e4 100644 --- a/drivers/mmc/hi6220_dw_mmc.c +++ b/drivers/mmc/hi6220_dw_mmc.c @@ -8,7 +8,7 @@ #include <common.h> #include <dwmmc.h> #include <malloc.h> -#include <asm-generic/errno.h> +#include <linux/errno.h> #define DWMMC_MAX_CH_NUM 4 diff --git a/drivers/mmc/kona_sdhci.c b/drivers/mmc/kona_sdhci.c index 3653d00..e730caa 100644 --- a/drivers/mmc/kona_sdhci.c +++ b/drivers/mmc/kona_sdhci.c @@ -7,7 +7,7 @@ #include <common.h> #include <malloc.h> #include <sdhci.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/kona-common/clk.h> #define SDHCI_CORECTRL_OFFSET 0x00008000 diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index 43ea0bb..0312da9 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -21,6 +21,14 @@ #include <div64.h> #include "mmc_private.h" +static const unsigned int sd_au_size[] = { + 0, SZ_16K / 512, SZ_32K / 512, + SZ_64K / 512, SZ_128K / 512, SZ_256K / 512, + SZ_512K / 512, SZ_1M / 512, SZ_2M / 512, + SZ_4M / 512, SZ_8M / 512, (SZ_8M + SZ_4M) / 512, + SZ_16M / 512, (SZ_16M + SZ_8M) / 512, SZ_32M / 512, SZ_64M / 512, +}; + #ifndef CONFIG_DM_MMC_OPS __weak int board_mmc_getwp(struct mmc *mmc) { @@ -945,6 +953,62 @@ retry_scr: return 0; } +static int sd_read_ssr(struct mmc *mmc) +{ + int err, i; + struct mmc_cmd cmd; + ALLOC_CACHE_ALIGN_BUFFER(uint, ssr, 16); + struct mmc_data data; + int timeout = 3; + unsigned int au, eo, et, es; + + cmd.cmdidx = MMC_CMD_APP_CMD; + cmd.resp_type = MMC_RSP_R1; + cmd.cmdarg = mmc->rca << 16; + + err = mmc_send_cmd(mmc, &cmd, NULL); + if (err) + return err; + + cmd.cmdidx = SD_CMD_APP_SD_STATUS; + cmd.resp_type = MMC_RSP_R1; + cmd.cmdarg = 0; + +retry_ssr: + data.dest = (char *)ssr; + data.blocksize = 64; + data.blocks = 1; + data.flags = MMC_DATA_READ; + + err = mmc_send_cmd(mmc, &cmd, &data); + if (err) { + if (timeout--) + goto retry_ssr; + + return err; + } + + for (i = 0; i < 16; i++) + ssr[i] = be32_to_cpu(ssr[i]); + + au = (ssr[2] >> 12) & 0xF; + if ((au <= 9) || (mmc->version == SD_VERSION_3)) { + mmc->ssr.au = sd_au_size[au]; + es = (ssr[3] >> 24) & 0xFF; + es |= (ssr[2] & 0xFF) << 8; + et = (ssr[3] >> 18) & 0x3F; + if (es && et) { + eo = (ssr[3] >> 16) & 0x3; + mmc->ssr.erase_timeout = (et * 1000) / es; + mmc->ssr.erase_offset = eo * 1000; + } + } else { + debug("Invalid Allocation Unit Size.\n"); + } + + return 0; +} + /* frequency bases */ /* divided by 10 to be nice to platforms without floating point */ static const int fbase[] = { @@ -1350,6 +1414,10 @@ static int mmc_startup(struct mmc *mmc) mmc_set_bus_width(mmc, 4); } + err = sd_read_ssr(mmc); + if (err) + return err; + if (mmc->card_caps & MMC_MODE_HS) mmc->tran_speed = 50000000; else diff --git a/drivers/mmc/mmc_boot.c b/drivers/mmc/mmc_boot.c index 756a982..ac6f56f 100644 --- a/drivers/mmc/mmc_boot.c +++ b/drivers/mmc/mmc_boot.c @@ -85,16 +85,10 @@ int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize, */ int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode) { - int err; - - err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BOOT_BUS_WIDTH, - EXT_CSD_BOOT_BUS_WIDTH_MODE(mode) | - EXT_CSD_BOOT_BUS_WIDTH_RESET(reset) | - EXT_CSD_BOOT_BUS_WIDTH_WIDTH(width)); - - if (err) - return err; - return 0; + return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BOOT_BUS_WIDTH, + EXT_CSD_BOOT_BUS_WIDTH_MODE(mode) | + EXT_CSD_BOOT_BUS_WIDTH_RESET(reset) | + EXT_CSD_BOOT_BUS_WIDTH_WIDTH(width)); } /* @@ -106,16 +100,10 @@ int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode) */ int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access) { - int err; - - err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF, - EXT_CSD_BOOT_ACK(ack) | - EXT_CSD_BOOT_PART_NUM(part_num) | - EXT_CSD_PARTITION_ACCESS(access)); - - if (err) - return err; - return 0; + return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF, + EXT_CSD_BOOT_ACK(ack) | + EXT_CSD_BOOT_PART_NUM(part_num) | + EXT_CSD_PARTITION_ACCESS(access)); } /* diff --git a/drivers/mmc/mmc_write.c b/drivers/mmc/mmc_write.c index 0f8b5c7..2289640 100644 --- a/drivers/mmc/mmc_write.c +++ b/drivers/mmc/mmc_write.c @@ -100,8 +100,13 @@ unsigned long mmc_berase(struct blk_desc *block_dev, lbaint_t start, & ~(mmc->erase_grp_size - 1)) - 1); while (blk < blkcnt) { - blk_r = ((blkcnt - blk) > mmc->erase_grp_size) ? - mmc->erase_grp_size : (blkcnt - blk); + if (IS_SD(mmc) && mmc->ssr.au) { + blk_r = ((blkcnt - blk) > mmc->ssr.au) ? + mmc->ssr.au : (blkcnt - blk); + } else { + blk_r = ((blkcnt - blk) > mmc->erase_grp_size) ? + mmc->erase_grp_size : (blkcnt - blk); + } err = mmc_erase_t(mmc, start + blk, blk_r); if (err) break; diff --git a/drivers/mmc/msm_sdhci.c b/drivers/mmc/msm_sdhci.c index 8d4399e..1b82991 100644 --- a/drivers/mmc/msm_sdhci.c +++ b/drivers/mmc/msm_sdhci.c @@ -190,13 +190,8 @@ static int msm_ofdata_to_platdata(struct udevice *dev) static int msm_sdc_bind(struct udevice *dev) { struct msm_sdhc_plat *plat = dev_get_platdata(dev); - int ret; - ret = sdhci_bind(dev, &plat->mmc, &plat->cfg); - if (ret) - return ret; - - return 0; + return sdhci_bind(dev, &plat->mmc, &plat->cfg); } static const struct udevice_id msm_mmc_ids[] = { diff --git a/drivers/mmc/mxcmmc.c b/drivers/mmc/mxcmmc.c index 8038f90..5a385a3 100644 --- a/drivers/mmc/mxcmmc.c +++ b/drivers/mmc/mxcmmc.c @@ -23,7 +23,7 @@ #include <part.h> #include <malloc.h> #include <mmc.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/io.h> #include <asm/arch/clock.h> diff --git a/drivers/mmc/mxsmmc.c b/drivers/mmc/mxsmmc.c index 40f3eaa..0896028 100644 --- a/drivers/mmc/mxsmmc.c +++ b/drivers/mmc/mxsmmc.c @@ -20,7 +20,7 @@ #include <common.h> #include <malloc.h> #include <mmc.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/io.h> #include <asm/arch/clock.h> #include <asm/arch/imx-regs.h> diff --git a/drivers/mmc/pic32_sdhci.c b/drivers/mmc/pic32_sdhci.c index abe7429..2abf943 100644 --- a/drivers/mmc/pic32_sdhci.c +++ b/drivers/mmc/pic32_sdhci.c @@ -10,7 +10,7 @@ #include <dm.h> #include <common.h> #include <sdhci.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <mach/pic32.h> DECLARE_GLOBAL_DATA_PTR; diff --git a/drivers/mmc/pxa_mmc_gen.c b/drivers/mmc/pxa_mmc_gen.c index 19ae81d..a5462e2 100644 --- a/drivers/mmc/pxa_mmc_gen.c +++ b/drivers/mmc/pxa_mmc_gen.c @@ -9,7 +9,7 @@ #include <common.h> #include <asm/arch/hardware.h> #include <asm/arch/regs-mmc.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/io.h> #include <malloc.h> #include <mmc.h> diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c index 020a59b..859760b 100644 --- a/drivers/mmc/rockchip_dw_mmc.c +++ b/drivers/mmc/rockchip_dw_mmc.c @@ -142,13 +142,8 @@ static int rockchip_dwmmc_probe(struct udevice *dev) static int rockchip_dwmmc_bind(struct udevice *dev) { struct rockchip_mmc_plat *plat = dev_get_platdata(dev); - int ret; - ret = dwmci_bind(dev, &plat->mmc, &plat->cfg); - if (ret) - return ret; - - return 0; + return dwmci_bind(dev, &plat->mmc, &plat->cfg); } static const struct udevice_id rockchip_dwmmc_ids[] = { diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c index 624029b..c56e1a3 100644 --- a/drivers/mmc/rockchip_sdhci.c +++ b/drivers/mmc/rockchip_sdhci.c @@ -62,13 +62,8 @@ static int arasan_sdhci_ofdata_to_platdata(struct udevice *dev) static int rockchip_sdhci_bind(struct udevice *dev) { struct rockchip_sdhc_plat *plat = dev_get_platdata(dev); - int ret; - ret = sdhci_bind(dev, &plat->mmc, &plat->cfg); - if (ret) - return ret; - - return 0; + return sdhci_bind(dev, &plat->mmc, &plat->cfg); } static const struct udevice_id arasan_sdhci_ids[] = { diff --git a/drivers/mmc/sandbox_mmc.c b/drivers/mmc/sandbox_mmc.c index 5f1333b..fdb29a5 100644 --- a/drivers/mmc/sandbox_mmc.c +++ b/drivers/mmc/sandbox_mmc.c @@ -112,7 +112,6 @@ int sandbox_mmc_bind(struct udevice *dev) { struct sandbox_mmc_plat *plat = dev_get_platdata(dev); struct mmc_config *cfg = &plat->cfg; - int ret; cfg->name = dev->name; cfg->host_caps = MMC_MODE_HS_52MHz | MMC_MODE_HS | MMC_MODE_8BIT; @@ -121,11 +120,7 @@ int sandbox_mmc_bind(struct udevice *dev) cfg->f_max = 52000000; cfg->b_max = U32_MAX; - ret = mmc_bind(dev, &plat->mmc, cfg); - if (ret) - return ret; - - return 0; + return mmc_bind(dev, &plat->mmc, cfg); } int sandbox_mmc_unbind(struct udevice *dev) diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index 7ddb549..b2bf5a0 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -121,13 +121,10 @@ static int sdhci_transfer_data(struct sdhci_host *host, struct mmc_data *data, * for card ready state. * Every time when card is busy after timeout then (last) timeout value will be * increased twice but only if it doesn't exceed global defined maximum. - * Each function call will use last timeout value. Max timeout can be redefined - * in board config file. + * Each function call will use last timeout value. */ -#ifndef CONFIG_SDHCI_CMD_MAX_TIMEOUT -#define CONFIG_SDHCI_CMD_MAX_TIMEOUT 3200 -#endif -#define CONFIG_SDHCI_CMD_DEFAULT_TIMEOUT 100 +#define SDHCI_CMD_MAX_TIMEOUT 3200 +#define SDHCI_CMD_DEFAULT_TIMEOUT 100 #define SDHCI_READ_STATUS_TIMEOUT 1000 #ifdef CONFIG_DM_MMC_OPS @@ -151,7 +148,7 @@ static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd, unsigned start = get_timer(0); /* Timeout unit - ms */ - static unsigned int cmd_timeout = CONFIG_SDHCI_CMD_DEFAULT_TIMEOUT; + static unsigned int cmd_timeout = SDHCI_CMD_DEFAULT_TIMEOUT; sdhci_writel(host, SDHCI_INT_ALL_MASK, SDHCI_INT_STATUS); mask = SDHCI_CMD_INHIBIT | SDHCI_DATA_INHIBIT; @@ -164,7 +161,7 @@ static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd, while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) { if (time >= cmd_timeout) { printf("%s: MMC: %d busy ", __func__, mmc_dev); - if (2 * cmd_timeout <= CONFIG_SDHCI_CMD_MAX_TIMEOUT) { + if (2 * cmd_timeout <= SDHCI_CMD_MAX_TIMEOUT) { cmd_timeout += cmd_timeout; printf("timeout increasing to: %u ms.\n", cmd_timeout); @@ -297,7 +294,7 @@ static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd, static int sdhci_set_clock(struct mmc *mmc, unsigned int clock) { struct sdhci_host *host = mmc->priv; - unsigned int div, clk, timeout, reg; + unsigned int div, clk = 0, timeout, reg; /* Wait max 20 ms */ timeout = 200; @@ -321,14 +318,36 @@ static int sdhci_set_clock(struct mmc *mmc, unsigned int clock) return 0; if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) { - /* Version 3.00 divisors must be a multiple of 2. */ - if (mmc->cfg->f_max <= clock) - div = 1; - else { - for (div = 2; div < SDHCI_MAX_DIV_SPEC_300; div += 2) { - if ((mmc->cfg->f_max / div) <= clock) + /* + * Check if the Host Controller supports Programmable Clock + * Mode. + */ + if (host->clk_mul) { + for (div = 1; div <= 1024; div++) { + if ((mmc->cfg->f_max * host->clk_mul / div) + <= clock) break; } + + /* + * Set Programmable Clock Mode in the Clock + * Control register. + */ + clk = SDHCI_PROG_CLOCK_MODE; + div--; + } else { + /* Version 3.00 divisors must be a multiple of 2. */ + if (mmc->cfg->f_max <= clock) { + div = 1; + } else { + for (div = 2; + div < SDHCI_MAX_DIV_SPEC_300; + div += 2) { + if ((mmc->cfg->f_max / div) <= clock) + break; + } + } + div >>= 1; } } else { /* Version 2.00 divisors must be a power of 2. */ @@ -336,13 +355,13 @@ static int sdhci_set_clock(struct mmc *mmc, unsigned int clock) if ((mmc->cfg->f_max / div) <= clock) break; } + div >>= 1; } - div >>= 1; if (host->set_clock) host->set_clock(host->index, div); - clk = (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT; + clk |= (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT; clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN) << SDHCI_DIVIDER_HI_SHIFT; clk |= SDHCI_CLOCK_INT_EN; @@ -451,6 +470,8 @@ static int sdhci_init(struct mmc *mmc) { struct sdhci_host *host = mmc->priv; + sdhci_reset(host, SDHCI_RESET_ALL); + if ((host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR) && !aligned_buffer) { aligned_buffer = memalign(8, 512*1024); if (!aligned_buffer) { @@ -514,9 +535,17 @@ static const struct mmc_ops sdhci_ops = { int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host, u32 max_clk, u32 min_clk) { - u32 caps; + u32 caps, caps_1; caps = sdhci_readl(host, SDHCI_CAPABILITIES); + +#ifdef CONFIG_MMC_SDMA + if (!(caps & SDHCI_CAN_DO_SDMA)) { + printf("%s: Your controller doesn't support SDMA!!\n", + __func__); + return -EINVAL; + } +#endif host->version = sdhci_readw(host, SDHCI_HOST_VERSION); cfg->name = host->name; @@ -534,8 +563,11 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host, SDHCI_CLOCK_BASE_SHIFT; cfg->f_max *= 1000000; } - if (cfg->f_max == 0) + if (cfg->f_max == 0) { + printf("%s: Hardware doesn't specify base clock frequency\n", + __func__); return -EINVAL; + } if (min_clk) cfg->f_min = min_clk; else { @@ -552,6 +584,9 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host, if (caps & SDHCI_CAN_VDD_180) cfg->voltages |= MMC_VDD_165_195; + if (host->quirks & SDHCI_QUIRK_BROKEN_VOLTAGE) + cfg->voltages |= host->voltages; + cfg->host_caps = MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_4BIT; if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) { if (caps & SDHCI_CAN_DO_8BIT) @@ -564,6 +599,14 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host, cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT; + /* + * In case of Host Controller v3.00, find out whether clock + * multiplier is supported. + */ + caps_1 = sdhci_readl(host, SDHCI_CAPABILITIES_1); + host->clk_mul = (caps_1 & SDHCI_CLOCK_MUL_MASK) >> + SDHCI_CLOCK_MUL_SHIFT; + return 0; } @@ -575,27 +618,11 @@ int sdhci_bind(struct udevice *dev, struct mmc *mmc, struct mmc_config *cfg) #else int add_sdhci(struct sdhci_host *host, u32 max_clk, u32 min_clk) { -#ifdef CONFIG_MMC_SDMA - unsigned int caps; - - caps = sdhci_readl(host, SDHCI_CAPABILITIES); - if (!(caps & SDHCI_CAN_DO_SDMA)) { - printf("%s: Your controller doesn't support SDMA!!\n", - __func__); - return -1; - } -#endif - - if (sdhci_setup_cfg(&host->cfg, host, max_clk, min_clk)) { - printf("%s: Hardware doesn't specify base clock frequency\n", - __func__); - return -EINVAL; - } + int ret; - if (host->quirks & SDHCI_QUIRK_BROKEN_VOLTAGE) - host->cfg.voltages |= host->voltages; - - sdhci_reset(host, SDHCI_RESET_ALL); + ret = sdhci_setup_cfg(&host->cfg, host, max_clk, min_clk); + if (ret) + return ret; host->mmc = mmc_create(&host->cfg, host); if (host->mmc == NULL) { diff --git a/drivers/mmc/sh_mmcif.c b/drivers/mmc/sh_mmcif.c index bc4b344..69ded9e 100644 --- a/drivers/mmc/sh_mmcif.c +++ b/drivers/mmc/sh_mmcif.c @@ -12,7 +12,7 @@ #include <command.h> #include <mmc.h> #include <malloc.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/io.h> #include "sh_mmcif.h" diff --git a/drivers/mmc/sh_sdhi.c b/drivers/mmc/sh_sdhi.c index ea82e2b..78e2ef6 100644 --- a/drivers/mmc/sh_sdhi.c +++ b/drivers/mmc/sh_sdhi.c @@ -13,7 +13,7 @@ #include <common.h> #include <malloc.h> #include <mmc.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/io.h> #include <asm/arch/rmobile.h> #include <asm/arch/sh_sdhi.h> diff --git a/drivers/mmc/uniphier-sd.c b/drivers/mmc/uniphier-sd.c index 701b26f..4af7fdb 100644 --- a/drivers/mmc/uniphier-sd.c +++ b/drivers/mmc/uniphier-sd.c @@ -119,9 +119,12 @@ DECLARE_GLOBAL_DATA_PTR; /* alignment required by the DMA engine of this controller */ #define UNIPHIER_SD_DMA_MINALIGN 0x10 -struct uniphier_sd_priv { +struct uniphier_sd_plat { struct mmc_config cfg; - struct mmc *mmc; + struct mmc mmc; +}; + +struct uniphier_sd_priv { void __iomem *regbase; unsigned long mclk; unsigned int version; @@ -654,8 +657,16 @@ static void uniphier_sd_host_init(struct uniphier_sd_priv *priv) } } +static int uniphier_sd_bind(struct udevice *dev) +{ + struct uniphier_sd_plat *plat = dev_get_platdata(dev); + + return mmc_bind(dev, &plat->mmc, &plat->cfg); +} + static int uniphier_sd_probe(struct udevice *dev) { + struct uniphier_sd_plat *plat = dev_get_platdata(dev); struct uniphier_sd_priv *priv = dev_get_priv(dev); struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); fdt_addr_t base; @@ -691,15 +702,15 @@ static int uniphier_sd_probe(struct udevice *dev) return ret; } - priv->cfg.name = dev->name; - priv->cfg.host_caps = MMC_MODE_HS_52MHz | MMC_MODE_HS; + plat->cfg.name = dev->name; + plat->cfg.host_caps = MMC_MODE_HS_52MHz | MMC_MODE_HS; switch (fdtdec_get_int(gd->fdt_blob, dev->of_offset, "bus-width", 1)) { case 8: - priv->cfg.host_caps |= MMC_MODE_8BIT; + plat->cfg.host_caps |= MMC_MODE_8BIT; break; case 4: - priv->cfg.host_caps |= MMC_MODE_4BIT; + plat->cfg.host_caps |= MMC_MODE_4BIT; break; case 1: break; @@ -722,27 +733,13 @@ static int uniphier_sd_probe(struct udevice *dev) uniphier_sd_host_init(priv); - priv->cfg.voltages = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34; - priv->cfg.f_min = priv->mclk / + plat->cfg.voltages = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34; + plat->cfg.f_min = priv->mclk / (priv->caps & UNIPHIER_SD_CAP_DIV1024 ? 1024 : 512); - priv->cfg.f_max = priv->mclk; - priv->cfg.b_max = U32_MAX; /* max value of UNIPHIER_SD_SECCNT */ - - priv->mmc = mmc_create(&priv->cfg, priv); - if (!priv->mmc) - return -EIO; - - upriv->mmc = priv->mmc; - priv->mmc->dev = dev; - - return 0; -} - -static int uniphier_sd_remove(struct udevice *dev) -{ - struct uniphier_sd_priv *priv = dev_get_priv(dev); + plat->cfg.f_max = priv->mclk; + plat->cfg.b_max = U32_MAX; /* max value of UNIPHIER_SD_SECCNT */ - mmc_destroy(priv->mmc); + upriv->mmc = &plat->mmc; return 0; } @@ -756,8 +753,9 @@ U_BOOT_DRIVER(uniphier_mmc) = { .name = "uniphier-mmc", .id = UCLASS_MMC, .of_match = uniphier_sd_match, + .bind = uniphier_sd_bind, .probe = uniphier_sd_probe, - .remove = uniphier_sd_remove, .priv_auto_alloc_size = sizeof(struct uniphier_sd_priv), + .platdata_auto_alloc_size = sizeof(struct uniphier_sd_plat), .ops = &uniphier_sd_ops, }; diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c index 3815b94..b991102 100644 --- a/drivers/mmc/zynq_sdhci.c +++ b/drivers/mmc/zynq_sdhci.c @@ -63,13 +63,8 @@ static int arasan_sdhci_ofdata_to_platdata(struct udevice *dev) static int arasan_sdhci_bind(struct udevice *dev) { struct arasan_sdhci_plat *plat = dev_get_platdata(dev); - int ret; - ret = sdhci_bind(dev, &plat->mmc, &plat->cfg); - if (ret) - return ret; - - return 0; + return sdhci_bind(dev, &plat->mmc, &plat->cfg); } static const struct udevice_id arasan_sdhci_ids[] = { diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig index 390e9e4..3a9705c 100644 --- a/drivers/mtd/Kconfig +++ b/drivers/mtd/Kconfig @@ -40,3 +40,5 @@ endmenu source "drivers/mtd/nand/Kconfig" source "drivers/mtd/spi/Kconfig" + +source "drivers/mtd/ubi/Kconfig" diff --git a/drivers/mtd/cfi_mtd.c b/drivers/mtd/cfi_mtd.c index 709a486..3c06173 100644 --- a/drivers/mtd/cfi_mtd.c +++ b/drivers/mtd/cfi_mtd.c @@ -10,7 +10,7 @@ #include <flash.h> #include <malloc.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <linux/mtd/mtd.h> #include <linux/mtd/concat.h> #include <mtd/cfi_flash.h> diff --git a/drivers/mtd/mtdpart.c b/drivers/mtd/mtdpart.c index cddfb16..5e42c4b 100644 --- a/drivers/mtd/mtdpart.c +++ b/drivers/mtd/mtdpart.c @@ -20,7 +20,7 @@ #include <common.h> #include <malloc.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <linux/compat.h> #include <ubi_uboot.h> diff --git a/drivers/mtd/nand/arasan_nfc.c b/drivers/mtd/nand/arasan_nfc.c index 320cbaa..86f7526 100644 --- a/drivers/mtd/nand/arasan_nfc.c +++ b/drivers/mtd/nand/arasan_nfc.c @@ -9,7 +9,7 @@ #include <common.h> #include <malloc.h> #include <asm/io.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <linux/mtd/mtd.h> #include <linux/mtd/nand.h> #include <linux/mtd/partitions.h> diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c index 601e744..18280b0 100644 --- a/drivers/mtd/nand/denali.c +++ b/drivers/mtd/nand/denali.c @@ -9,7 +9,7 @@ #include <common.h> #include <malloc.h> #include <nand.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/io.h> #include "denali.h" diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_elbc_nand.c index f621f14..b3c23b0 100644 --- a/drivers/mtd/nand/fsl_elbc_nand.c +++ b/drivers/mtd/nand/fsl_elbc_nand.c @@ -17,7 +17,7 @@ #include <linux/mtd/nand_ecc.h> #include <asm/io.h> -#include <asm/errno.h> +#include <linux/errno.h> #ifdef VERBOSE_DEBUG #define DEBUG_ELBC diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c index 7001cbd..bc6bdc9 100644 --- a/drivers/mtd/nand/fsl_ifc_nand.c +++ b/drivers/mtd/nand/fsl_ifc_nand.c @@ -16,7 +16,7 @@ #include <linux/mtd/nand_ecc.h> #include <asm/io.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <fsl_ifc.h> #ifndef CONFIG_SYS_FSL_IFC_BANK_COUNT diff --git a/drivers/mtd/nand/fsl_upm.c b/drivers/mtd/nand/fsl_upm.c index d2b3881..4a45b87 100644 --- a/drivers/mtd/nand/fsl_upm.c +++ b/drivers/mtd/nand/fsl_upm.c @@ -10,7 +10,7 @@ #include <config.h> #include <common.h> #include <asm/io.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <linux/mtd/mtd.h> #include <linux/mtd/fsl_upm.h> #include <nand.h> diff --git a/drivers/mtd/nand/lpc32xx_nand_mlc.c b/drivers/mtd/nand/lpc32xx_nand_mlc.c index a793115..3af7e6d 100644 --- a/drivers/mtd/nand/lpc32xx_nand_mlc.c +++ b/drivers/mtd/nand/lpc32xx_nand_mlc.c @@ -22,7 +22,7 @@ #include <common.h> #include <nand.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/io.h> #include <nand.h> #include <asm/arch/clk.h> diff --git a/drivers/mtd/nand/lpc32xx_nand_slc.c b/drivers/mtd/nand/lpc32xx_nand_slc.c index daa1e7a..f7e27b3 100644 --- a/drivers/mtd/nand/lpc32xx_nand_slc.c +++ b/drivers/mtd/nand/lpc32xx_nand_slc.c @@ -15,7 +15,7 @@ #include <common.h> #include <nand.h> #include <linux/mtd/nand_ecc.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/io.h> #include <asm/arch/config.h> #include <asm/arch/clk.h> diff --git a/drivers/mtd/nand/mpc5121_nfc.c b/drivers/mtd/nand/mpc5121_nfc.c index 8a8775c..7faabdd 100644 --- a/drivers/mtd/nand/mpc5121_nfc.c +++ b/drivers/mtd/nand/mpc5121_nfc.c @@ -19,7 +19,7 @@ #include <linux/mtd/nand_ecc.h> #include <linux/compat.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/io.h> #include <asm/processor.h> #include <nand.h> diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c index 4bf564e..9200544 100644 --- a/drivers/mtd/nand/mxs_nand.c +++ b/drivers/mtd/nand/mxs_nand.c @@ -18,7 +18,7 @@ #include <linux/mtd/nand.h> #include <linux/types.h> #include <malloc.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/io.h> #include <asm/arch/clock.h> #include <asm/arch/imx-regs.h> diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index d1287bc..d9e5fc9 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -44,7 +44,7 @@ #include <linux/mtd/partitions.h> #endif #include <asm/io.h> -#include <asm/errno.h> +#include <linux/errno.h> /* Define default oob placement schemes for large and small page devices */ static struct nand_ecclayout nand_oob_8 = { diff --git a/drivers/mtd/nand/nand_ecc.c b/drivers/mtd/nand/nand_ecc.c index 083e0e9..8b548b2 100644 --- a/drivers/mtd/nand/nand_ecc.c +++ b/drivers/mtd/nand/nand_ecc.c @@ -25,7 +25,7 @@ #include <common.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <linux/mtd/mtd.h> #include <linux/mtd/nand_ecc.h> diff --git a/drivers/mtd/nand/nand_util.c b/drivers/mtd/nand/nand_util.c index e8bcc34..9c8a373 100644 --- a/drivers/mtd/nand/nand_util.c +++ b/drivers/mtd/nand/nand_util.c @@ -26,7 +26,7 @@ #include <memalign.h> #include <div64.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <linux/mtd/mtd.h> #include <nand.h> #include <jffs2/jffs2.h> diff --git a/drivers/mtd/nand/omap_elm.c b/drivers/mtd/nand/omap_elm.c index d963e6c..9ef1b21 100644 --- a/drivers/mtd/nand/omap_elm.c +++ b/drivers/mtd/nand/omap_elm.c @@ -15,7 +15,7 @@ #include <common.h> #include <asm/io.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <linux/mtd/omap_elm.h> #include <asm/arch/hardware.h> diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c index af618fc..d1e1bdd 100644 --- a/drivers/mtd/nand/omap_gpmc.c +++ b/drivers/mtd/nand/omap_gpmc.c @@ -7,7 +7,7 @@ #include <common.h> #include <asm/io.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/arch/mem.h> #include <linux/mtd/omap_gpmc.h> #include <linux/mtd/nand_ecc.h> diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c index b1d58e0..dfe8966 100644 --- a/drivers/mtd/nand/pxa3xx_nand.c +++ b/drivers/mtd/nand/pxa3xx_nand.c @@ -10,7 +10,7 @@ #include <common.h> #include <malloc.h> #include <nand.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/io.h> #include <asm/arch/cpu.h> #include <linux/mtd/mtd.h> diff --git a/drivers/mtd/nand/tegra_nand.c b/drivers/mtd/nand/tegra_nand.c index 38bd7a5..5c9b485 100644 --- a/drivers/mtd/nand/tegra_nand.c +++ b/drivers/mtd/nand/tegra_nand.c @@ -14,7 +14,7 @@ #include <asm/arch/clock.h> #include <asm/arch/funcmux.h> #include <asm/arch-tegra/clk_rst.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/gpio.h> #include <fdtdec.h> #include <bouncebuf.h> diff --git a/drivers/mtd/onenand/onenand_base.c b/drivers/mtd/onenand/onenand_base.c index 0e35dc5..2e3d0e5 100644 --- a/drivers/mtd/onenand/onenand_base.c +++ b/drivers/mtd/onenand/onenand_base.c @@ -27,7 +27,7 @@ #include <linux/mtd/onenand.h> #include <asm/io.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <malloc.h> /* It should access 16-bit instead of 8-bit */ diff --git a/drivers/mtd/onenand/onenand_bbt.c b/drivers/mtd/onenand/onenand_bbt.c index 52509f1..2050700 100644 --- a/drivers/mtd/onenand/onenand_bbt.c +++ b/drivers/mtd/onenand/onenand_bbt.c @@ -20,7 +20,7 @@ #include <linux/mtd/onenand.h> #include <malloc.h> -#include <asm/errno.h> +#include <linux/errno.h> /** * check_short_pattern - [GENERIC] check if a pattern is in the buffer diff --git a/drivers/mtd/onenand/samsung.c b/drivers/mtd/onenand/samsung.c index 5e56a29..10dd268 100644 --- a/drivers/mtd/onenand/samsung.c +++ b/drivers/mtd/onenand/samsung.c @@ -19,7 +19,7 @@ #include <linux/mtd/samsung_onenand.h> #include <asm/io.h> -#include <asm/errno.h> +#include <linux/errno.h> #define ONENAND_ERASE_STATUS 0x00 #define ONENAND_MULTI_ERASE_SET 0x01 diff --git a/drivers/mtd/spi/sandbox.c b/drivers/mtd/spi/sandbox.c index 53470b9..f59134f 100644 --- a/drivers/mtd/spi/sandbox.c +++ b/drivers/mtd/spi/sandbox.c @@ -292,10 +292,7 @@ static int sandbox_sf_process_cmd(struct sandbox_spi_flash *sbsf, const u8 *rx, sbsf->data->nr_sectors; } else if (sbsf->cmd == CMD_ERASE_4K && (flags & SECT_4K)) { sbsf->erase_size = 4 << 10; - } else if (sbsf->cmd == CMD_ERASE_32K && (flags & SECT_32K)) { - sbsf->erase_size = 32 << 10; - } else if (sbsf->cmd == CMD_ERASE_64K && - !(flags & (SECT_4K | SECT_32K))) { + } else if (sbsf->cmd == CMD_ERASE_64K && !(flags & SECT_4K)) { sbsf->erase_size = 64 << 10; } else { debug(" cmd unknown: %#x\n", sbsf->cmd); diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index da2bb7b..cde4cfb 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -20,34 +20,6 @@ enum spi_dual_flash { SF_DUAL_PARALLEL_FLASH = BIT(1), }; -/* Enum list - Full read commands */ -enum spi_read_cmds { - ARRAY_SLOW = BIT(0), - ARRAY_FAST = BIT(1), - DUAL_OUTPUT_FAST = BIT(2), - QUAD_OUTPUT_FAST = BIT(3), - DUAL_IO_FAST = BIT(4), - QUAD_IO_FAST = BIT(5), -}; - -/* Normal - Extended - Full command set */ -#define RD_NORM (ARRAY_SLOW | ARRAY_FAST) -#define RD_EXTN (RD_NORM | DUAL_OUTPUT_FAST | DUAL_IO_FAST) -#define RD_FULL (RD_EXTN | QUAD_OUTPUT_FAST | QUAD_IO_FAST) - -/* sf param flags */ -enum { -#ifndef CONFIG_SPI_FLASH_USE_4K_SECTORS - SECT_4K = 0, -#else - SECT_4K = BIT(0), -#endif - SECT_32K = BIT(1), - E_FSR = BIT(2), - SST_WR = BIT(3), - WR_QPP = BIT(4), -}; - enum spi_nor_option_flags { SNOR_F_SST_WR = BIT(0), SNOR_F_USE_FSR = BIT(1), @@ -67,7 +39,6 @@ enum spi_nor_option_flags { /* Erase commands */ #define CMD_ERASE_4K 0x20 -#define CMD_ERASE_32K 0x52 #define CMD_ERASE_CHIP 0xc7 #define CMD_ERASE_64K 0xd8 @@ -141,7 +112,6 @@ int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len, * @sector_size: Isn't necessarily a sector size from vendor, * the size listed here is what works with CMD_ERASE_64K * @nr_sectors: No.of sectors on this device - * @e_rd_cmd: Enum list for read commands * @flags: Important param, for flash specific behaviour */ struct spi_flash_params { @@ -150,8 +120,17 @@ struct spi_flash_params { u16 ext_jedec; u32 sector_size; u32 nr_sectors; - u8 e_rd_cmd; + u16 flags; +#define SECT_4K BIT(0) +#define E_FSR BIT(1) +#define SST_WR BIT(2) +#define WR_QPP BIT(3) +#define RD_QUAD BIT(4) +#define RD_DUAL BIT(5) +#define RD_QUADIO BIT(6) +#define RD_DUALIO BIT(7) +#define RD_FULL (RD_QUAD | RD_DUAL | RD_QUADIO | RD_DUALIO) }; extern const struct spi_flash_params spi_flash_params_table[]; diff --git a/drivers/mtd/spi/sf_mtd.c b/drivers/mtd/spi/sf_mtd.c index 0b9cb62..935ae4d 100644 --- a/drivers/mtd/spi/sf_mtd.c +++ b/drivers/mtd/spi/sf_mtd.c @@ -6,7 +6,7 @@ #include <common.h> #include <malloc.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <linux/mtd/mtd.h> #include <spi_flash.h> diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c index 70ca236..5b50114 100644 --- a/drivers/mtd/spi/sf_params.c +++ b/drivers/mtd/spi/sf_params.c @@ -15,122 +15,122 @@ /* SPI/QSPI flash device params structure */ const struct spi_flash_params spi_flash_params_table[] = { #ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */ - {"AT45DB011D", 0x1f2200, 0x0, 64 * 1024, 4, RD_NORM, SECT_4K}, - {"AT45DB021D", 0x1f2300, 0x0, 64 * 1024, 8, RD_NORM, SECT_4K}, - {"AT45DB041D", 0x1f2400, 0x0, 64 * 1024, 8, RD_NORM, SECT_4K}, - {"AT45DB081D", 0x1f2500, 0x0, 64 * 1024, 16, RD_NORM, SECT_4K}, - {"AT45DB161D", 0x1f2600, 0x0, 64 * 1024, 32, RD_NORM, SECT_4K}, - {"AT45DB321D", 0x1f2700, 0x0, 64 * 1024, 64, RD_NORM, SECT_4K}, - {"AT45DB641D", 0x1f2800, 0x0, 64 * 1024, 128, RD_NORM, SECT_4K}, - {"AT25DF321A", 0x1f4701, 0x0, 64 * 1024, 64, RD_NORM, SECT_4K}, - {"AT25DF321", 0x1f4700, 0x0, 64 * 1024, 64, RD_NORM, SECT_4K}, - {"AT26DF081A", 0x1f4501, 0x0, 64 * 1024, 16, RD_NORM, SECT_4K}, + {"AT45DB011D", 0x1f2200, 0x0, 64 * 1024, 4, SECT_4K}, + {"AT45DB021D", 0x1f2300, 0x0, 64 * 1024, 8, SECT_4K}, + {"AT45DB041D", 0x1f2400, 0x0, 64 * 1024, 8, SECT_4K}, + {"AT45DB081D", 0x1f2500, 0x0, 64 * 1024, 16, SECT_4K}, + {"AT45DB161D", 0x1f2600, 0x0, 64 * 1024, 32, SECT_4K}, + {"AT45DB321D", 0x1f2700, 0x0, 64 * 1024, 64, SECT_4K}, + {"AT45DB641D", 0x1f2800, 0x0, 64 * 1024, 128, SECT_4K}, + {"AT25DF321A", 0x1f4701, 0x0, 64 * 1024, 64, SECT_4K}, + {"AT25DF321", 0x1f4700, 0x0, 64 * 1024, 64, SECT_4K}, + {"AT26DF081A", 0x1f4501, 0x0, 64 * 1024, 16, SECT_4K}, #endif #ifdef CONFIG_SPI_FLASH_EON /* EON */ - {"EN25Q32B", 0x1c3016, 0x0, 64 * 1024, 64, RD_NORM, 0}, - {"EN25Q64", 0x1c3017, 0x0, 64 * 1024, 128, RD_NORM, SECT_4K}, - {"EN25Q128B", 0x1c3018, 0x0, 64 * 1024, 256, RD_NORM, 0}, - {"EN25S64", 0x1c3817, 0x0, 64 * 1024, 128, RD_NORM, 0}, + {"EN25Q32B", 0x1c3016, 0x0, 64 * 1024, 64, 0}, + {"EN25Q64", 0x1c3017, 0x0, 64 * 1024, 128, SECT_4K}, + {"EN25Q128B", 0x1c3018, 0x0, 64 * 1024, 256, 0}, + {"EN25S64", 0x1c3817, 0x0, 64 * 1024, 128, 0}, #endif #ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */ - {"GD25Q64B", 0xc84017, 0x0, 64 * 1024, 128, RD_NORM, SECT_4K}, - {"GD25LQ32", 0xc86016, 0x0, 64 * 1024, 64, RD_NORM, SECT_4K}, + {"GD25Q64B", 0xc84017, 0x0, 64 * 1024, 128, SECT_4K}, + {"GD25LQ32", 0xc86016, 0x0, 64 * 1024, 64, SECT_4K}, #endif #ifdef CONFIG_SPI_FLASH_ISSI /* ISSI */ - {"IS25LP032", 0x9d6016, 0x0, 64 * 1024, 64, RD_NORM, 0}, - {"IS25LP064", 0x9d6017, 0x0, 64 * 1024, 128, RD_NORM, 0}, - {"IS25LP128", 0x9d6018, 0x0, 64 * 1024, 256, RD_NORM, 0}, + {"IS25LP032", 0x9d6016, 0x0, 64 * 1024, 64, 0}, + {"IS25LP064", 0x9d6017, 0x0, 64 * 1024, 128, 0}, + {"IS25LP128", 0x9d6018, 0x0, 64 * 1024, 256, 0}, #endif #ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */ - {"MX25L2006E", 0xc22012, 0x0, 64 * 1024, 4, RD_NORM, 0}, - {"MX25L4005", 0xc22013, 0x0, 64 * 1024, 8, RD_NORM, 0}, - {"MX25L8005", 0xc22014, 0x0, 64 * 1024, 16, RD_NORM, 0}, - {"MX25L1605D", 0xc22015, 0x0, 64 * 1024, 32, RD_NORM, 0}, - {"MX25L3205D", 0xc22016, 0x0, 64 * 1024, 64, RD_NORM, 0}, - {"MX25L6405D", 0xc22017, 0x0, 64 * 1024, 128, RD_NORM, 0}, - {"MX25L12805", 0xc22018, 0x0, 64 * 1024, 256, RD_FULL, WR_QPP}, - {"MX25L25635F", 0xc22019, 0x0, 64 * 1024, 512, RD_FULL, WR_QPP}, - {"MX25L51235F", 0xc2201a, 0x0, 64 * 1024, 1024, RD_FULL, WR_QPP}, - {"MX25L12855E", 0xc22618, 0x0, 64 * 1024, 256, RD_FULL, WR_QPP}, + {"MX25L2006E", 0xc22012, 0x0, 64 * 1024, 4, 0}, + {"MX25L4005", 0xc22013, 0x0, 64 * 1024, 8, 0}, + {"MX25L8005", 0xc22014, 0x0, 64 * 1024, 16, 0}, + {"MX25L1605D", 0xc22015, 0x0, 64 * 1024, 32, 0}, + {"MX25L3205D", 0xc22016, 0x0, 64 * 1024, 64, 0}, + {"MX25L6405D", 0xc22017, 0x0, 64 * 1024, 128, 0}, + {"MX25L12805", 0xc22018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP}, + {"MX25L25635F", 0xc22019, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP}, + {"MX25L51235F", 0xc2201a, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP}, + {"MX25L12855E", 0xc22618, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP}, #endif #ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */ - {"S25FL008A", 0x010213, 0x0, 64 * 1024, 16, RD_NORM, 0}, - {"S25FL016A", 0x010214, 0x0, 64 * 1024, 32, RD_NORM, 0}, - {"S25FL032A", 0x010215, 0x0, 64 * 1024, 64, RD_NORM, 0}, - {"S25FL064A", 0x010216, 0x0, 64 * 1024, 128, RD_NORM, 0}, - {"S25FL116K", 0x014015, 0x0, 64 * 1024, 128, RD_NORM, 0}, - {"S25FL164K", 0x014017, 0x0140, 64 * 1024, 128, RD_NORM, 0}, - {"S25FL128P_256K", 0x012018, 0x0300, 256 * 1024, 64, RD_FULL, WR_QPP}, - {"S25FL128P_64K", 0x012018, 0x0301, 64 * 1024, 256, RD_FULL, WR_QPP}, - {"S25FL032P", 0x010215, 0x4d00, 64 * 1024, 64, RD_FULL, WR_QPP}, - {"S25FL064P", 0x010216, 0x4d00, 64 * 1024, 128, RD_FULL, WR_QPP}, - {"S25FL128S_256K", 0x012018, 0x4d00, 256 * 1024, 64, RD_FULL, WR_QPP}, - {"S25FL128S_64K", 0x012018, 0x4d01, 64 * 1024, 256, RD_FULL, WR_QPP}, - {"S25FL256S_256K", 0x010219, 0x4d00, 256 * 1024, 128, RD_FULL, WR_QPP}, - {"S25FL256S_64K", 0x010219, 0x4d01, 64 * 1024, 512, RD_FULL, WR_QPP}, - {"S25FS512S", 0x010220, 0x4D00, 128 * 1024, 512, RD_FULL, WR_QPP}, - {"S25FL512S_256K", 0x010220, 0x4d00, 256 * 1024, 256, RD_FULL, WR_QPP}, - {"S25FL512S_64K", 0x010220, 0x4d01, 64 * 1024, 1024, RD_FULL, WR_QPP}, - {"S25FL512S_512K", 0x010220, 0x4f00, 256 * 1024, 256, RD_FULL, WR_QPP}, + {"S25FL008A", 0x010213, 0x0, 64 * 1024, 16, 0}, + {"S25FL016A", 0x010214, 0x0, 64 * 1024, 32, 0}, + {"S25FL032A", 0x010215, 0x0, 64 * 1024, 64, 0}, + {"S25FL064A", 0x010216, 0x0, 64 * 1024, 128, 0}, + {"S25FL116K", 0x014015, 0x0, 64 * 1024, 128, 0}, + {"S25FL164K", 0x014017, 0x0140, 64 * 1024, 128, 0}, + {"S25FL128P_256K", 0x012018, 0x0300, 256 * 1024, 64, RD_FULL | WR_QPP}, + {"S25FL128P_64K", 0x012018, 0x0301, 64 * 1024, 256, RD_FULL | WR_QPP}, + {"S25FL032P", 0x010215, 0x4d00, 64 * 1024, 64, RD_FULL | WR_QPP}, + {"S25FL064P", 0x010216, 0x4d00, 64 * 1024, 128, RD_FULL | WR_QPP}, + {"S25FL128S_256K", 0x012018, 0x4d00, 256 * 1024, 64, RD_FULL | WR_QPP}, + {"S25FL128S_64K", 0x012018, 0x4d01, 64 * 1024, 256, RD_FULL | WR_QPP}, + {"S25FL256S_256K", 0x010219, 0x4d00, 256 * 1024, 128, RD_FULL | WR_QPP}, + {"S25FL256S_64K", 0x010219, 0x4d01, 64 * 1024, 512, RD_FULL | WR_QPP}, + {"S25FS512S", 0x010220, 0x4D00, 128 * 1024, 512, RD_FULL | WR_QPP}, + {"S25FL512S_256K", 0x010220, 0x4d00, 256 * 1024, 256, RD_FULL | WR_QPP}, + {"S25FL512S_64K", 0x010220, 0x4d01, 64 * 1024, 1024, RD_FULL | WR_QPP}, + {"S25FL512S_512K", 0x010220, 0x4f00, 256 * 1024, 256, RD_FULL | WR_QPP}, #endif #ifdef CONFIG_SPI_FLASH_STMICRO /* STMICRO */ - {"M25P10", 0x202011, 0x0, 32 * 1024, 4, RD_NORM, 0}, - {"M25P20", 0x202012, 0x0, 64 * 1024, 4, RD_NORM, 0}, - {"M25P40", 0x202013, 0x0, 64 * 1024, 8, RD_NORM, 0}, - {"M25P80", 0x202014, 0x0, 64 * 1024, 16, RD_NORM, 0}, - {"M25P16", 0x202015, 0x0, 64 * 1024, 32, RD_NORM, 0}, - {"M25PE16", 0x208015, 0x1000, 64 * 1024, 32, RD_NORM, 0}, - {"M25PX16", 0x207115, 0x1000, 64 * 1024, 32, RD_EXTN, 0}, - {"M25P32", 0x202016, 0x0, 64 * 1024, 64, RD_NORM, 0}, - {"M25P64", 0x202017, 0x0, 64 * 1024, 128, RD_NORM, 0}, - {"M25P128", 0x202018, 0x0, 256 * 1024, 64, RD_NORM, 0}, - {"M25PX64", 0x207117, 0x0, 64 * 1024, 128, RD_NORM, SECT_4K}, - {"N25Q016A", 0x20bb15, 0x0, 64 * 1024, 32, RD_NORM, SECT_4K}, - {"N25Q32", 0x20ba16, 0x0, 64 * 1024, 64, RD_FULL, WR_QPP | SECT_4K}, - {"N25Q32A", 0x20bb16, 0x0, 64 * 1024, 64, RD_FULL, WR_QPP | SECT_4K}, - {"N25Q64", 0x20ba17, 0x0, 64 * 1024, 128, RD_FULL, WR_QPP | SECT_4K}, - {"N25Q64A", 0x20bb17, 0x0, 64 * 1024, 128, RD_FULL, WR_QPP | SECT_4K}, - {"N25Q128", 0x20ba18, 0x0, 64 * 1024, 256, RD_FULL, WR_QPP}, - {"N25Q128A", 0x20bb18, 0x0, 64 * 1024, 256, RD_FULL, WR_QPP}, - {"N25Q256", 0x20ba19, 0x0, 64 * 1024, 512, RD_FULL, WR_QPP | SECT_4K}, - {"N25Q256A", 0x20bb19, 0x0, 64 * 1024, 512, RD_FULL, WR_QPP | SECT_4K}, - {"N25Q512", 0x20ba20, 0x0, 64 * 1024, 1024, RD_FULL, WR_QPP | E_FSR | SECT_4K}, - {"N25Q512A", 0x20bb20, 0x0, 64 * 1024, 1024, RD_FULL, WR_QPP | E_FSR | SECT_4K}, - {"N25Q1024", 0x20ba21, 0x0, 64 * 1024, 2048, RD_FULL, WR_QPP | E_FSR | SECT_4K}, - {"N25Q1024A", 0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL, WR_QPP | E_FSR | SECT_4K}, + {"M25P10", 0x202011, 0x0, 32 * 1024, 4, 0}, + {"M25P20", 0x202012, 0x0, 64 * 1024, 4, 0}, + {"M25P40", 0x202013, 0x0, 64 * 1024, 8, 0}, + {"M25P80", 0x202014, 0x0, 64 * 1024, 16, 0}, + {"M25P16", 0x202015, 0x0, 64 * 1024, 32, 0}, + {"M25PE16", 0x208015, 0x1000, 64 * 1024, 32, 0}, + {"M25PX16", 0x207115, 0x1000, 64 * 1024, 32, RD_QUAD | RD_DUAL}, + {"M25P32", 0x202016, 0x0, 64 * 1024, 64, 0}, + {"M25P64", 0x202017, 0x0, 64 * 1024, 128, 0}, + {"M25P128", 0x202018, 0x0, 256 * 1024, 64, 0}, + {"M25PX64", 0x207117, 0x0, 64 * 1024, 128, SECT_4K}, + {"N25Q016A", 0x20bb15, 0x0, 64 * 1024, 32, SECT_4K}, + {"N25Q32", 0x20ba16, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K}, + {"N25Q32A", 0x20bb16, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K}, + {"N25Q64", 0x20ba17, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K}, + {"N25Q64A", 0x20bb17, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K}, + {"N25Q128", 0x20ba18, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP}, + {"N25Q128A", 0x20bb18, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP}, + {"N25Q256", 0x20ba19, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K}, + {"N25Q256A", 0x20bb19, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K}, + {"N25Q512", 0x20ba20, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP | E_FSR | SECT_4K}, + {"N25Q512A", 0x20bb20, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP | E_FSR | SECT_4K}, + {"N25Q1024", 0x20ba21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K}, + {"N25Q1024A", 0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K}, #endif #ifdef CONFIG_SPI_FLASH_SST /* SST */ - {"SST25VF040B", 0xbf258d, 0x0, 64 * 1024, 8, RD_NORM, SECT_4K | SST_WR}, - {"SST25VF080B", 0xbf258e, 0x0, 64 * 1024, 16, RD_NORM, SECT_4K | SST_WR}, - {"SST25VF016B", 0xbf2541, 0x0, 64 * 1024, 32, RD_NORM, SECT_4K | SST_WR}, - {"SST25VF032B", 0xbf254a, 0x0, 64 * 1024, 64, RD_NORM, SECT_4K | SST_WR}, - {"SST25VF064C", 0xbf254b, 0x0, 64 * 1024, 128, RD_NORM, SECT_4K}, - {"SST25WF512", 0xbf2501, 0x0, 64 * 1024, 1, RD_NORM, SECT_4K | SST_WR}, - {"SST25WF010", 0xbf2502, 0x0, 64 * 1024, 2, RD_NORM, SECT_4K | SST_WR}, - {"SST25WF020", 0xbf2503, 0x0, 64 * 1024, 4, RD_NORM, SECT_4K | SST_WR}, - {"SST25WF040", 0xbf2504, 0x0, 64 * 1024, 8, RD_NORM, SECT_4K | SST_WR}, - {"SST25WF040B", 0x621613, 0x0, 64 * 1024, 8, RD_NORM, SECT_4K}, - {"SST25WF080", 0xbf2505, 0x0, 64 * 1024, 16, RD_NORM, SECT_4K | SST_WR}, + {"SST25VF040B", 0xbf258d, 0x0, 64 * 1024, 8, SECT_4K | SST_WR}, + {"SST25VF080B", 0xbf258e, 0x0, 64 * 1024, 16, SECT_4K | SST_WR}, + {"SST25VF016B", 0xbf2541, 0x0, 64 * 1024, 32, SECT_4K | SST_WR}, + {"SST25VF032B", 0xbf254a, 0x0, 64 * 1024, 64, SECT_4K | SST_WR}, + {"SST25VF064C", 0xbf254b, 0x0, 64 * 1024, 128, SECT_4K}, + {"SST25WF512", 0xbf2501, 0x0, 64 * 1024, 1, SECT_4K | SST_WR}, + {"SST25WF010", 0xbf2502, 0x0, 64 * 1024, 2, SECT_4K | SST_WR}, + {"SST25WF020", 0xbf2503, 0x0, 64 * 1024, 4, SECT_4K | SST_WR}, + {"SST25WF040", 0xbf2504, 0x0, 64 * 1024, 8, SECT_4K | SST_WR}, + {"SST25WF040B", 0x621613, 0x0, 64 * 1024, 8, SECT_4K}, + {"SST25WF080", 0xbf2505, 0x0, 64 * 1024, 16, SECT_4K | SST_WR}, #endif #ifdef CONFIG_SPI_FLASH_WINBOND /* WINBOND */ - {"W25P80", 0xef2014, 0x0, 64 * 1024, 16, RD_NORM, 0}, - {"W25P16", 0xef2015, 0x0, 64 * 1024, 32, RD_NORM, 0}, - {"W25P32", 0xef2016, 0x0, 64 * 1024, 64, RD_NORM, 0}, - {"W25X40", 0xef3013, 0x0, 64 * 1024, 8, RD_NORM, SECT_4K}, - {"W25X16", 0xef3015, 0x0, 64 * 1024, 32, RD_NORM, SECT_4K}, - {"W25X32", 0xef3016, 0x0, 64 * 1024, 64, RD_NORM, SECT_4K}, - {"W25X64", 0xef3017, 0x0, 64 * 1024, 128, RD_NORM, SECT_4K}, - {"W25Q80BL", 0xef4014, 0x0, 64 * 1024, 16, RD_FULL, WR_QPP | SECT_4K}, - {"W25Q16CL", 0xef4015, 0x0, 64 * 1024, 32, RD_FULL, WR_QPP | SECT_4K}, - {"W25Q32BV", 0xef4016, 0x0, 64 * 1024, 64, RD_FULL, WR_QPP | SECT_4K}, - {"W25Q64CV", 0xef4017, 0x0, 64 * 1024, 128, RD_FULL, WR_QPP | SECT_4K}, - {"W25Q128BV", 0xef4018, 0x0, 64 * 1024, 256, RD_FULL, WR_QPP | SECT_4K}, - {"W25Q256", 0xef4019, 0x0, 64 * 1024, 512, RD_FULL, WR_QPP | SECT_4K}, - {"W25Q80BW", 0xef5014, 0x0, 64 * 1024, 16, RD_FULL, WR_QPP | SECT_4K}, - {"W25Q16DW", 0xef6015, 0x0, 64 * 1024, 32, RD_FULL, WR_QPP | SECT_4K}, - {"W25Q32DW", 0xef6016, 0x0, 64 * 1024, 64, RD_FULL, WR_QPP | SECT_4K}, - {"W25Q64DW", 0xef6017, 0x0, 64 * 1024, 128, RD_FULL, WR_QPP | SECT_4K}, - {"W25Q128FW", 0xef6018, 0x0, 64 * 1024, 256, RD_FULL, WR_QPP | SECT_4K}, + {"W25P80", 0xef2014, 0x0, 64 * 1024, 16, 0}, + {"W25P16", 0xef2015, 0x0, 64 * 1024, 32, 0}, + {"W25P32", 0xef2016, 0x0, 64 * 1024, 64, 0}, + {"W25X40", 0xef3013, 0x0, 64 * 1024, 8, SECT_4K}, + {"W25X16", 0xef3015, 0x0, 64 * 1024, 32, SECT_4K}, + {"W25X32", 0xef3016, 0x0, 64 * 1024, 64, SECT_4K}, + {"W25X64", 0xef3017, 0x0, 64 * 1024, 128, SECT_4K}, + {"W25Q80BL", 0xef4014, 0x0, 64 * 1024, 16, RD_FULL | WR_QPP | SECT_4K}, + {"W25Q16CL", 0xef4015, 0x0, 64 * 1024, 32, RD_FULL | WR_QPP | SECT_4K}, + {"W25Q32BV", 0xef4016, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K}, + {"W25Q64CV", 0xef4017, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K}, + {"W25Q128BV", 0xef4018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP | SECT_4K}, + {"W25Q256", 0xef4019, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K}, + {"W25Q80BW", 0xef5014, 0x0, 64 * 1024, 16, RD_FULL | WR_QPP | SECT_4K}, + {"W25Q16DW", 0xef6015, 0x0, 64 * 1024, 32, RD_FULL | WR_QPP | SECT_4K}, + {"W25Q32DW", 0xef6016, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K}, + {"W25Q64DW", 0xef6017, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K}, + {"W25Q128FW", 0xef6018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP | SECT_4K}, #endif {}, /* Empty entry to terminate the list */ /* diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index 64d4e0f..7f6e9ae 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -1013,15 +1013,8 @@ int spi_flash_scan(struct spi_flash *flash) struct spi_slave *spi = flash->spi; const struct spi_flash_params *params; u16 jedec, ext_jedec; - u8 cmd, idcode[5]; + u8 idcode[5]; int ret; - static u8 spi_read_cmds_array[] = { - CMD_READ_ARRAY_SLOW, - CMD_READ_ARRAY_FAST, - CMD_READ_DUAL_OUTPUT_FAST, - CMD_READ_QUAD_OUTPUT_FAST, - CMD_READ_DUAL_IO_FAST, - CMD_READ_QUAD_IO_FAST }; /* Read the ID codes */ ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode)); @@ -1162,14 +1155,14 @@ int spi_flash_scan(struct spi_flash *flash) flash->size <<= 1; #endif +#ifdef CONFIG_SPI_FLASH_USE_4K_SECTORS /* Compute erase sector and command */ if (params->flags & SECT_4K) { flash->erase_cmd = CMD_ERASE_4K; flash->erase_size = 4096 << flash->shift; - } else if (params->flags & SECT_32K) { - flash->erase_cmd = CMD_ERASE_32K; - flash->erase_size = 32768 << flash->shift; - } else { + } else +#endif + { flash->erase_cmd = CMD_ERASE_64K; flash->erase_size = flash->sector_size; } @@ -1177,17 +1170,16 @@ int spi_flash_scan(struct spi_flash *flash) /* Now erase size becomes valid sector size */ flash->sector_size = flash->erase_size; - /* Look for the fastest read cmd */ - cmd = fls(params->e_rd_cmd & spi->mode_rx); - if (cmd) { - cmd = spi_read_cmds_array[cmd - 1]; - flash->read_cmd = cmd; - } else { - /* Go for default supported read cmd */ - flash->read_cmd = CMD_READ_ARRAY_FAST; - } + /* Look for read commands */ + flash->read_cmd = CMD_READ_ARRAY_FAST; + if (spi->mode & SPI_RX_SLOW) + flash->read_cmd = CMD_READ_ARRAY_SLOW; + else if (spi->mode & SPI_RX_QUAD && params->flags & RD_QUAD) + flash->read_cmd = CMD_READ_QUAD_OUTPUT_FAST; + else if (spi->mode & SPI_RX_DUAL && params->flags & RD_DUAL) + flash->read_cmd = CMD_READ_DUAL_OUTPUT_FAST; - /* Not require to look for fastest only two write cmds yet */ + /* Look for write commands */ if (params->flags & WR_QPP && spi->mode & SPI_TX_QUAD) flash->write_cmd = CMD_QUAD_PAGE_PROGRAM; else diff --git a/drivers/mtd/ubi/Kconfig b/drivers/mtd/ubi/Kconfig new file mode 100644 index 0000000..0c82395 --- /dev/null +++ b/drivers/mtd/ubi/Kconfig @@ -0,0 +1,98 @@ +menu "UBI support" + +config MTD_UBI + bool "Enable UBI - Unsorted block images" + select CRC32 + help + UBI is a software layer above MTD layer which admits of LVM-like + logical volumes on top of MTD devices, hides some complexities of + flash chips like wear and bad blocks and provides some other useful + capabilities. Please, consult the MTD web site for more details + (www.linux-mtd.infradead.org). + +if MTD_UBI + +config MTD_UBI_WL_THRESHOLD + int "UBI wear-leveling threshold" + default 4096 + range 2 65536 + help + This parameter defines the maximum difference between the highest + erase counter value and the lowest erase counter value of eraseblocks + of UBI devices. When this threshold is exceeded, UBI starts performing + wear leveling by means of moving data from eraseblock with low erase + counter to eraseblocks with high erase counter. + + The default value should be OK for SLC NAND flashes, NOR flashes and + other flashes which have eraseblock life-cycle 100000 or more. + However, in case of MLC NAND flashes which typically have eraseblock + life-cycle less than 10000, the threshold should be lessened (e.g., + to 128 or 256, although it does not have to be power of 2). + +config MTD_UBI_BEB_LIMIT + int "Maximum expected bad eraseblock count per 1024 eraseblocks" + default 20 + range 0 768 + help + This option specifies the maximum bad physical eraseblocks UBI + expects on the MTD device (per 1024 eraseblocks). If the underlying + flash does not admit of bad eraseblocks (e.g. NOR flash), this value + is ignored. + + NAND datasheets often specify the minimum and maximum NVM (Number of + Valid Blocks) for the flashes' endurance lifetime. The maximum + expected bad eraseblocks per 1024 eraseblocks then can be calculated + as "1024 * (1 - MinNVB / MaxNVB)", which gives 20 for most NANDs + (MaxNVB is basically the total count of eraseblocks on the chip). + + To put it differently, if this value is 20, UBI will try to reserve + about 1.9% of physical eraseblocks for bad blocks handling. And that + will be 1.9% of eraseblocks on the entire NAND chip, not just the MTD + partition UBI attaches. This means that if you have, say, a NAND + flash chip admits maximum 40 bad eraseblocks, and it is split on two + MTD partitions of the same size, UBI will reserve 40 eraseblocks when + attaching a partition. + + This option can be overridden by the "mtd=" UBI module parameter or + by the "attach" ioctl. + + Leave the default value if unsure. + +config MTD_UBI_FASTMAP + bool "UBI Fastmap (Experimental feature)" + default n + help + Important: this feature is experimental so far and the on-flash + format for fastmap may change in the next kernel versions + + Fastmap is a mechanism which allows attaching an UBI device + in nearly constant time. Instead of scanning the whole MTD device it + only has to locate a checkpoint (called fastmap) on the device. + The on-flash fastmap contains all information needed to attach + the device. Using fastmap makes only sense on large devices where + attaching by scanning takes long. UBI will not automatically install + a fastmap on old images, but you can set the UBI module parameter + fm_autoconvert to 1 if you want so. Please note that fastmap-enabled + images are still usable with UBI implementations without + fastmap support. On typical flash devices the whole fastmap fits + into one PEB. UBI will reserve PEBs to hold two fastmaps. + + If in doubt, say "N". + +config MTD_UBI_FASTMAP_AUTOCONVERT + int "enable UBI Fastmap autoconvert" + depends on MTD_UBI_FASTMAP + default 0 + help + Set this parameter to enable fastmap automatically on images + without a fastmap. + +config MTD_UBI_FM_DEBUG + int "Enable UBI fastmap debug" + depends on MTD_UBI_FASTMAP + default 0 + help + Enable UBI fastmap debug + +endif # MTD_UBI +endmenu # "Enable UBI - Unsorted block images" diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index be3ed73..302c005 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -175,7 +175,7 @@ config XILINX_AXIEMAC This MAC is present in Xilinx Microblaze, Zynq and ZynqMP SoCs. config XILINX_EMACLITE - depends on DM_ETH && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP) + depends on DM_ETH && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP || MIPS) select PHYLIB select MII bool "Xilinx Ethernetlite" diff --git a/drivers/net/cpsw.c b/drivers/net/cpsw.c index 81ccc61..d17505e 100644 --- a/drivers/net/cpsw.c +++ b/drivers/net/cpsw.c @@ -21,7 +21,7 @@ #include <net.h> #include <netdev.h> #include <cpsw.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/gpio.h> #include <asm/io.h> #include <phy.h> diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index e871b3e..8e3b839 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -20,7 +20,7 @@ #include <asm/arch/imx-regs.h> #include <asm/imx-common/sys_proto.h> #include <asm/io.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <linux/compiler.h> DECLARE_GLOBAL_DATA_PTR; diff --git a/drivers/net/fm/fm.c b/drivers/net/fm/fm.c index 17a0886..89f0d6a 100644 --- a/drivers/net/fm/fm.c +++ b/drivers/net/fm/fm.c @@ -7,7 +7,7 @@ #include <common.h> #include <malloc.h> #include <asm/io.h> -#include <asm/errno.h> +#include <linux/errno.h> #include "fm.h" #include <fsl_qe.h> /* For struct qe_firmware */ diff --git a/drivers/net/fsl_mdio.c b/drivers/net/fsl_mdio.c index 77b9739..bd56166 100644 --- a/drivers/net/fsl_mdio.c +++ b/drivers/net/fsl_mdio.c @@ -11,7 +11,7 @@ #include <phy.h> #include <fsl_mdio.h> #include <asm/io.h> -#include <asm/errno.h> +#include <linux/errno.h> void tsec_local_mdio_write(struct tsec_mii_mng __iomem *phyregs, int port_addr, int dev_addr, int regnum, int value) diff --git a/drivers/net/ftmac110.c b/drivers/net/ftmac110.c index 8fa767a..bbe56f1 100644 --- a/drivers/net/ftmac110.c +++ b/drivers/net/ftmac110.c @@ -11,7 +11,7 @@ #include <command.h> #include <malloc.h> #include <net.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/io.h> #include <asm/dma-mapping.h> diff --git a/drivers/net/lpc32xx_eth.c b/drivers/net/lpc32xx_eth.c index 2dd69f3..cbef335 100644 --- a/drivers/net/lpc32xx_eth.c +++ b/drivers/net/lpc32xx_eth.c @@ -12,7 +12,7 @@ #include <malloc.h> #include <miiphy.h> #include <asm/io.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/types.h> #include <asm/system.h> #include <asm/byteorder.h> diff --git a/drivers/net/macb.c b/drivers/net/macb.c index 921537f..8c1774e 100644 --- a/drivers/net/macb.c +++ b/drivers/net/macb.c @@ -39,7 +39,7 @@ #include <asm/io.h> #include <asm/dma-mapping.h> #include <asm/arch/clk.h> -#include <asm-generic/errno.h> +#include <linux/errno.h> #include "macb.h" diff --git a/drivers/net/mvgbe.c b/drivers/net/mvgbe.c index a1c7ea0..c784cdc 100644 --- a/drivers/net/mvgbe.c +++ b/drivers/net/mvgbe.c @@ -17,7 +17,7 @@ #include <malloc.h> #include <miiphy.h> #include <asm/io.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/types.h> #include <asm/system.h> #include <asm/byteorder.h> diff --git a/drivers/net/mvneta.c b/drivers/net/mvneta.c index fa20f54..6d51b9f 100644 --- a/drivers/net/mvneta.c +++ b/drivers/net/mvneta.c @@ -20,7 +20,7 @@ #include <config.h> #include <malloc.h> #include <asm/io.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <phy.h> #include <miiphy.h> #include <watchdog.h> diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c index 900a04c..340b85a 100644 --- a/drivers/net/mvpp2.c +++ b/drivers/net/mvpp2.c @@ -22,7 +22,7 @@ #include <config.h> #include <malloc.h> #include <asm/io.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <phy.h> #include <miiphy.h> #include <watchdog.h> diff --git a/drivers/net/pch_gbe.c b/drivers/net/pch_gbe.c index 137818b..d40fff0 100644 --- a/drivers/net/pch_gbe.c +++ b/drivers/net/pch_gbe.c @@ -118,14 +118,14 @@ static void pch_gbe_rx_descs_init(struct udevice *dev) memset(rx_desc, 0, sizeof(struct pch_gbe_rx_desc) * PCH_GBE_DESC_NUM); for (i = 0; i < PCH_GBE_DESC_NUM; i++) rx_desc->buffer_addr = dm_pci_phys_to_mem(priv->dev, - (u32)(priv->rx_buff[i])); + (ulong)(priv->rx_buff[i])); - writel(dm_pci_phys_to_mem(priv->dev, (u32)rx_desc), + writel(dm_pci_phys_to_mem(priv->dev, (ulong)rx_desc), &mac_regs->rx_dsc_base); writel(sizeof(struct pch_gbe_rx_desc) * (PCH_GBE_DESC_NUM - 1), &mac_regs->rx_dsc_size); - writel(dm_pci_phys_to_mem(priv->dev, (u32)(rx_desc + 1)), + writel(dm_pci_phys_to_mem(priv->dev, (ulong)(rx_desc + 1)), &mac_regs->rx_dsc_sw_p); } @@ -137,11 +137,11 @@ static void pch_gbe_tx_descs_init(struct udevice *dev) memset(tx_desc, 0, sizeof(struct pch_gbe_tx_desc) * PCH_GBE_DESC_NUM); - writel(dm_pci_phys_to_mem(priv->dev, (u32)tx_desc), + writel(dm_pci_phys_to_mem(priv->dev, (ulong)tx_desc), &mac_regs->tx_dsc_base); writel(sizeof(struct pch_gbe_tx_desc) * (PCH_GBE_DESC_NUM - 1), &mac_regs->tx_dsc_size); - writel(dm_pci_phys_to_mem(priv->dev, (u32)(tx_desc + 1)), + writel(dm_pci_phys_to_mem(priv->dev, (ulong)(tx_desc + 1)), &mac_regs->tx_dsc_sw_p); } @@ -251,7 +251,7 @@ static int pch_gbe_send(struct udevice *dev, void *packet, int length) if (length < 64) frame_ctrl |= PCH_GBE_TXD_CTRL_APAD; - tx_desc->buffer_addr = dm_pci_phys_to_mem(priv->dev, (u32)packet); + tx_desc->buffer_addr = dm_pci_phys_to_mem(priv->dev, (ulong)packet); tx_desc->length = length; tx_desc->tx_words_eob = length + 3; tx_desc->tx_frame_ctrl = frame_ctrl; @@ -262,7 +262,7 @@ static int pch_gbe_send(struct udevice *dev, void *packet, int length) if (++priv->tx_idx >= PCH_GBE_DESC_NUM) priv->tx_idx = 0; - writel(dm_pci_phys_to_mem(priv->dev, (u32)(tx_head + priv->tx_idx)), + writel(dm_pci_phys_to_mem(priv->dev, (ulong)(tx_head + priv->tx_idx)), &mac_regs->tx_dsc_sw_p); start = get_timer(0); @@ -283,7 +283,7 @@ static int pch_gbe_recv(struct udevice *dev, int flags, uchar **packetp) struct pch_gbe_priv *priv = dev_get_priv(dev); struct pch_gbe_regs *mac_regs = priv->mac_regs; struct pch_gbe_rx_desc *rx_desc; - u32 hw_desc, buffer_addr, length; + ulong hw_desc, buffer_addr, length; rx_desc = &priv->rx_desc[priv->rx_idx]; @@ -291,7 +291,7 @@ static int pch_gbe_recv(struct udevice *dev, int flags, uchar **packetp) hw_desc = readl(&mac_regs->rx_dsc_hw_p_hld); /* Just return if not receiving any packet */ - if ((u32)rx_desc == hw_desc) + if ((ulong)rx_desc == hw_desc) return -EAGAIN; buffer_addr = dm_pci_mem_to_phys(priv->dev, rx_desc->buffer_addr); @@ -315,7 +315,7 @@ static int pch_gbe_free_pkt(struct udevice *dev, uchar *packet, int length) if (++rx_swp >= PCH_GBE_DESC_NUM) rx_swp = 0; - writel(dm_pci_phys_to_mem(priv->dev, (u32)(rx_head + rx_swp)), + writel(dm_pci_phys_to_mem(priv->dev, (ulong)(rx_head + rx_swp)), &mac_regs->rx_dsc_sw_p); return 0; @@ -421,7 +421,7 @@ int pch_gbe_probe(struct udevice *dev) { struct pch_gbe_priv *priv; struct eth_pdata *plat = dev_get_platdata(dev); - u32 iobase; + void *iobase; /* * The priv structure contains the descriptors and frame buffers which @@ -432,11 +432,9 @@ int pch_gbe_probe(struct udevice *dev) priv->dev = dev; - dm_pci_read_config32(dev, PCI_BASE_ADDRESS_1, &iobase); - iobase &= PCI_BASE_ADDRESS_MEM_MASK; - iobase = dm_pci_mem_to_phys(dev, iobase); + iobase = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_1, PCI_REGION_MEM); - plat->iobase = iobase; + plat->iobase = (ulong)iobase; priv->mac_regs = (struct pch_gbe_regs *)iobase; /* Read MAC address from SROM and initialize dev->enetaddr with it */ diff --git a/drivers/net/phy/mv88e6352.c b/drivers/net/phy/mv88e6352.c index f639a42..d2b3ce6 100644 --- a/drivers/net/phy/mv88e6352.c +++ b/drivers/net/phy/mv88e6352.c @@ -7,7 +7,7 @@ #include <common.h> #include <miiphy.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <mv88e6352.h> #define SMI_HDR ((0x8 | 0x1) << 12) diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c index 79c1db2..a7c265b 100644 --- a/drivers/net/sh_eth.c +++ b/drivers/net/sh_eth.c @@ -15,7 +15,7 @@ #include <net.h> #include <netdev.h> #include <miiphy.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/io.h> #include "sh_eth.h" diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c index be0f382..7df4c63 100644 --- a/drivers/net/tsec.c +++ b/drivers/net/tsec.c @@ -16,7 +16,7 @@ #include <command.h> #include <tsec.h> #include <fsl_mdio.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/processor.h> #include <asm/io.h> diff --git a/drivers/net/vsc7385.c b/drivers/net/vsc7385.c index c6d6dce..0724210 100644 --- a/drivers/net/vsc7385.c +++ b/drivers/net/vsc7385.c @@ -16,7 +16,7 @@ #include <common.h> #include <console.h> #include <asm/io.h> -#include <asm/errno.h> +#include <linux/errno.h> #include "vsc7385.h" /* diff --git a/drivers/net/xilinx_emaclite.c b/drivers/net/xilinx_emaclite.c index 7b85aa0..78ff44c 100644 --- a/drivers/net/xilinx_emaclite.c +++ b/drivers/net/xilinx_emaclite.c @@ -17,8 +17,9 @@ #include <phy.h> #include <miiphy.h> #include <fdtdec.h> -#include <asm-generic/errno.h> +#include <linux/errno.h> #include <linux/kernel.h> +#include <asm/io.h> DECLARE_GLOBAL_DATA_PTR; @@ -154,7 +155,7 @@ static int wait_for_bit(const char *func, u32 *reg, const u32 mask, unsigned long start = get_timer(0); while (1) { - val = readl(reg); + val = __raw_readl(reg); if (!set) val = ~val; @@ -193,16 +194,17 @@ static u32 phyread(struct xemaclite *emaclite, u32 phyaddress, u32 registernum, if (mdio_wait(regs)) return 1; - u32 ctrl_reg = in_be32(®s->mdioctrl); - out_be32(®s->mdioaddr, XEL_MDIOADDR_OP_MASK | - ((phyaddress << XEL_MDIOADDR_PHYADR_SHIFT) | registernum)); - out_be32(®s->mdioctrl, ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK); + u32 ctrl_reg = __raw_readl(®s->mdioctrl); + __raw_writel(XEL_MDIOADDR_OP_MASK + | ((phyaddress << XEL_MDIOADDR_PHYADR_SHIFT) + | registernum), ®s->mdioaddr); + __raw_writel(ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK, ®s->mdioctrl); if (mdio_wait(regs)) return 1; /* Read data */ - *data = in_be32(®s->mdiord); + *data = __raw_readl(®s->mdiord); return 0; } @@ -220,11 +222,12 @@ static u32 phywrite(struct xemaclite *emaclite, u32 phyaddress, u32 registernum, * Data register. Finally, set the Status bit in the MDIO Control * register to start a MDIO write transaction. */ - u32 ctrl_reg = in_be32(®s->mdioctrl); - out_be32(®s->mdioaddr, ~XEL_MDIOADDR_OP_MASK & - ((phyaddress << XEL_MDIOADDR_PHYADR_SHIFT) | registernum)); - out_be32(®s->mdiowr, data); - out_be32(®s->mdioctrl, ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK); + u32 ctrl_reg = __raw_readl(®s->mdioctrl); + __raw_writel(~XEL_MDIOADDR_OP_MASK + & ((phyaddress << XEL_MDIOADDR_PHYADR_SHIFT) + | registernum), ®s->mdioaddr); + __raw_writel(data, ®s->mdiowr); + __raw_writel(ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK, ®s->mdioctrl); if (mdio_wait(regs)) return 1; @@ -327,27 +330,27 @@ static int emaclite_start(struct udevice *dev) * TX - TX_PING & TX_PONG initialization */ /* Restart PING TX */ - out_be32(®s->tx_ping_tsr, 0); + __raw_writel(0, ®s->tx_ping_tsr); /* Copy MAC address */ xemaclite_alignedwrite(pdata->enetaddr, ®s->tx_ping, ENET_ADDR_LENGTH); /* Set the length */ - out_be32(®s->tx_ping_tplr, ENET_ADDR_LENGTH); + __raw_writel(ENET_ADDR_LENGTH, ®s->tx_ping_tplr); /* Update the MAC address in the EMAC Lite */ - out_be32(®s->tx_ping_tsr, XEL_TSR_PROG_MAC_ADDR); + __raw_writel(XEL_TSR_PROG_MAC_ADDR, ®s->tx_ping_tsr); /* Wait for EMAC Lite to finish with the MAC address update */ - while ((in_be32 (®s->tx_ping_tsr) & + while ((__raw_readl(®s->tx_ping_tsr) & XEL_TSR_PROG_MAC_ADDR) != 0) ; if (emaclite->txpp) { /* The same operation with PONG TX */ - out_be32(®s->tx_pong_tsr, 0); + __raw_writel(0, ®s->tx_pong_tsr); xemaclite_alignedwrite(pdata->enetaddr, ®s->tx_pong, ENET_ADDR_LENGTH); - out_be32(®s->tx_pong_tplr, ENET_ADDR_LENGTH); - out_be32(®s->tx_pong_tsr, XEL_TSR_PROG_MAC_ADDR); - while ((in_be32(®s->tx_pong_tsr) & + __raw_writel(ENET_ADDR_LENGTH, ®s->tx_pong_tplr); + __raw_writel(XEL_TSR_PROG_MAC_ADDR, ®s->tx_pong_tsr); + while ((__raw_readl(®s->tx_pong_tsr) & XEL_TSR_PROG_MAC_ADDR) != 0) ; } @@ -356,13 +359,13 @@ static int emaclite_start(struct udevice *dev) * RX - RX_PING & RX_PONG initialization */ /* Write out the value to flush the RX buffer */ - out_be32(®s->rx_ping_rsr, XEL_RSR_RECV_IE_MASK); + __raw_writel(XEL_RSR_RECV_IE_MASK, ®s->rx_ping_rsr); if (emaclite->rxpp) - out_be32(®s->rx_pong_rsr, XEL_RSR_RECV_IE_MASK); + __raw_writel(XEL_RSR_RECV_IE_MASK, ®s->rx_pong_rsr); - out_be32(®s->mdioctrl, XEL_MDIOCTRL_MDIOEN_MASK); - if (in_be32(®s->mdioctrl) & XEL_MDIOCTRL_MDIOEN_MASK) + __raw_writel(XEL_MDIOCTRL_MDIOEN_MASK, ®s->mdioctrl); + if (__raw_readl(®s->mdioctrl) & XEL_MDIOCTRL_MDIOEN_MASK) if (!setup_phy(dev)) return -1; @@ -379,9 +382,9 @@ static int xemaclite_txbufferavailable(struct xemaclite *emaclite) * Read the other buffer register * and determine if the other buffer is available */ - tmp = ~in_be32(®s->tx_ping_tsr); + tmp = ~__raw_readl(®s->tx_ping_tsr); if (emaclite->txpp) - tmp |= ~in_be32(®s->tx_pong_tsr); + tmp |= ~__raw_readl(®s->tx_pong_tsr); return !(tmp & XEL_TSR_XMIT_BUSY_MASK); } @@ -405,40 +408,42 @@ static int emaclite_send(struct udevice *dev, void *ptr, int len) if (!maxtry) { printf("Error: Timeout waiting for ethernet TX buffer\n"); /* Restart PING TX */ - out_be32(®s->tx_ping_tsr, 0); + __raw_writel(0, ®s->tx_ping_tsr); if (emaclite->txpp) { - out_be32(®s->tx_pong_tsr, 0); + __raw_writel(0, ®s->tx_pong_tsr); } return -1; } /* Determine if the expected buffer address is empty */ - reg = in_be32(®s->tx_ping_tsr); + reg = __raw_readl(®s->tx_ping_tsr); if ((reg & XEL_TSR_XMIT_BUSY_MASK) == 0) { debug("Send packet from tx_ping buffer\n"); /* Write the frame to the buffer */ xemaclite_alignedwrite(ptr, ®s->tx_ping, len); - out_be32(®s->tx_ping_tplr, len & - (XEL_TPLR_LENGTH_MASK_HI | XEL_TPLR_LENGTH_MASK_LO)); - reg = in_be32(®s->tx_ping_tsr); + __raw_writel(len + & (XEL_TPLR_LENGTH_MASK_HI | XEL_TPLR_LENGTH_MASK_LO), + ®s->tx_ping_tplr); + reg = __raw_readl(®s->tx_ping_tsr); reg |= XEL_TSR_XMIT_BUSY_MASK; - out_be32(®s->tx_ping_tsr, reg); + __raw_writel(reg, ®s->tx_ping_tsr); return 0; } if (emaclite->txpp) { /* Determine if the expected buffer address is empty */ - reg = in_be32(®s->tx_pong_tsr); + reg = __raw_readl(®s->tx_pong_tsr); if ((reg & XEL_TSR_XMIT_BUSY_MASK) == 0) { debug("Send packet from tx_pong buffer\n"); /* Write the frame to the buffer */ xemaclite_alignedwrite(ptr, ®s->tx_pong, len); - out_be32(®s->tx_pong_tplr, len & + __raw_writel(len & (XEL_TPLR_LENGTH_MASK_HI | - XEL_TPLR_LENGTH_MASK_LO)); - reg = in_be32(®s->tx_pong_tsr); + XEL_TPLR_LENGTH_MASK_LO), + ®s->tx_pong_tplr); + reg = __raw_readl(®s->tx_pong_tsr); reg |= XEL_TSR_XMIT_BUSY_MASK; - out_be32(®s->tx_pong_tsr, reg); + __raw_writel(reg, ®s->tx_pong_tsr); return 0; } } @@ -458,7 +463,7 @@ static int emaclite_recv(struct udevice *dev, int flags, uchar **packetp) try_again: if (!emaclite->use_rx_pong_buffer_next) { - reg = in_be32(®s->rx_ping_rsr); + reg = __raw_readl(®s->rx_ping_rsr); debug("Testing data at rx_ping\n"); if ((reg & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) { debug("Data found in rx_ping buffer\n"); @@ -478,7 +483,7 @@ try_again: goto try_again; } } else { - reg = in_be32(®s->rx_pong_rsr); + reg = __raw_readl(®s->rx_pong_rsr); debug("Testing data at rx_pong\n"); if ((reg & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) { debug("Data found in rx_pong buffer\n"); @@ -525,9 +530,9 @@ try_again: length - first_read); /* Acknowledge the frame */ - reg = in_be32(ack); + reg = __raw_readl(ack); reg &= ~XEL_RSR_RECV_DONE_MASK; - out_be32(ack, reg); + __raw_writel(reg, ack); debug("Packet receive from 0x%p, length %dB\n", addr, length); *packetp = etherrxbuff; @@ -595,7 +600,8 @@ static int emaclite_ofdata_to_platdata(struct udevice *dev) int offset = 0; pdata->iobase = (phys_addr_t)dev_get_addr(dev); - emaclite->regs = (struct emaclite_regs *)pdata->iobase; + emaclite->regs = (struct emaclite_regs *)ioremap_nocache(pdata->iobase, + 0x10000); emaclite->phyaddr = -1; diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index 519699d..8b7c1be 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -24,7 +24,7 @@ #include <asm/system.h> #include <asm/arch/hardware.h> #include <asm/arch/sys_proto.h> -#include <asm-generic/errno.h> +#include <linux/errno.h> DECLARE_GLOBAL_DATA_PTR; diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig index 669e37b..9a7c187 100644 --- a/drivers/pci/Kconfig +++ b/drivers/pci/Kconfig @@ -39,4 +39,11 @@ config PCI_TEGRA with a total of 5 lanes. Some boards require this for Ethernet support to work (e.g. beaver, jetson-tk1). +config PCI_XILINX + bool "Xilinx AXI Bridge for PCI Express" + depends on DM_PCI + help + Enable support for the Xilinx AXI bridge for PCI express, an IP block + which can be used on some generations of Xilinx FPGAs. + endmenu diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile index f8be9bf..9583e91 100644 --- a/drivers/pci/Makefile +++ b/drivers/pci/Makefile @@ -31,3 +31,4 @@ obj-$(CONFIG_PCI_TEGRA) += pci_tegra.o obj-$(CONFIG_TSI108_PCI) += tsi108_pci.o obj-$(CONFIG_WINBOND_83C553) += w83c553f.o obj-$(CONFIG_PCIE_LAYERSCAPE) += pcie_layerscape.o +obj-$(CONFIG_PCI_XILINX) += pcie_xilinx.o diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c index 342b78c..3b00e6a 100644 --- a/drivers/pci/pci-uclass.c +++ b/drivers/pci/pci-uclass.c @@ -837,7 +837,7 @@ static int pci_uclass_pre_probe(struct udevice *bus) hose = bus->uclass_priv; /* For bridges, use the top-level PCI controller */ - if (device_get_uclass_id(bus->parent) == UCLASS_ROOT) { + if (!device_is_on_pci_bus(bus)) { hose->ctlr = bus; ret = decode_regions(hose, gd->fdt_blob, bus->parent->of_offset, bus->of_offset); diff --git a/drivers/pci/pci_mvebu.c b/drivers/pci/pci_mvebu.c index 4eedfe1..0f44970 100644 --- a/drivers/pci/pci_mvebu.c +++ b/drivers/pci/pci_mvebu.c @@ -12,7 +12,7 @@ #include <common.h> #include <pci.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/io.h> #include <asm/arch/cpu.h> #include <asm/arch/soc.h> diff --git a/drivers/pci/pcie_xilinx.c b/drivers/pci/pcie_xilinx.c new file mode 100644 index 0000000..5216001 --- /dev/null +++ b/drivers/pci/pcie_xilinx.c @@ -0,0 +1,220 @@ +/* + * Xilinx AXI Bridge for PCI Express Driver + * + * Copyright (C) 2016 Imagination Technologies + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#include <common.h> +#include <dm.h> +#include <pci.h> + +#include <asm/io.h> + +/** + * struct xilinx_pcie - Xilinx PCIe controller state + * @hose: The parent classes PCI controller state + * @cfg_base: The base address of memory mapped configuration space + */ +struct xilinx_pcie { + struct pci_controller hose; + void *cfg_base; +}; + +/* Register definitions */ +#define XILINX_PCIE_REG_PSCR 0x144 +#define XILINX_PCIE_REG_PSCR_LNKUP BIT(11) + +/** + * pcie_xilinx_link_up() - Check whether the PCIe link is up + * @pcie: Pointer to the PCI controller state + * + * Checks whether the PCIe link for the given device is up or down. + * + * Return: true if the link is up, else false + */ +static bool pcie_xilinx_link_up(struct xilinx_pcie *pcie) +{ + uint32_t pscr = __raw_readl(pcie->cfg_base + XILINX_PCIE_REG_PSCR); + + return pscr & XILINX_PCIE_REG_PSCR_LNKUP; +} + +/** + * pcie_xilinx_config_address() - Calculate the address of a config access + * @pcie: Pointer to the PCI controller state + * @bdf: Identifies the PCIe device to access + * @offset: The offset into the device's configuration space + * @paddress: Pointer to the pointer to write the calculates address to + * + * Calculates the address that should be accessed to perform a PCIe + * configuration space access for a given device identified by the PCIe + * controller device @pcie and the bus, device & function numbers in @bdf. If + * access to the device is not valid then the function will return an error + * code. Otherwise the address to access will be written to the pointer pointed + * to by @paddress. + * + * Return: 0 on success, else -ENODEV + */ +static int pcie_xilinx_config_address(struct xilinx_pcie *pcie, pci_dev_t bdf, + uint offset, void **paddress) +{ + unsigned int bus = PCI_BUS(bdf); + unsigned int dev = PCI_DEV(bdf); + unsigned int func = PCI_FUNC(bdf); + void *addr; + + if ((bus > 0) && !pcie_xilinx_link_up(pcie)) + return -ENODEV; + + /* + * Busses 0 (host-PCIe bridge) & 1 (its immediate child) are + * limited to a single device each. + */ + if ((bus < 2) && (dev > 0)) + return -ENODEV; + + addr = pcie->cfg_base; + addr += bus << 20; + addr += dev << 15; + addr += func << 12; + addr += offset; + *paddress = addr; + + return 0; +} + +/** + * pcie_xilinx_read_config() - Read from configuration space + * @pcie: Pointer to the PCI controller state + * @bdf: Identifies the PCIe device to access + * @offset: The offset into the device's configuration space + * @valuep: A pointer at which to store the read value + * @size: Indicates the size of access to perform + * + * Read a value of size @size from offset @offset within the configuration + * space of the device identified by the bus, device & function numbers in @bdf + * on the PCI bus @bus. + * + * Return: 0 on success, else -ENODEV or -EINVAL + */ +static int pcie_xilinx_read_config(struct udevice *bus, pci_dev_t bdf, + uint offset, ulong *valuep, + enum pci_size_t size) +{ + struct xilinx_pcie *pcie = dev_get_priv(bus); + void *address; + int err; + + err = pcie_xilinx_config_address(pcie, bdf, offset, &address); + if (err < 0) { + *valuep = pci_get_ff(size); + return 0; + } + + switch (size) { + case PCI_SIZE_8: + *valuep = __raw_readb(address); + return 0; + case PCI_SIZE_16: + *valuep = __raw_readw(address); + return 0; + case PCI_SIZE_32: + *valuep = __raw_readl(address); + return 0; + default: + return -EINVAL; + } +} + +/** + * pcie_xilinx_write_config() - Write to configuration space + * @pcie: Pointer to the PCI controller state + * @bdf: Identifies the PCIe device to access + * @offset: The offset into the device's configuration space + * @value: The value to write + * @size: Indicates the size of access to perform + * + * Write the value @value of size @size from offset @offset within the + * configuration space of the device identified by the bus, device & function + * numbers in @bdf on the PCI bus @bus. + * + * Return: 0 on success, else -ENODEV or -EINVAL + */ +static int pcie_xilinx_write_config(struct udevice *bus, pci_dev_t bdf, + uint offset, ulong value, + enum pci_size_t size) +{ + struct xilinx_pcie *pcie = dev_get_priv(bus); + void *address; + int err; + + err = pcie_xilinx_config_address(pcie, bdf, offset, &address); + if (err < 0) + return 0; + + switch (size) { + case PCI_SIZE_8: + __raw_writeb(value, address); + return 0; + case PCI_SIZE_16: + __raw_writew(value, address); + return 0; + case PCI_SIZE_32: + __raw_writel(value, address); + return 0; + default: + return -EINVAL; + } +} + +/** + * pcie_xilinx_ofdata_to_platdata() - Translate from DT to device state + * @dev: A pointer to the device being operated on + * + * Translate relevant data from the device tree pertaining to device @dev into + * state that the driver will later make use of. This state is stored in the + * device's private data structure. + * + * Return: 0 on success, else -EINVAL + */ +static int pcie_xilinx_ofdata_to_platdata(struct udevice *dev) +{ + struct xilinx_pcie *pcie = dev_get_priv(dev); + struct fdt_resource reg_res; + DECLARE_GLOBAL_DATA_PTR; + int err; + + err = fdt_get_resource(gd->fdt_blob, dev->of_offset, "reg", + 0, ®_res); + if (err < 0) { + error("\"reg\" resource not found\n"); + return err; + } + + pcie->cfg_base = map_physmem(reg_res.start, + fdt_resource_size(®_res), + MAP_NOCACHE); + + return 0; +} + +static const struct dm_pci_ops pcie_xilinx_ops = { + .read_config = pcie_xilinx_read_config, + .write_config = pcie_xilinx_write_config, +}; + +static const struct udevice_id pcie_xilinx_ids[] = { + { .compatible = "xlnx,axi-pcie-host-1.00.a" }, + { } +}; + +U_BOOT_DRIVER(pcie_xilinx) = { + .name = "pcie_xilinx", + .id = UCLASS_PCI, + .of_match = pcie_xilinx_ids, + .ops = &pcie_xilinx_ops, + .ofdata_to_platdata = pcie_xilinx_ofdata_to_platdata, + .priv_auto_alloc_size = sizeof(struct xilinx_pcie), +}; diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index f8cfd4b..12be3cf 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig @@ -148,6 +148,15 @@ config PINCTRL_AT91PIO4 This option is to enable the AT91 pinctrl driver for AT91 PIO4 controller which is available on SAMA5D2 SoC. +config ROCKCHIP_RK3399_PINCTRL + bool "Rockchip pin control driver" + depends on DM + help + Support pin multiplexing control on Rockchip rk3399 SoCs. The driver + is controlled by a device tree node which contains both the GPIO + definitions and pin control functions for each available multiplex + function. + config PINCTRL_SANDBOX bool "Sandbox pinctrl driver" depends on SANDBOX diff --git a/drivers/pinctrl/rockchip/Makefile b/drivers/pinctrl/rockchip/Makefile index 64e9587..805c833 100644 --- a/drivers/pinctrl/rockchip/Makefile +++ b/drivers/pinctrl/rockchip/Makefile @@ -7,3 +7,4 @@ obj-$(CONFIG_ROCKCHIP_RK3036_PINCTRL) += pinctrl_rk3036.o obj-$(CONFIG_ROCKCHIP_RK3288_PINCTRL) += pinctrl_rk3288.o +obj-$(CONFIG_ROCKCHIP_RK3399_PINCTRL) += pinctrl_rk3399.o diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3399.c b/drivers/pinctrl/rockchip/pinctrl_rk3399.c new file mode 100644 index 0000000..17ea165 --- /dev/null +++ b/drivers/pinctrl/rockchip/pinctrl_rk3399.c @@ -0,0 +1,439 @@ +/* + * (C) Copyright 2016 Rockchip Electronics Co., Ltd + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <dm.h> +#include <errno.h> +#include <syscon.h> +#include <asm/io.h> +#include <asm/arch/grf_rk3399.h> +#include <asm/arch/hardware.h> +#include <asm/arch/periph.h> +#include <asm/arch/clock.h> +#include <dm/pinctrl.h> + +DECLARE_GLOBAL_DATA_PTR; + +struct rk3399_pinctrl_priv { + struct rk3399_grf_regs *grf; + struct rk3399_pmugrf_regs *pmugrf; +}; + +enum { + /* GRF_GPIO2B_IOMUX */ + GRF_GPIO2B1_SEL_SHIFT = 0, + GRF_GPIO2B1_SEL_MASK = 3 << GRF_GPIO2B1_SEL_SHIFT, + GRF_SPI2TPM_RXD = 1, + GRF_GPIO2B2_SEL_SHIFT = 2, + GRF_GPIO2B2_SEL_MASK = 3 << GRF_GPIO2B2_SEL_SHIFT, + GRF_SPI2TPM_TXD = 1, + GRF_GPIO2B3_SEL_SHIFT = 6, + GRF_GPIO2B3_SEL_MASK = 3 << GRF_GPIO2B3_SEL_SHIFT, + GRF_SPI2TPM_CLK = 1, + GRF_GPIO2B4_SEL_SHIFT = 8, + GRF_GPIO2B4_SEL_MASK = 3 << GRF_GPIO2B4_SEL_SHIFT, + GRF_SPI2TPM_CSN0 = 1, + + /* GRF_GPIO3A_IOMUX */ + GRF_GPIO3A4_SEL_SHIFT = 8, + GRF_GPIO3A4_SEL_MASK = 3 << GRF_GPIO3A4_SEL_SHIFT, + GRF_SPI0NORCODEC_RXD = 2, + GRF_GPIO3A5_SEL_SHIFT = 10, + GRF_GPIO3A5_SEL_MASK = 3 << GRF_GPIO3A5_SEL_SHIFT, + GRF_SPI0NORCODEC_TXD = 2, + GRF_GPIO3A6_SEL_SHIFT = 12, + GRF_GPIO3A6_SEL_MASK = 3 << GRF_GPIO3A6_SEL_SHIFT, + GRF_SPI0NORCODEC_CLK = 2, + GRF_GPIO3A7_SEL_SHIFT = 14, + GRF_GPIO3A7_SEL_MASK = 3 << GRF_GPIO3A7_SEL_SHIFT, + GRF_SPI0NORCODEC_CSN0 = 2, + + /* GRF_GPIO3B_IOMUX */ + GRF_GPIO3B0_SEL_SHIFT = 0, + GRF_GPIO3B0_SEL_MASK = 3 << GRF_GPIO3B0_SEL_SHIFT, + GRF_SPI0NORCODEC_CSN1 = 2, + + /* GRF_GPIO4B_IOMUX */ + GRF_GPIO4B0_SEL_SHIFT = 0, + GRF_GPIO4B0_SEL_MASK = 3 << GRF_GPIO4B0_SEL_SHIFT, + GRF_SDMMC_DATA0 = 1, + GRF_UART2DBGA_SIN = 2, + GRF_GPIO4B1_SEL_SHIFT = 2, + GRF_GPIO4B1_SEL_MASK = 3 << GRF_GPIO4B1_SEL_SHIFT, + GRF_SDMMC_DATA1 = 1, + GRF_UART2DBGA_SOUT = 2, + GRF_GPIO4B2_SEL_SHIFT = 4, + GRF_GPIO4B2_SEL_MASK = 3 << GRF_GPIO4B2_SEL_SHIFT, + GRF_SDMMC_DATA2 = 1, + GRF_GPIO4B3_SEL_SHIFT = 6, + GRF_GPIO4B3_SEL_MASK = 3 << GRF_GPIO4B3_SEL_SHIFT, + GRF_SDMMC_DATA3 = 1, + GRF_GPIO4B4_SEL_SHIFT = 8, + GRF_GPIO4B4_SEL_MASK = 3 << GRF_GPIO4B4_SEL_SHIFT, + GRF_SDMMC_CLKOUT = 1, + GRF_GPIO4B5_SEL_SHIFT = 10, + GRF_GPIO4B5_SEL_MASK = 3 << GRF_GPIO4B5_SEL_SHIFT, + GRF_SDMMC_CMD = 1, + + /* GRF_GPIO4C_IOMUX */ + GRF_GPIO4C2_SEL_SHIFT = 4, + GRF_GPIO4C2_SEL_MASK = 3 << GRF_GPIO4C2_SEL_SHIFT, + GRF_PWM_0 = 1, + GRF_GPIO4C3_SEL_SHIFT = 6, + GRF_GPIO4C3_SEL_MASK = 3 << GRF_GPIO4C3_SEL_SHIFT, + GRF_UART2DGBC_SIN = 1, + GRF_GPIO4C4_SEL_SHIFT = 8, + GRF_GPIO4C4_SEL_MASK = 3 << GRF_GPIO4C4_SEL_SHIFT, + GRF_UART2DBGC_SOUT = 1, + GRF_GPIO4C6_SEL_SHIFT = 12, + GRF_GPIO4C6_SEL_MASK = 3 << GRF_GPIO4C6_SEL_SHIFT, + GRF_PWM_1 = 1, + + /* PMUGRF_GPIO0A_IOMUX */ + PMUGRF_GPIO0A6_SEL_SHIFT = 12, + PMUGRF_GPIO0A6_SEL_MASK = 3 << PMUGRF_GPIO0A6_SEL_SHIFT, + PMUGRF_PWM_3A = 1, + + /* PMUGRF_GPIO1A_IOMUX */ + PMUGRF_GPIO1A7_SEL_SHIFT = 14, + PMUGRF_GPIO1A7_SEL_MASK = 3 << PMUGRF_GPIO1A7_SEL_SHIFT, + PMUGRF_SPI1EC_RXD = 2, + + /* PMUGRF_GPIO1B_IOMUX */ + PMUGRF_GPIO1B0_SEL_SHIFT = 0, + PMUGRF_GPIO1B0_SEL_MASK = 3 << PMUGRF_GPIO1B0_SEL_SHIFT, + PMUGRF_SPI1EC_TXD = 2, + PMUGRF_GPIO1B1_SEL_SHIFT = 2, + PMUGRF_GPIO1B1_SEL_MASK = 3 << PMUGRF_GPIO1B1_SEL_SHIFT, + PMUGRF_SPI1EC_CLK = 2, + PMUGRF_GPIO1B2_SEL_SHIFT = 4, + PMUGRF_GPIO1B2_SEL_MASK = 3 << PMUGRF_GPIO1B2_SEL_SHIFT, + PMUGRF_SPI1EC_CSN0 = 2, + PMUGRF_GPIO1B6_SEL_SHIFT = 12, + PMUGRF_GPIO1B6_SEL_MASK = 3 << PMUGRF_GPIO1B6_SEL_SHIFT, + PMUGRF_PWM_3B = 1, + PMUGRF_GPIO1B7_SEL_SHIFT = 14, + PMUGRF_GPIO1B7_SEL_MASK = 3 << PMUGRF_GPIO1B7_SEL_SHIFT, + PMUGRF_I2C0PMU_SDA = 2, + + /* PMUGRF_GPIO1C_IOMUX */ + PMUGRF_GPIO1C0_SEL_SHIFT = 0, + PMUGRF_GPIO1C0_SEL_MASK = 3 << PMUGRF_GPIO1C0_SEL_SHIFT, + PMUGRF_I2C0PMU_SCL = 2, + PMUGRF_GPIO1C3_SEL_SHIFT = 6, + PMUGRF_GPIO1C3_SEL_MASK = 3 << PMUGRF_GPIO1C3_SEL_SHIFT, + PMUGRF_PWM_2 = 1, + +}; +static void pinctrl_rk3399_pwm_config(struct rk3399_grf_regs *grf, + struct rk3399_pmugrf_regs *pmugrf, int pwm_id) +{ + switch (pwm_id) { + case PERIPH_ID_PWM0: + rk_clrsetreg(&grf->gpio4c_iomux, + GRF_GPIO4C2_SEL_MASK, + GRF_PWM_0 << GRF_GPIO4C2_SEL_SHIFT); + break; + case PERIPH_ID_PWM1: + rk_clrsetreg(&grf->gpio4c_iomux, + GRF_GPIO4C6_SEL_MASK, + GRF_PWM_1 << GRF_GPIO4C6_SEL_SHIFT); + break; + case PERIPH_ID_PWM2: + rk_clrsetreg(&pmugrf->gpio1c_iomux, + PMUGRF_GPIO1C3_SEL_MASK, + PMUGRF_PWM_2 << PMUGRF_GPIO1C3_SEL_SHIFT); + break; + case PERIPH_ID_PWM3: + if (readl(&pmugrf->soc_con0) & (1 << 5)) + rk_clrsetreg(&pmugrf->gpio1b_iomux, + PMUGRF_GPIO1B6_SEL_MASK, + PMUGRF_PWM_3B << PMUGRF_GPIO1B6_SEL_SHIFT); + else + rk_clrsetreg(&pmugrf->gpio0a_iomux, + PMUGRF_GPIO0A6_SEL_MASK, + PMUGRF_PWM_3A << PMUGRF_GPIO0A6_SEL_SHIFT); + break; + default: + debug("pwm id = %d iomux error!\n", pwm_id); + break; + } +} + +static void pinctrl_rk3399_i2c_config(struct rk3399_grf_regs *grf, + struct rk3399_pmugrf_regs *pmugrf, + int i2c_id) +{ + switch (i2c_id) { + case PERIPH_ID_I2C0: + rk_clrsetreg(&pmugrf->gpio1b_iomux, + PMUGRF_GPIO1B7_SEL_MASK, + PMUGRF_I2C0PMU_SDA << PMUGRF_GPIO1B7_SEL_SHIFT); + rk_clrsetreg(&pmugrf->gpio1c_iomux, + PMUGRF_GPIO1C0_SEL_MASK, + PMUGRF_I2C0PMU_SCL << PMUGRF_GPIO1C0_SEL_SHIFT); + break; + case PERIPH_ID_I2C1: + case PERIPH_ID_I2C2: + case PERIPH_ID_I2C3: + case PERIPH_ID_I2C4: + case PERIPH_ID_I2C5: + default: + debug("i2c id = %d iomux error!\n", i2c_id); + break; + } +} + +static void pinctrl_rk3399_lcdc_config(struct rk3399_grf_regs *grf, int lcd_id) +{ + switch (lcd_id) { + case PERIPH_ID_LCDC0: + break; + default: + debug("lcdc id = %d iomux error!\n", lcd_id); + break; + } +} + +static int pinctrl_rk3399_spi_config(struct rk3399_grf_regs *grf, + struct rk3399_pmugrf_regs *pmugrf, + enum periph_id spi_id, int cs) +{ + switch (spi_id) { + case PERIPH_ID_SPI0: + switch (cs) { + case 0: + rk_clrsetreg(&grf->gpio3a_iomux, + GRF_GPIO3A7_SEL_MASK, + GRF_SPI0NORCODEC_CSN0 + << GRF_GPIO3A7_SEL_SHIFT); + break; + case 1: + rk_clrsetreg(&grf->gpio3b_iomux, + GRF_GPIO3B0_SEL_MASK, + GRF_SPI0NORCODEC_CSN1 + << GRF_GPIO3B0_SEL_SHIFT); + break; + default: + goto err; + } + rk_clrsetreg(&grf->gpio3a_iomux, + GRF_GPIO3A4_SEL_MASK | GRF_GPIO3A5_SEL_SHIFT + | GRF_GPIO3A6_SEL_SHIFT, + GRF_SPI0NORCODEC_RXD << GRF_GPIO3A4_SEL_SHIFT + | GRF_SPI0NORCODEC_RXD << GRF_GPIO3A5_SEL_SHIFT + | GRF_SPI0NORCODEC_RXD << GRF_GPIO3A6_SEL_SHIFT); + break; + case PERIPH_ID_SPI1: + if (cs != 0) + goto err; + rk_clrsetreg(&pmugrf->gpio1a_iomux, + PMUGRF_GPIO1A7_SEL_MASK, + PMUGRF_SPI1EC_RXD << PMUGRF_GPIO1A7_SEL_SHIFT); + rk_clrsetreg(&pmugrf->gpio1b_iomux, + PMUGRF_GPIO1B0_SEL_MASK | PMUGRF_GPIO1B1_SEL_MASK + | PMUGRF_GPIO1B2_SEL_MASK, + PMUGRF_SPI1EC_TXD << PMUGRF_GPIO1B0_SEL_SHIFT + | PMUGRF_SPI1EC_CLK << PMUGRF_GPIO1B1_SEL_SHIFT + | PMUGRF_SPI1EC_CSN0 << PMUGRF_GPIO1B2_SEL_SHIFT); + break; + case PERIPH_ID_SPI2: + if (cs != 0) + goto err; + rk_clrsetreg(&grf->gpio2b_iomux, + GRF_GPIO2B1_SEL_MASK | GRF_GPIO2B2_SEL_MASK + | GRF_GPIO2B3_SEL_MASK | GRF_GPIO2B4_SEL_MASK, + GRF_SPI2TPM_RXD << GRF_GPIO2B1_SEL_SHIFT + | GRF_SPI2TPM_TXD << GRF_GPIO2B2_SEL_SHIFT + | GRF_SPI2TPM_CLK << GRF_GPIO2B3_SEL_SHIFT + | GRF_SPI2TPM_CSN0 << GRF_GPIO2B4_SEL_SHIFT); + break; + default: + goto err; + } + + return 0; +err: + debug("rkspi: periph%d cs=%d not supported", spi_id, cs); + return -ENOENT; +} + +static void pinctrl_rk3399_uart_config(struct rk3399_grf_regs *grf, + struct rk3399_pmugrf_regs *pmugrf, + int uart_id) +{ + switch (uart_id) { + case PERIPH_ID_UART2: + /* Using channel-C by default */ + rk_clrsetreg(&grf->gpio4c_iomux, + GRF_GPIO4C3_SEL_MASK, + GRF_UART2DGBC_SIN << GRF_GPIO4C3_SEL_SHIFT); + rk_clrsetreg(&grf->gpio4c_iomux, + GRF_GPIO4C4_SEL_MASK, + GRF_UART2DBGC_SOUT << GRF_GPIO4C4_SEL_SHIFT); + break; + case PERIPH_ID_UART0: + case PERIPH_ID_UART1: + case PERIPH_ID_UART3: + case PERIPH_ID_UART4: + default: + debug("uart id = %d iomux error!\n", uart_id); + break; + } +} + +static void pinctrl_rk3399_sdmmc_config(struct rk3399_grf_regs *grf, int mmc_id) +{ + switch (mmc_id) { + case PERIPH_ID_EMMC: + break; + case PERIPH_ID_SDCARD: + rk_clrsetreg(&grf->gpio4b_iomux, + GRF_GPIO4B0_SEL_MASK | GRF_GPIO4B1_SEL_MASK + | GRF_GPIO4B2_SEL_MASK | GRF_GPIO4B3_SEL_MASK + | GRF_GPIO4B4_SEL_MASK | GRF_GPIO4B5_SEL_MASK, + GRF_SDMMC_DATA0 << GRF_GPIO4B0_SEL_SHIFT + | GRF_SDMMC_DATA1 << GRF_GPIO4B1_SEL_SHIFT + | GRF_SDMMC_DATA2 << GRF_GPIO4B2_SEL_SHIFT + | GRF_SDMMC_DATA3 << GRF_GPIO4B3_SEL_SHIFT + | GRF_SDMMC_CLKOUT << GRF_GPIO4B4_SEL_SHIFT + | GRF_SDMMC_CMD << GRF_GPIO4B5_SEL_SHIFT); + break; + default: + debug("mmc id = %d iomux error!\n", mmc_id); + break; + } +} + +static int rk3399_pinctrl_request(struct udevice *dev, int func, int flags) +{ + struct rk3399_pinctrl_priv *priv = dev_get_priv(dev); + + debug("%s: func=%x, flags=%x\n", __func__, func, flags); + switch (func) { + case PERIPH_ID_PWM0: + case PERIPH_ID_PWM1: + case PERIPH_ID_PWM2: + case PERIPH_ID_PWM3: + case PERIPH_ID_PWM4: + pinctrl_rk3399_pwm_config(priv->grf, priv->pmugrf, func); + break; + case PERIPH_ID_I2C0: + case PERIPH_ID_I2C1: + case PERIPH_ID_I2C2: + case PERIPH_ID_I2C3: + case PERIPH_ID_I2C4: + case PERIPH_ID_I2C5: + pinctrl_rk3399_i2c_config(priv->grf, priv->pmugrf, func); + break; + case PERIPH_ID_SPI0: + case PERIPH_ID_SPI1: + case PERIPH_ID_SPI2: + pinctrl_rk3399_spi_config(priv->grf, priv->pmugrf, func, flags); + break; + case PERIPH_ID_UART0: + case PERIPH_ID_UART1: + case PERIPH_ID_UART2: + case PERIPH_ID_UART3: + case PERIPH_ID_UART4: + pinctrl_rk3399_uart_config(priv->grf, priv->pmugrf, func); + break; + case PERIPH_ID_LCDC0: + case PERIPH_ID_LCDC1: + pinctrl_rk3399_lcdc_config(priv->grf, func); + break; + case PERIPH_ID_SDMMC0: + case PERIPH_ID_SDMMC1: + pinctrl_rk3399_sdmmc_config(priv->grf, func); + break; + default: + return -EINVAL; + } + + return 0; +} + +static int rk3399_pinctrl_get_periph_id(struct udevice *dev, + struct udevice *periph) +{ + u32 cell[3]; + int ret; + + ret = fdtdec_get_int_array(gd->fdt_blob, periph->of_offset, + "interrupts", cell, ARRAY_SIZE(cell)); + if (ret < 0) + return -EINVAL; + + switch (cell[1]) { + case 68: + return PERIPH_ID_SPI0; + case 53: + return PERIPH_ID_SPI1; + case 52: + return PERIPH_ID_SPI2; + case 57: + return PERIPH_ID_I2C0; + case 59: /* Note strange order */ + return PERIPH_ID_I2C1; + case 35: + return PERIPH_ID_I2C2; + case 34: + return PERIPH_ID_I2C3; + case 56: + return PERIPH_ID_I2C4; + case 38: + return PERIPH_ID_I2C5; + case 65: + return PERIPH_ID_SDMMC1; + } + + return -ENOENT; +} + +static int rk3399_pinctrl_set_state_simple(struct udevice *dev, + struct udevice *periph) +{ + int func; + + func = rk3399_pinctrl_get_periph_id(dev, periph); + if (func < 0) + return func; + + return rk3399_pinctrl_request(dev, func, 0); +} + +static struct pinctrl_ops rk3399_pinctrl_ops = { + .set_state_simple = rk3399_pinctrl_set_state_simple, + .request = rk3399_pinctrl_request, + .get_periph_id = rk3399_pinctrl_get_periph_id, +}; + +static int rk3399_pinctrl_probe(struct udevice *dev) +{ + struct rk3399_pinctrl_priv *priv = dev_get_priv(dev); + int ret = 0; + + priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); + priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF); + debug("%s: grf=%p, pmugrf=%p\n", __func__, priv->grf, priv->pmugrf); + + return ret; +} + +static const struct udevice_id rk3399_pinctrl_ids[] = { + { .compatible = "rockchip,rk3399-pinctrl" }, + { } +}; + +U_BOOT_DRIVER(pinctrl_rk3399) = { + .name = "rockchip_rk3399_pinctrl", + .id = UCLASS_PINCTRL, + .of_match = rk3399_pinctrl_ids, + .priv_auto_alloc_size = sizeof(struct rk3399_pinctrl_priv), + .ops = &rk3399_pinctrl_ops, + .bind = dm_scan_fdt_dev, + .probe = rk3399_pinctrl_probe, +}; diff --git a/drivers/pinctrl/uniphier/Kconfig b/drivers/pinctrl/uniphier/Kconfig index 7febea2..689e576 100644 --- a/drivers/pinctrl/uniphier/Kconfig +++ b/drivers/pinctrl/uniphier/Kconfig @@ -3,6 +3,12 @@ if ARCH_UNIPHIER config PINCTRL_UNIPHIER bool +config PINCTRL_UNIPHIER_SLD3 + bool "UniPhier PH1-sLD3 SoC pinctrl driver" + depends on ARCH_UNIPHIER_SLD3 + default y + select PINCTRL_UNIPHIER + config PINCTRL_UNIPHIER_LD4 bool "UniPhier PH1-LD4 SoC pinctrl driver" depends on ARCH_UNIPHIER_LD4 diff --git a/drivers/pinctrl/uniphier/Makefile b/drivers/pinctrl/uniphier/Makefile index 4de251b..fd003ad 100644 --- a/drivers/pinctrl/uniphier/Makefile +++ b/drivers/pinctrl/uniphier/Makefile @@ -4,6 +4,7 @@ obj-y += pinctrl-uniphier-core.o +obj-$(CONFIG_PINCTRL_UNIPHIER_SLD3) += pinctrl-uniphier-sld3.o obj-$(CONFIG_PINCTRL_UNIPHIER_LD4) += pinctrl-uniphier-ld4.o obj-$(CONFIG_PINCTRL_UNIPHIER_PRO4) += pinctrl-uniphier-pro4.o obj-$(CONFIG_PINCTRL_UNIPHIER_SLD8) += pinctrl-uniphier-sld8.o diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c index 3f891f1..51144b8 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c @@ -13,6 +13,10 @@ #include "pinctrl-uniphier.h" +#define UNIPHIER_PINCTRL_PINMUX_BASE 0x1000 +#define UNIPHIER_PINCTRL_LOAD_PINMUX 0x1700 +#define UNIPHIER_PINCTRL_IECTRL 0x1d00 + static const char *uniphier_pinctrl_dummy_name = "_dummy"; static int uniphier_pinctrl_get_groups_count(struct udevice *dev) @@ -101,8 +105,10 @@ static void uniphier_pinmux_set_one(struct udevice *dev, unsigned pin, int muxval) { struct uniphier_pinctrl_priv *priv = dev_get_priv(dev); - unsigned mux_bits, reg_stride, reg, reg_end, shift, mask; - bool load_pinctrl; + unsigned reg, reg_end, shift, mask; + unsigned mux_bits = 8; + unsigned reg_stride = 4; + bool load_pinctrl = false; u32 tmp; /* some pins need input-enabling */ @@ -111,24 +117,18 @@ static void uniphier_pinmux_set_one(struct udevice *dev, unsigned pin, if (muxval < 0) return; /* dedicated pin; nothing to do for pin-mux */ + if (priv->socdata->caps & UNIPHIER_PINCTRL_CAPS_MUX_4BIT) + mux_bits = 4; + if (priv->socdata->caps & UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE) { /* * Mode offset bit * Normal 4 * n shift+3:shift * Debug 4 * n shift+7:shift+4 */ - mux_bits = 4; + mux_bits /= 2; reg_stride = 8; load_pinctrl = true; - } else { - /* - * Mode offset bit - * Normal 8 * n shift+3:shift - * Debug 8 * n + 4 shift+3:shift - */ - mux_bits = 8; - reg_stride = 4; - load_pinctrl = false; } reg = UNIPHIER_PINCTRL_PINMUX_BASE + pin * mux_bits / 32 * reg_stride; diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c index e42602b..1d318d8 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c @@ -28,6 +28,12 @@ static const int i2c4_muxvals[] = {1, 1}; static const unsigned nand_pins[] = {3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17}; static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; +static const unsigned system_bus_pins[] = {1, 2, 6, 7, 8, 9, 10, 11, 12, 13, + 14, 15, 16, 17}; +static const int system_bus_muxvals[] = {0, 0, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2}; +static const unsigned system_bus_cs1_pins[] = {0}; +static const int system_bus_cs1_muxvals[] = {0}; static const unsigned uart0_pins[] = {54, 55}; static const int uart0_muxvals[] = {0, 0}; static const unsigned uart1_pins[] = {58, 59}; @@ -52,6 +58,8 @@ static const struct uniphier_pinctrl_group uniphier_ld11_groups[] = { UNIPHIER_PINCTRL_GROUP(i2c3), UNIPHIER_PINCTRL_GROUP(i2c4), UNIPHIER_PINCTRL_GROUP(nand), + UNIPHIER_PINCTRL_GROUP_SPL(system_bus), + UNIPHIER_PINCTRL_GROUP_SPL(system_bus_cs1), UNIPHIER_PINCTRL_GROUP_SPL(uart0), UNIPHIER_PINCTRL_GROUP_SPL(uart1), UNIPHIER_PINCTRL_GROUP_SPL(uart2), @@ -69,6 +77,7 @@ static const char * const uniphier_ld11_functions[] = { UNIPHIER_PINMUX_FUNCTION(i2c3), UNIPHIER_PINMUX_FUNCTION(i2c4), UNIPHIER_PINMUX_FUNCTION(nand), + UNIPHIER_PINMUX_FUNCTION_SPL(system_bus), UNIPHIER_PINMUX_FUNCTION_SPL(uart0), UNIPHIER_PINMUX_FUNCTION_SPL(uart1), UNIPHIER_PINMUX_FUNCTION_SPL(uart2), diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c index d6ae512..4ca39e6 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c @@ -34,6 +34,12 @@ static const unsigned nand_pins[] = {3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; static const unsigned sd_pins[] = {10, 11, 12, 13, 14, 15, 16, 17}; static const int sd_muxvals[] = {3, 3, 3, 3, 3, 3, 3, 3}; /* No SDVOLC */ +static const unsigned system_bus_pins[] = {1, 2, 6, 7, 8, 9, 10, 11, 12, 13, + 14, 15, 16, 17}; +static const int system_bus_muxvals[] = {0, 0, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2}; +static const unsigned system_bus_cs1_pins[] = {0}; +static const int system_bus_cs1_muxvals[] = {0}; static const unsigned uart0_pins[] = {54, 55}; static const int uart0_muxvals[] = {0, 0}; static const unsigned uart1_pins[] = {58, 59}; @@ -62,6 +68,8 @@ static const struct uniphier_pinctrl_group uniphier_ld20_groups[] = { UNIPHIER_PINCTRL_GROUP(i2c4), UNIPHIER_PINCTRL_GROUP(nand), UNIPHIER_PINCTRL_GROUP(sd), + UNIPHIER_PINCTRL_GROUP_SPL(system_bus), + UNIPHIER_PINCTRL_GROUP_SPL(system_bus_cs1), UNIPHIER_PINCTRL_GROUP_SPL(uart0), UNIPHIER_PINCTRL_GROUP_SPL(uart1), UNIPHIER_PINCTRL_GROUP_SPL(uart2), @@ -82,6 +90,7 @@ static const char * const uniphier_ld20_functions[] = { UNIPHIER_PINMUX_FUNCTION(i2c4), UNIPHIER_PINMUX_FUNCTION(nand), UNIPHIER_PINMUX_FUNCTION(sd), + UNIPHIER_PINMUX_FUNCTION_SPL(system_bus), UNIPHIER_PINMUX_FUNCTION_SPL(uart0), UNIPHIER_PINMUX_FUNCTION_SPL(uart1), UNIPHIER_PINMUX_FUNCTION_SPL(uart2), diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c index 955858a..9b3db9d 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c @@ -51,6 +51,18 @@ static const unsigned nand_cs1_pins[] = {22, 23}; static const int nand_cs1_muxvals[] = {0, 0}; static const unsigned sd_pins[] = {44, 45, 46, 47, 48, 49, 50, 51, 52}; static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0}; +static const unsigned system_bus_pins[] = {16, 17, 18, 19, 20, 165, 166, 167, + 168, 169, 170, 171, 172, 173}; +static const int system_bus_muxvals[] = {0, 0, 0, 0, 0, -1, -1, -1, -1, -1, -1, + -1, -1, -1}; +static const unsigned system_bus_cs0_pins[] = {155}; +static const int system_bus_cs0_muxvals[] = {1}; +static const unsigned system_bus_cs1_pins[] = {174}; +static const int system_bus_cs1_muxvals[] = {-1}; +static const unsigned system_bus_cs2_pins[] = {64}; +static const int system_bus_cs2_muxvals[] = {1}; +static const unsigned system_bus_cs3_pins[] = {156}; +static const int system_bus_cs3_muxvals[] = {1}; static const unsigned uart0_pins[] = {85, 88}; static const int uart0_muxvals[] = {1, 1}; static const unsigned uart1_pins[] = {155, 156}; @@ -82,6 +94,11 @@ static const struct uniphier_pinctrl_group uniphier_ld4_groups[] = { UNIPHIER_PINCTRL_GROUP(nand), UNIPHIER_PINCTRL_GROUP(nand_cs1), UNIPHIER_PINCTRL_GROUP(sd), + UNIPHIER_PINCTRL_GROUP(system_bus), + UNIPHIER_PINCTRL_GROUP(system_bus_cs0), + UNIPHIER_PINCTRL_GROUP(system_bus_cs1), + UNIPHIER_PINCTRL_GROUP(system_bus_cs2), + UNIPHIER_PINCTRL_GROUP(system_bus_cs3), UNIPHIER_PINCTRL_GROUP_SPL(uart0), UNIPHIER_PINCTRL_GROUP_SPL(uart1), UNIPHIER_PINCTRL_GROUP_SPL(uart1b), @@ -103,6 +120,7 @@ static const char * const uniphier_ld4_functions[] = { UNIPHIER_PINMUX_FUNCTION(i2c3), UNIPHIER_PINMUX_FUNCTION(nand), UNIPHIER_PINMUX_FUNCTION(sd), + UNIPHIER_PINMUX_FUNCTION(system_bus), UNIPHIER_PINMUX_FUNCTION_SPL(uart0), UNIPHIER_PINMUX_FUNCTION_SPL(uart1), UNIPHIER_PINMUX_FUNCTION_SPL(uart2), diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c index 5f9407e..80d782c 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c @@ -48,6 +48,20 @@ static const unsigned nand_cs1_pins[] = {37, 38}; static const int nand_cs1_muxvals[] = {0, 0}; static const unsigned sd_pins[] = {47, 48, 49, 50, 51, 52, 53, 54, 55}; static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0}; +static const unsigned system_bus_pins[] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, + 11, 12, 13}; +static const int system_bus_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0}; +static const unsigned system_bus_cs1_pins[] = {14}; +static const int system_bus_cs1_muxvals[] = {0}; +static const unsigned system_bus_cs2_pins[] = {37}; +static const int system_bus_cs2_muxvals[] = {6}; +static const unsigned system_bus_cs3_pins[] = {38}; +static const int system_bus_cs3_muxvals[] = {6}; +static const unsigned system_bus_cs4_pins[] = {115}; +static const int system_bus_cs4_muxvals[] = {6}; +static const unsigned system_bus_cs5_pins[] = {55}; +static const int system_bus_cs5_muxvals[] = {6}; static const unsigned uart0_pins[] = {135, 136}; static const int uart0_muxvals[] = {3, 3}; static const unsigned uart0b_pins[] = {11, 12}; @@ -81,6 +95,12 @@ static const struct uniphier_pinctrl_group uniphier_ld6b_groups[] = { UNIPHIER_PINCTRL_GROUP(nand), UNIPHIER_PINCTRL_GROUP(nand_cs1), UNIPHIER_PINCTRL_GROUP(sd), + UNIPHIER_PINCTRL_GROUP(system_bus), + UNIPHIER_PINCTRL_GROUP(system_bus_cs1), + UNIPHIER_PINCTRL_GROUP(system_bus_cs2), + UNIPHIER_PINCTRL_GROUP(system_bus_cs3), + UNIPHIER_PINCTRL_GROUP(system_bus_cs4), + UNIPHIER_PINCTRL_GROUP(system_bus_cs5), UNIPHIER_PINCTRL_GROUP_SPL(uart0), UNIPHIER_PINCTRL_GROUP_SPL(uart0b), UNIPHIER_PINCTRL_GROUP_SPL(uart1), @@ -103,6 +123,7 @@ static const char * const uniphier_ld6b_functions[] = { UNIPHIER_PINMUX_FUNCTION(i2c3), UNIPHIER_PINMUX_FUNCTION(nand), UNIPHIER_PINMUX_FUNCTION(sd), + UNIPHIER_PINMUX_FUNCTION(system_bus), UNIPHIER_PINMUX_FUNCTION_SPL(uart0), UNIPHIER_PINMUX_FUNCTION_SPL(uart1), UNIPHIER_PINMUX_FUNCTION_SPL(uart2), diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c index 6f349dc..f1624da 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c @@ -53,6 +53,26 @@ static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0}; static const unsigned sd1_pins[] = {319, 320, 321, 322, 323, 324, 325, 326, 327}; static const int sd1_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0}; +static const unsigned system_bus_pins[] = {25, 26, 27, 28, 29, 30, 31, 32, 33, + 34, 35, 36, 37, 38}; +static const int system_bus_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0}; +static const unsigned system_bus_cs0_pins[] = {318}; +static const int system_bus_cs0_muxvals[] = {5}; +static const unsigned system_bus_cs1_pins[] = {24}; +static const int system_bus_cs1_muxvals[] = {0}; +static const unsigned system_bus_cs2_pins[] = {315}; +static const int system_bus_cs2_muxvals[] = {5}; +static const unsigned system_bus_cs3_pins[] = {313}; +static const int system_bus_cs3_muxvals[] = {5}; +static const unsigned system_bus_cs4_pins[] = {305}; +static const int system_bus_cs4_muxvals[] = {5}; +static const unsigned system_bus_cs5_pins[] = {303}; +static const int system_bus_cs5_muxvals[] = {6}; +static const unsigned system_bus_cs6_pins[] = {307}; +static const int system_bus_cs6_muxvals[] = {6}; +static const unsigned system_bus_cs7_pins[] = {312}; +static const int system_bus_cs7_muxvals[] = {6}; static const unsigned uart0_pins[] = {127, 128}; static const int uart0_muxvals[] = {0, 0}; static const unsigned uart1_pins[] = {129, 130}; @@ -86,6 +106,15 @@ static const struct uniphier_pinctrl_group uniphier_pro4_groups[] = { UNIPHIER_PINCTRL_GROUP(nand_cs1), UNIPHIER_PINCTRL_GROUP(sd), UNIPHIER_PINCTRL_GROUP(sd1), + UNIPHIER_PINCTRL_GROUP(system_bus), + UNIPHIER_PINCTRL_GROUP(system_bus_cs0), + UNIPHIER_PINCTRL_GROUP(system_bus_cs1), + UNIPHIER_PINCTRL_GROUP(system_bus_cs2), + UNIPHIER_PINCTRL_GROUP(system_bus_cs3), + UNIPHIER_PINCTRL_GROUP(system_bus_cs4), + UNIPHIER_PINCTRL_GROUP(system_bus_cs5), + UNIPHIER_PINCTRL_GROUP(system_bus_cs6), + UNIPHIER_PINCTRL_GROUP(system_bus_cs7), UNIPHIER_PINCTRL_GROUP_SPL(uart0), UNIPHIER_PINCTRL_GROUP_SPL(uart1), UNIPHIER_PINCTRL_GROUP_SPL(uart2), @@ -109,6 +138,7 @@ static const char * const uniphier_pro4_functions[] = { UNIPHIER_PINMUX_FUNCTION(nand), UNIPHIER_PINMUX_FUNCTION(sd), UNIPHIER_PINMUX_FUNCTION(sd1), + UNIPHIER_PINMUX_FUNCTION(system_bus), UNIPHIER_PINMUX_FUNCTION_SPL(uart0), UNIPHIER_PINMUX_FUNCTION_SPL(uart1), UNIPHIER_PINMUX_FUNCTION_SPL(uart2), diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c index 268cdea..9670f25 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c @@ -50,6 +50,26 @@ static const unsigned nand_cs1_pins[] = {26, 27}; static const int nand_cs1_muxvals[] = {0, 0}; static const unsigned sd_pins[] = {250, 251, 252, 253, 254, 255, 256, 257, 258}; static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0}; +static const unsigned system_bus_pins[] = {4, 5, 6, 7, 8, 9, 10, 11, 12, 13, + 14, 15, 16, 17}; +static const int system_bus_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0}; +static const unsigned system_bus_cs0_pins[] = {105}; +static const int system_bus_cs0_muxvals[] = {1}; +static const unsigned system_bus_cs1_pins[] = {18}; +static const int system_bus_cs1_muxvals[] = {0}; +static const unsigned system_bus_cs2_pins[] = {106}; +static const int system_bus_cs2_muxvals[] = {1}; +static const unsigned system_bus_cs3_pins[] = {100}; +static const int system_bus_cs3_muxvals[] = {1}; +static const unsigned system_bus_cs4_pins[] = {101}; +static const int system_bus_cs4_muxvals[] = {1}; +static const unsigned system_bus_cs5_pins[] = {102}; +static const int system_bus_cs5_muxvals[] = {1}; +static const unsigned system_bus_cs6_pins[] = {69}; +static const int system_bus_cs6_muxvals[] = {5}; +static const unsigned system_bus_cs7_pins[] = {70}; +static const int system_bus_cs7_muxvals[] = {5}; static const unsigned uart0_pins[] = {47, 48}; static const int uart0_muxvals[] = {0, 0}; static const unsigned uart0b_pins[] = {227, 228}; @@ -81,6 +101,15 @@ static const struct uniphier_pinctrl_group uniphier_pro5_groups[] = { UNIPHIER_PINCTRL_GROUP(nand), UNIPHIER_PINCTRL_GROUP(nand_cs1), UNIPHIER_PINCTRL_GROUP(sd), + UNIPHIER_PINCTRL_GROUP(system_bus), + UNIPHIER_PINCTRL_GROUP(system_bus_cs0), + UNIPHIER_PINCTRL_GROUP(system_bus_cs1), + UNIPHIER_PINCTRL_GROUP(system_bus_cs2), + UNIPHIER_PINCTRL_GROUP(system_bus_cs3), + UNIPHIER_PINCTRL_GROUP(system_bus_cs4), + UNIPHIER_PINCTRL_GROUP(system_bus_cs5), + UNIPHIER_PINCTRL_GROUP(system_bus_cs6), + UNIPHIER_PINCTRL_GROUP(system_bus_cs7), UNIPHIER_PINCTRL_GROUP_SPL(uart0), UNIPHIER_PINCTRL_GROUP_SPL(uart0b), UNIPHIER_PINCTRL_GROUP_SPL(uart1), @@ -101,6 +130,7 @@ static const char * const uniphier_pro5_functions[] = { UNIPHIER_PINMUX_FUNCTION(i2c6), UNIPHIER_PINMUX_FUNCTION(nand), UNIPHIER_PINMUX_FUNCTION(sd), + UNIPHIER_PINMUX_FUNCTION(system_bus), UNIPHIER_PINMUX_FUNCTION_SPL(uart0), UNIPHIER_PINMUX_FUNCTION_SPL(uart1), UNIPHIER_PINMUX_FUNCTION_SPL(uart2), diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c index b534274..1d29170 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c @@ -53,6 +53,12 @@ static const unsigned nand_cs1_pins[] = {37, 38}; static const int nand_cs1_muxvals[] = {8, 8}; static const unsigned sd_pins[] = {47, 48, 49, 50, 51, 52, 53, 54, 55}; static const int sd_muxvals[] = {8, 8, 8, 8, 8, 8, 8, 8, 8}; +static const unsigned system_bus_pins[] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, + 11, 12, 13}; +static const int system_bus_muxvals[] = {8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, + 8}; +static const unsigned system_bus_cs1_pins[] = {14}; +static const int system_bus_cs1_muxvals[] = {8}; static const unsigned uart0_pins[] = {217, 218}; static const int uart0_muxvals[] = {8, 8}; static const unsigned uart0b_pins[] = {179, 180}; @@ -89,6 +95,8 @@ static const struct uniphier_pinctrl_group uniphier_pxs2_groups[] = { UNIPHIER_PINCTRL_GROUP(nand), UNIPHIER_PINCTRL_GROUP(nand_cs1), UNIPHIER_PINCTRL_GROUP(sd), + UNIPHIER_PINCTRL_GROUP(system_bus), + UNIPHIER_PINCTRL_GROUP(system_bus_cs1), UNIPHIER_PINCTRL_GROUP_SPL(uart0), UNIPHIER_PINCTRL_GROUP_SPL(uart0b), UNIPHIER_PINCTRL_GROUP_SPL(uart1), @@ -114,6 +122,7 @@ static const char * const uniphier_pxs2_functions[] = { UNIPHIER_PINMUX_FUNCTION(i2c6), UNIPHIER_PINMUX_FUNCTION(nand), UNIPHIER_PINMUX_FUNCTION(sd), + UNIPHIER_PINMUX_FUNCTION(system_bus), UNIPHIER_PINMUX_FUNCTION_SPL(uart0), UNIPHIER_PINMUX_FUNCTION_SPL(uart1), UNIPHIER_PINMUX_FUNCTION_SPL(uart2), diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c new file mode 100644 index 0000000..d3a507e --- /dev/null +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c @@ -0,0 +1,128 @@ +/* + * Copyright (C) 2016 Socionext Inc. + * Author: Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <dm/device.h> +#include <dm/pinctrl.h> + +#include "pinctrl-uniphier.h" + +static const unsigned emmc_pins[] = {55, 56, 60}; +static const int emmc_muxvals[] = {1, 1, 1}; +static const unsigned emmc_dat8_pins[] = {57}; +static const int emmc_dat8_muxvals[] = {1}; +static const unsigned ether_mii_pins[] = {35, 107, 108, 109, 110, 111, 112, + 113}; +static const int ether_mii_muxvals[] = {1, 2, 2, 2, 2, 2, 2, 2}; +static const unsigned ether_rmii_pins[] = {35}; +static const int ether_rmii_muxvals[] = {1}; +static const unsigned i2c0_pins[] = {36}; +static const int i2c0_muxvals[] = {0}; +static const unsigned nand_pins[] = {38, 39, 40, 58, 59}; +static const int nand_muxvals[] = {1, 1, 1, 1, 1}; +static const unsigned nand_cs1_pins[] = {41}; +static const int nand_cs1_muxvals[] = {1}; +static const unsigned sd_pins[] = {42, 43, 44, 45}; +static const int sd_muxvals[] = {1, 1, 1, 1}; +static const unsigned system_bus_pins[] = {46, 50, 51, 53, 54, 73, 74, 75, 76, + 77, 78, 79, 80, 88, 89, 91, 92, 99}; +static const int system_bus_muxvals[] = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1}; +static const unsigned system_bus_cs0_pins[] = {93}; +static const int system_bus_cs0_muxvals[] = {1}; +static const unsigned system_bus_cs1_pins[] = {94}; +static const int system_bus_cs1_muxvals[] = {1}; +static const unsigned system_bus_cs2_pins[] = {95}; +static const int system_bus_cs2_muxvals[] = {1}; +static const unsigned system_bus_cs3_pins[] = {96}; +static const int system_bus_cs3_muxvals[] = {1}; +static const unsigned system_bus_cs4_pins[] = {81}; +static const int system_bus_cs4_muxvals[] = {1}; +static const unsigned system_bus_cs5_pins[] = {82}; +static const int system_bus_cs5_muxvals[] = {1}; +static const unsigned uart0_pins[] = {63, 64}; +static const int uart0_muxvals[] = {0, 1}; +static const unsigned uart1_pins[] = {65, 66}; +static const int uart1_muxvals[] = {0, 1}; +static const unsigned uart2_pins[] = {96, 102}; +static const int uart2_muxvals[] = {2, 2}; +static const unsigned usb0_pins[] = {13, 14}; +static const int usb0_muxvals[] = {0, 1}; +static const unsigned usb1_pins[] = {15, 16}; +static const int usb1_muxvals[] = {0, 1}; +static const unsigned usb2_pins[] = {17, 18}; +static const int usb2_muxvals[] = {0, 1}; +static const unsigned usb3_pins[] = {19, 20}; +static const int usb3_muxvals[] = {0, 1}; + +static const struct uniphier_pinctrl_group uniphier_sld3_groups[] = { + UNIPHIER_PINCTRL_GROUP_SPL(emmc), + UNIPHIER_PINCTRL_GROUP_SPL(emmc_dat8), + UNIPHIER_PINCTRL_GROUP(ether_mii), + UNIPHIER_PINCTRL_GROUP(ether_rmii), + UNIPHIER_PINCTRL_GROUP(i2c0), + UNIPHIER_PINCTRL_GROUP(nand), + UNIPHIER_PINCTRL_GROUP(nand_cs1), + UNIPHIER_PINCTRL_GROUP(sd), + UNIPHIER_PINCTRL_GROUP(system_bus), + UNIPHIER_PINCTRL_GROUP(system_bus_cs0), + UNIPHIER_PINCTRL_GROUP(system_bus_cs1), + UNIPHIER_PINCTRL_GROUP(system_bus_cs2), + UNIPHIER_PINCTRL_GROUP(system_bus_cs3), + UNIPHIER_PINCTRL_GROUP(system_bus_cs4), + UNIPHIER_PINCTRL_GROUP(system_bus_cs5), + UNIPHIER_PINCTRL_GROUP_SPL(uart0), + UNIPHIER_PINCTRL_GROUP_SPL(uart1), + UNIPHIER_PINCTRL_GROUP_SPL(uart2), + UNIPHIER_PINCTRL_GROUP(usb0), + UNIPHIER_PINCTRL_GROUP(usb1), + UNIPHIER_PINCTRL_GROUP(usb2), + UNIPHIER_PINCTRL_GROUP(usb3) +}; + +static const char * const uniphier_sld3_functions[] = { + UNIPHIER_PINMUX_FUNCTION_SPL(emmc), + UNIPHIER_PINMUX_FUNCTION(ether_mii), + UNIPHIER_PINMUX_FUNCTION(ether_rmii), + UNIPHIER_PINMUX_FUNCTION(i2c0), + UNIPHIER_PINMUX_FUNCTION(nand), + UNIPHIER_PINMUX_FUNCTION(sd), + UNIPHIER_PINMUX_FUNCTION(system_bus), + UNIPHIER_PINMUX_FUNCTION_SPL(uart0), + UNIPHIER_PINMUX_FUNCTION_SPL(uart1), + UNIPHIER_PINMUX_FUNCTION_SPL(uart2), + UNIPHIER_PINMUX_FUNCTION(usb0), + UNIPHIER_PINMUX_FUNCTION(usb1), + UNIPHIER_PINMUX_FUNCTION(usb2), + UNIPHIER_PINMUX_FUNCTION(usb3), +}; + +static struct uniphier_pinctrl_socdata uniphier_sld3_pinctrl_socdata = { + .groups = uniphier_sld3_groups, + .groups_count = ARRAY_SIZE(uniphier_sld3_groups), + .functions = uniphier_sld3_functions, + .functions_count = ARRAY_SIZE(uniphier_sld3_functions), + .caps = UNIPHIER_PINCTRL_CAPS_MUX_4BIT, +}; + +static int uniphier_sld3_pinctrl_probe(struct udevice *dev) +{ + return uniphier_pinctrl_probe(dev, &uniphier_sld3_pinctrl_socdata); +} + +static const struct udevice_id uniphier_sld3_pinctrl_match[] = { + { .compatible = "socionext,uniphier-sld3-pinctrl" }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(uniphier_sld3_pinctrl) = { + .name = "uniphier-sld3-pinctrl", + .id = UCLASS_PINCTRL, + .of_match = of_match_ptr(uniphier_sld3_pinctrl_match), + .probe = uniphier_sld3_pinctrl_probe, + .priv_auto_alloc_size = sizeof(struct uniphier_pinctrl_priv), + .ops = &uniphier_pinctrl_ops, +}; diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c index a85e055..471fb67 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c @@ -65,6 +65,20 @@ static const unsigned nand_cs1_pins[] = {22, 23}; static const int nand_cs1_muxvals[] = {0, 0}; static const unsigned sd_pins[] = {32, 33, 34, 35, 36, 37, 38, 39, 40}; static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0}; +static const unsigned system_bus_pins[] = {136, 137, 138, 139, 140, 141, 142, + 143, 144, 145, 146, 147, 148, 149}; +static const int system_bus_muxvals[] = {-1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1}; +static const unsigned system_bus_cs1_pins[] = {150}; +static const int system_bus_cs1_muxvals[] = {-1}; +static const unsigned system_bus_cs2_pins[] = {10}; +static const int system_bus_cs2_muxvals[] = {1}; +static const unsigned system_bus_cs3_pins[] = {11}; +static const int system_bus_cs3_muxvals[] = {1}; +static const unsigned system_bus_cs4_pins[] = {12}; +static const int system_bus_cs4_muxvals[] = {1}; +static const unsigned system_bus_cs5_pins[] = {13}; +static const int system_bus_cs5_muxvals[] = {1}; static const unsigned uart0_pins[] = {70, 71}; static const int uart0_muxvals[] = {3, 3}; static const unsigned uart1_pins[] = {114, 115}; @@ -92,6 +106,12 @@ static const struct uniphier_pinctrl_group uniphier_sld8_groups[] = { UNIPHIER_PINCTRL_GROUP(nand), UNIPHIER_PINCTRL_GROUP(nand_cs1), UNIPHIER_PINCTRL_GROUP(sd), + UNIPHIER_PINCTRL_GROUP(system_bus), + UNIPHIER_PINCTRL_GROUP(system_bus_cs1), + UNIPHIER_PINCTRL_GROUP(system_bus_cs2), + UNIPHIER_PINCTRL_GROUP(system_bus_cs3), + UNIPHIER_PINCTRL_GROUP(system_bus_cs4), + UNIPHIER_PINCTRL_GROUP(system_bus_cs5), UNIPHIER_PINCTRL_GROUP_SPL(uart0), UNIPHIER_PINCTRL_GROUP_SPL(uart1), UNIPHIER_PINCTRL_GROUP_SPL(uart2), @@ -111,6 +131,7 @@ static const char * const uniphier_sld8_functions[] = { UNIPHIER_PINMUX_FUNCTION(i2c3), UNIPHIER_PINMUX_FUNCTION(nand), UNIPHIER_PINMUX_FUNCTION(sd), + UNIPHIER_PINMUX_FUNCTION(system_bus), UNIPHIER_PINMUX_FUNCTION_SPL(uart0), UNIPHIER_PINMUX_FUNCTION_SPL(uart1), UNIPHIER_PINMUX_FUNCTION_SPL(uart2), diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier.h b/drivers/pinctrl/uniphier/pinctrl-uniphier.h index 4de5b03..5c3db2a 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier.h +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier.h @@ -13,10 +13,6 @@ #include <linux/kernel.h> #include <linux/types.h> -#define UNIPHIER_PINCTRL_PINMUX_BASE 0x1000 -#define UNIPHIER_PINCTRL_LOAD_PINMUX 0x1700 -#define UNIPHIER_PINCTRL_IECTRL 0x1d00 - #define UNIPHIER_PIN_ATTR_PACKED(iectrl) (iectrl) static inline unsigned int uniphier_pin_get_iectrl(unsigned long data) @@ -71,8 +67,9 @@ struct uniphier_pinctrl_socdata { const char * const *functions; int functions_count; unsigned caps; -#define UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL BIT(1) -#define UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE BIT(0) +#define UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL BIT(2) +#define UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE BIT(1) +#define UNIPHIER_PINCTRL_CAPS_MUX_4BIT BIT(0) }; #define UNIPHIER_PINCTRL_PIN(a, b) \ diff --git a/drivers/power/axp209.c b/drivers/power/axp209.c index fc162a1..731b75e 100644 --- a/drivers/power/axp209.c +++ b/drivers/power/axp209.c @@ -167,6 +167,22 @@ int axp_init(void) return rc; } + /* + * Turn off LDOIO regulators / tri-state GPIO pins, when rebooting + * from android these are sometimes on. + */ + rc = pmic_bus_write(AXP_GPIO0_CTRL, AXP_GPIO_CTRL_INPUT); + if (rc) + return rc; + + rc = pmic_bus_write(AXP_GPIO1_CTRL, AXP_GPIO_CTRL_INPUT); + if (rc) + return rc; + + rc = pmic_bus_write(AXP_GPIO2_CTRL, AXP_GPIO_CTRL_INPUT); + if (rc) + return rc; + return 0; } diff --git a/drivers/power/axp221.c b/drivers/power/axp221.c index 727ab09..109d3f4 100644 --- a/drivers/power/axp221.c +++ b/drivers/power/axp221.c @@ -223,6 +223,18 @@ int axp_init(void) if (!(axp_chip_id == 0x6 || axp_chip_id == 0x7 || axp_chip_id == 0x17)) return -ENODEV; + /* + * Turn off LDOIO regulators / tri-state GPIO pins, when rebooting + * from android these are sometimes on. + */ + ret = pmic_bus_write(AXP_GPIO0_CTRL, AXP_GPIO_CTRL_INPUT); + if (ret) + return ret; + + ret = pmic_bus_write(AXP_GPIO1_CTRL, AXP_GPIO_CTRL_INPUT); + if (ret) + return ret; + return 0; } diff --git a/drivers/power/axp809.c b/drivers/power/axp809.c index c8b76cf..c5b608d 100644 --- a/drivers/power/axp809.c +++ b/drivers/power/axp809.c @@ -217,13 +217,7 @@ int axp_set_sw(bool on) int axp_init(void) { - int ret; - - ret = pmic_bus_init(); - if (ret) - return ret; - - return 0; + return pmic_bus_init(); } int do_poweroff(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) diff --git a/drivers/power/pmic/pmic_tps62362.c b/drivers/power/pmic/pmic_tps62362.c index 2123685..23f9a9c 100644 --- a/drivers/power/pmic/pmic_tps62362.c +++ b/drivers/power/pmic/pmic_tps62362.c @@ -7,7 +7,7 @@ #include <common.h> #include <i2c.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <power/pmic.h> #include <power/tps62362.h> diff --git a/drivers/power/pmic/pmic_tps65218.c b/drivers/power/pmic/pmic_tps65218.c index 0fd0ad4..f32fa40 100644 --- a/drivers/power/pmic/pmic_tps65218.c +++ b/drivers/power/pmic/pmic_tps65218.c @@ -7,7 +7,7 @@ #include <common.h> #include <i2c.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <power/pmic.h> #include <power/tps65218.h> diff --git a/drivers/pwm/rk_pwm.c b/drivers/pwm/rk_pwm.c index 2d289a4..9254f5b 100644 --- a/drivers/pwm/rk_pwm.c +++ b/drivers/pwm/rk_pwm.c @@ -6,15 +6,13 @@ */ #include <common.h> +#include <clk.h> #include <div64.h> #include <dm.h> #include <pwm.h> #include <regmap.h> #include <syscon.h> #include <asm/io.h> -#include <asm/arch/clock.h> -#include <asm/arch/cru_rk3288.h> -#include <asm/arch/grf_rk3288.h> #include <asm/arch/pwm.h> #include <power/regulator.h> @@ -22,7 +20,7 @@ DECLARE_GLOBAL_DATA_PTR; struct rk_pwm_priv { struct rk3288_pwm *regs; - struct rk3288_grf *grf; + ulong freq; }; static int rk_pwm_set_config(struct udevice *dev, uint channel, uint period_ns, @@ -38,8 +36,8 @@ static int rk_pwm_set_config(struct udevice *dev, uint channel, uint period_ns, RK_PWM_DISABLE, ®s->ctrl); - period = lldiv((uint64_t)(PD_BUS_PCLK_HZ / 1000) * period_ns, 1000000); - duty = lldiv((uint64_t)(PD_BUS_PCLK_HZ / 1000) * duty_ns, 1000000); + period = lldiv((uint64_t)(priv->freq / 1000) * period_ns, 1000000); + duty = lldiv((uint64_t)(priv->freq / 1000) * duty_ns, 1000000); writel(period, ®s->period_hpr); writel(duty, ®s->duty_lpr); @@ -62,13 +60,8 @@ static int rk_pwm_set_enable(struct udevice *dev, uint channel, bool enable) static int rk_pwm_ofdata_to_platdata(struct udevice *dev) { struct rk_pwm_priv *priv = dev_get_priv(dev); - struct regmap *map; priv->regs = (struct rk3288_pwm *)dev_get_addr(dev); - map = syscon_get_regmap_by_driver_data(ROCKCHIP_SYSCON_GRF); - if (IS_ERR(map)) - return PTR_ERR(map); - priv->grf = regmap_get_range(map, 0); return 0; } @@ -76,8 +69,15 @@ static int rk_pwm_ofdata_to_platdata(struct udevice *dev) static int rk_pwm_probe(struct udevice *dev) { struct rk_pwm_priv *priv = dev_get_priv(dev); - - rk_setreg(&priv->grf->soc_con2, 1 << 0); + struct clk clk; + int ret = 0; + + ret = clk_get_by_index(dev, 0, &clk); + if (ret < 0) { + debug("%s get clock fail!\n", __func__); + return -EINVAL; + } + priv->freq = clk_get_rate(&clk); return 0; } diff --git a/drivers/qe/qe.c b/drivers/qe/qe.c index 2b98984..4231594 100644 --- a/drivers/qe/qe.c +++ b/drivers/qe/qe.c @@ -7,11 +7,11 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#include "common.h" +#include <common.h> #include <command.h> -#include "asm/errno.h" -#include "asm/io.h" -#include "linux/immap_qe.h" +#include <linux/errno.h> +#include <asm/io.h> +#include <linux/immap_qe.h> #include <fsl_qe.h> #ifdef CONFIG_LS102XA #include <asm/arch/immap_ls102xa.h> diff --git a/drivers/qe/uccf.c b/drivers/qe/uccf.c index e011886..bab5453 100644 --- a/drivers/qe/uccf.c +++ b/drivers/qe/uccf.c @@ -7,11 +7,11 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#include "common.h" -#include "malloc.h" -#include "asm/errno.h" -#include "asm/io.h" -#include "linux/immap_qe.h" +#include <common.h> +#include <malloc.h> +#include <linux/errno.h> +#include <asm/io.h> +#include <linux/immap_qe.h> #include "uccf.h" #include <fsl_qe.h> diff --git a/drivers/qe/uec.c b/drivers/qe/uec.c index 468c92e..5fd956a 100644 --- a/drivers/qe/uec.c +++ b/drivers/qe/uec.c @@ -6,12 +6,12 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#include "common.h" -#include "net.h" -#include "malloc.h" -#include "asm/errno.h" -#include "asm/io.h" -#include "linux/immap_qe.h" +#include <common.h> +#include <net.h> +#include <malloc.h> +#include <linux/errno.h> +#include <asm/io.h> +#include <linux/immap_qe.h> #include "uccf.h" #include "uec.h" #include "uec_phy.h" diff --git a/drivers/qe/uec_phy.c b/drivers/qe/uec_phy.c index 272874d..9604270 100644 --- a/drivers/qe/uec_phy.c +++ b/drivers/qe/uec_phy.c @@ -10,12 +10,12 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#include "common.h" -#include "net.h" -#include "malloc.h" -#include "asm/errno.h" -#include "linux/immap_qe.h" -#include "asm/io.h" +#include <common.h> +#include <net.h> +#include <malloc.h> +#include <linux/errno.h> +#include <linux/immap_qe.h> +#include <asm/io.h> #include "uccf.h" #include "uec.h" #include "uec_phy.h" diff --git a/drivers/rtc/at91sam9_rtt.c b/drivers/rtc/at91sam9_rtt.c index a684ad6..18fb09d 100644 --- a/drivers/rtc/at91sam9_rtt.c +++ b/drivers/rtc/at91sam9_rtt.c @@ -23,7 +23,7 @@ #include <command.h> #include <rtc.h> #include <asm/io.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/arch/hardware.h> #include <asm/arch/at91_rtt.h> #include <asm/arch/at91_gpbr.h> diff --git a/drivers/rtc/m48t35ax.c b/drivers/rtc/m48t35ax.c index 021b91f..36011a5 100644 --- a/drivers/rtc/m48t35ax.c +++ b/drivers/rtc/m48t35ax.c @@ -127,10 +127,8 @@ void rtc_reset (void) static uchar rtc_read (uchar reg) { - uchar val; - val = *(unsigned char *) + return *(unsigned char *) ((CONFIG_SYS_NVRAM_BASE_ADDR + CONFIG_SYS_NVRAM_SIZE - 8) + reg); - return val; } static void rtc_write (uchar reg, uchar val) diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 88fca15..765499d 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -5,6 +5,7 @@ */ #include <common.h> +#include <clk.h> #include <dm.h> #include <errno.h> #include <fdtdec.h> @@ -12,6 +13,7 @@ #include <serial.h> #include <watchdog.h> #include <linux/types.h> +#include <linux/compiler.h> #include <asm/io.h> DECLARE_GLOBAL_DATA_PTR; @@ -352,6 +354,8 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev) { struct ns16550_platdata *plat = dev->platdata; fdt_addr_t addr; + __maybe_unused struct clk clk; + __maybe_unused int err; /* try Processor Local Bus device first */ addr = dev_get_addr(dev); @@ -397,9 +401,23 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev) "reg-offset", 0); plat->reg_shift = fdtdec_get_int(gd->fdt_blob, dev->of_offset, "reg-shift", 0); - plat->clock = fdtdec_get_int(gd->fdt_blob, dev->of_offset, - "clock-frequency", - CONFIG_SYS_NS16550_CLK); + +#ifdef CONFIG_CLK + err = clk_get_by_index(dev, 0, &clk); + if (!err) { + err = clk_get_rate(&clk); + if (!IS_ERR_VALUE(err)) + plat->clock = err; + } else if (err != -ENODEV && err != -ENOSYS) { + debug("ns16550 failed to get clock\n"); + return err; + } +#endif + + if (!plat->clock) + plat->clock = fdtdec_get_int(gd->fdt_blob, dev->of_offset, + "clock-frequency", + CONFIG_SYS_NS16550_CLK); if (!plat->clock) { debug("ns16550 clock not defined\n"); return -EINVAL; diff --git a/drivers/serial/serial_uniphier.c b/drivers/serial/serial_uniphier.c index ab607b7..4ea5304 100644 --- a/drivers/serial/serial_uniphier.c +++ b/drivers/serial/serial_uniphier.c @@ -9,7 +9,7 @@ #include <linux/io.h> #include <linux/serial_reg.h> #include <linux/sizes.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <dm/device.h> #include <serial.h> #include <fdtdec.h> diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index aca385d..5da66a6 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -61,13 +61,6 @@ config FSL_DSPI this Freescale DSPI IP core. LS102xA and Colibri VF50/VF61 platforms use this driver. -config FSL_QSPI - bool "Freescale QSPI driver" - help - Enable the Freescale Quad-SPI (QSPI) driver. This driver can be - used to access the SPI NOR flash on platforms embedding this - Freescale IP core. - config ICH_SPI bool "Intel ICH SPI driver" help @@ -188,6 +181,13 @@ config FSL_ESPI access the SPI interface and SPI NOR flash on platforms embedding this Freescale eSPI IP core. +config FSL_QSPI + bool "Freescale QSPI driver" + help + Enable the Freescale Quad-SPI (QSPI) driver. This driver can be + used to access the SPI NOR flash on platforms embedding this + Freescale IP core. + config TI_QSPI bool "TI QSPI driver" help diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c index a5244ff..1051afb 100644 --- a/drivers/spi/cadence_qspi.c +++ b/drivers/spi/cadence_qspi.c @@ -10,7 +10,7 @@ #include <fdtdec.h> #include <malloc.h> #include <spi.h> -#include <asm/errno.h> +#include <linux/errno.h> #include "cadence_qspi.h" #define CQSPI_STIG_READ 0 @@ -251,7 +251,7 @@ static int cadence_spi_xfer(struct udevice *dev, unsigned int bitlen, break; case CQSPI_INDIRECT_READ: err = cadence_qspi_apb_indirect_read_setup(plat, - priv->cmd_len, dm_plat->mode_rx, cmd_buf); + priv->cmd_len, dm_plat->mode, cmd_buf); if (!err) { err = cadence_qspi_apb_indirect_read_execute (plat, data_bytes, din); diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c index 1d68379..e285d3c 100644 --- a/drivers/spi/cadence_qspi_apb.c +++ b/drivers/spi/cadence_qspi_apb.c @@ -27,7 +27,7 @@ #include <common.h> #include <asm/io.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <wait_bit.h> #include <spi.h> #include "cadence_qspi.h" diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c index 00b2fed..caf0103 100644 --- a/drivers/spi/ich.c +++ b/drivers/spi/ich.c @@ -649,10 +649,8 @@ static int ich_spi_child_pre_probe(struct udevice *dev) * ICH 7 SPI controller only supports array read command * and byte program command for SST flash */ - if (plat->ich_version == ICHV_7) { - slave->mode_rx = SPI_RX_SLOW; - slave->mode = SPI_TX_BYTE; - } + if (plat->ich_version == ICHV_7) + slave->mode = SPI_RX_SLOW | SPI_TX_BYTE; return 0; } diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c index 0881599..fc2786e 100644 --- a/drivers/spi/mxc_spi.c +++ b/drivers/spi/mxc_spi.c @@ -7,7 +7,7 @@ #include <common.h> #include <malloc.h> #include <spi.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/io.h> #include <asm/gpio.h> #include <asm/arch/imx-regs.h> diff --git a/drivers/spi/mxs_spi.c b/drivers/spi/mxs_spi.c index 627644b..61daeba 100644 --- a/drivers/spi/mxs_spi.c +++ b/drivers/spi/mxs_spi.c @@ -14,7 +14,7 @@ #include <malloc.h> #include <memalign.h> #include <spi.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/io.h> #include <asm/arch/clock.h> #include <asm/arch/imx-regs.h> diff --git a/drivers/spi/rk_spi.c b/drivers/spi/rk_spi.c index bc6dfd8..105ee4a 100644 --- a/drivers/spi/rk_spi.c +++ b/drivers/spi/rk_spi.c @@ -14,7 +14,7 @@ #include <dm.h> #include <errno.h> #include <spi.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/io.h> #include <asm/arch/clock.h> #include <asm/arch/periph.h> diff --git a/drivers/spi/sandbox_spi.c b/drivers/spi/sandbox_spi.c index bad5660..092b13b 100644 --- a/drivers/spi/sandbox_spi.c +++ b/drivers/spi/sandbox_spi.c @@ -15,7 +15,7 @@ #include <spi_flash.h> #include <os.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/spi.h> #include <asm/state.h> #include <dm/device-internal.h> diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c index 247abfa..d9c49e4 100644 --- a/drivers/spi/spi-uclass.c +++ b/drivers/spi/spi-uclass.c @@ -164,7 +164,6 @@ static int spi_child_pre_probe(struct udevice *dev) slave->max_hz = plat->max_hz; slave->mode = plat->mode; - slave->mode_rx = plat->mode_rx; slave->wordlen = SPI_DEFAULT_WORDLEN; return 0; @@ -381,7 +380,7 @@ void spi_free_slave(struct spi_slave *slave) int spi_slave_ofdata_to_platdata(const void *blob, int node, struct dm_spi_slave_platdata *plat) { - int mode = 0, mode_rx = 0; + int mode = 0; int value; plat->cs = fdtdec_get_int(blob, node, "reg", -1); @@ -413,24 +412,22 @@ int spi_slave_ofdata_to_platdata(const void *blob, int node, break; } - plat->mode = mode; - value = fdtdec_get_uint(blob, node, "spi-rx-bus-width", 1); switch (value) { case 1: break; case 2: - mode_rx |= SPI_RX_DUAL; + mode |= SPI_RX_DUAL; break; case 4: - mode_rx |= SPI_RX_QUAD; + mode |= SPI_RX_QUAD; break; default: error("spi-rx-bus-width %d not supported\n", value); break; } - plat->mode_rx = mode_rx; + plat->mode = mode; return 0; } diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c index bb72cb0..52520df 100644 --- a/drivers/spi/ti_qspi.c +++ b/drivers/spi/ti_qspi.c @@ -23,6 +23,9 @@ DECLARE_GLOBAL_DATA_PTR; #define QSPI_TIMEOUT 2000000 #define QSPI_FCLK 192000000 #define QSPI_DRA7XX_FCLK 76800000 +#define QSPI_WLEN_MAX_BITS 128 +#define QSPI_WLEN_MAX_BYTES (QSPI_WLEN_MAX_BITS >> 3) +#define QSPI_WLEN_MASK QSPI_WLEN(QSPI_WLEN_MAX_BITS) /* clock control */ #define QSPI_CLK_EN BIT(31) #define QSPI_CLK_DIV_MAX 0xffff @@ -223,20 +226,34 @@ static int __ti_qspi_xfer(struct ti_qspi_priv *priv, unsigned int bitlen, priv->cmd |= QSPI_3_PIN; priv->cmd |= 0xfff; -/* FIXME: This delay is required for successfull - * completion of read/write/erase. Once its root - * caused, it will be remove from the driver. - */ -#ifdef CONFIG_AM43XX - udelay(100); -#endif - while (words--) { + while (words) { + u8 xfer_len = 0; + if (txp) { - debug("tx cmd %08x dc %08x data %02x\n", - priv->cmd | QSPI_WR_SNGL, priv->dc, *txp); - writel(*txp++, &priv->base->data); - writel(priv->cmd | QSPI_WR_SNGL, - &priv->base->cmd); + u32 cmd = priv->cmd; + + if (words >= QSPI_WLEN_MAX_BYTES) { + u32 *txbuf = (u32 *)txp; + u32 data; + + data = cpu_to_be32(*txbuf++); + writel(data, &priv->base->data3); + data = cpu_to_be32(*txbuf++); + writel(data, &priv->base->data2); + data = cpu_to_be32(*txbuf++); + writel(data, &priv->base->data1); + data = cpu_to_be32(*txbuf++); + writel(data, &priv->base->data); + cmd &= ~QSPI_WLEN_MASK; + cmd |= QSPI_WLEN(QSPI_WLEN_MAX_BITS); + xfer_len = QSPI_WLEN_MAX_BYTES; + } else { + writeb(*txp, &priv->base->data); + xfer_len = 1; + } + debug("tx cmd %08x dc %08x\n", + cmd | QSPI_WR_SNGL, priv->dc); + writel(cmd | QSPI_WR_SNGL, &priv->base->cmd); status = readl(&priv->base->status); timeout = QSPI_TIMEOUT; while ((status & QSPI_WC_BUSY) != QSPI_XFER_DONE) { @@ -246,6 +263,7 @@ static int __ti_qspi_xfer(struct ti_qspi_priv *priv, unsigned int bitlen, } status = readl(&priv->base->status); } + txp += xfer_len; debug("tx done, status %08x\n", status); } if (rxp) { @@ -262,9 +280,11 @@ static int __ti_qspi_xfer(struct ti_qspi_priv *priv, unsigned int bitlen, status = readl(&priv->base->status); } *rxp++ = readl(&priv->base->data); + xfer_len = 1; debug("rx done, status %08x, read %02x\n", status, *(rxp-1)); } + words -= xfer_len; } /* Terminate frame */ @@ -336,7 +356,7 @@ static void ti_spi_setup_spi_register(struct ti_qspi_priv *priv) QSPI_SETUP0_NUM_D_BYTES_8_BITS | QSPI_SETUP0_READ_QUAD | QSPI_CMD_WRITE | QSPI_NUM_DUMMY_BITS); - slave->mode_rx = SPI_RX_QUAD; + slave->mode |= SPI_RX_QUAD; #else memval |= QSPI_CMD_READ | QSPI_SETUP0_NUM_A_BYTES | QSPI_SETUP0_NUM_D_BYTES_NO_BITS | @@ -422,7 +442,7 @@ static void __ti_qspi_setup_memorymap(struct ti_qspi_priv *priv, bool enable) { u32 memval; - u32 mode = slave->mode_rx & (SPI_RX_QUAD | SPI_RX_DUAL); + u32 mode = slave->mode & (SPI_RX_QUAD | SPI_RX_DUAL); if (!enable) { writel(0, &priv->base->setup0); @@ -436,7 +456,7 @@ static void __ti_qspi_setup_memorymap(struct ti_qspi_priv *priv, memval |= QSPI_CMD_READ_QUAD; memval |= QSPI_SETUP0_NUM_D_BYTES_8_BITS; memval |= QSPI_SETUP0_READ_QUAD; - slave->mode_rx = SPI_RX_QUAD; + slave->mode |= SPI_RX_QUAD; break; case SPI_RX_DUAL: memval |= QSPI_CMD_READ_DUAL; diff --git a/drivers/spi/zynq_spi.c b/drivers/spi/zynq_spi.c index 09ae1be..15ca271 100644 --- a/drivers/spi/zynq_spi.c +++ b/drivers/spi/zynq_spi.c @@ -92,7 +92,8 @@ static void zynq_spi_init_hw(struct zynq_spi_priv *priv) u32 confr; /* Disable SPI */ - writel(~ZYNQ_SPI_ENR_SPI_EN_MASK, ®s->enr); + confr = ZYNQ_SPI_ENR_SPI_EN_MASK; + writel(~confr, ®s->enr); /* Disable Interrupts */ writel(ZYNQ_SPI_IXR_ALL_MASK, ®s->idr); @@ -173,8 +174,10 @@ static int zynq_spi_release_bus(struct udevice *dev) struct udevice *bus = dev->parent; struct zynq_spi_priv *priv = dev_get_priv(bus); struct zynq_spi_regs *regs = priv->regs; + u32 confr; - writel(~ZYNQ_SPI_ENR_SPI_EN_MASK, ®s->enr); + confr = ZYNQ_SPI_ENR_SPI_EN_MASK; + writel(~confr, ®s->enr); return 0; } @@ -230,7 +233,7 @@ static int zynq_spi_xfer(struct udevice *dev, unsigned int bitlen, /* Read the data from RX FIFO */ status = readl(®s->isr); - while (status & ZYNQ_SPI_IXR_RXNEMPTY_MASK) { + while ((status & ZYNQ_SPI_IXR_RXNEMPTY_MASK) && rx_len) { buf = readl(®s->rxdr); if (rx_buf) *rx_buf++ = buf; diff --git a/drivers/tpm/tpm_tis_infineon.c b/drivers/tpm/tpm_tis_infineon.c index a4b6741..ef3ff0d 100644 --- a/drivers/tpm/tpm_tis_infineon.c +++ b/drivers/tpm/tpm_tis_infineon.c @@ -25,7 +25,7 @@ #include <fdtdec.h> #include <i2c.h> #include <tpm.h> -#include <asm-generic/errno.h> +#include <linux/errno.h> #include <linux/compiler.h> #include <linux/types.h> #include <linux/unaligned/be_byteshift.h> diff --git a/drivers/usb/gadget/at91_udc.c b/drivers/usb/gadget/at91_udc.c index 4070803..f5bc277 100644 --- a/drivers/usb/gadget/at91_udc.c +++ b/drivers/usb/gadget/at91_udc.c @@ -15,7 +15,7 @@ #undef PACKET_TRACE #include <common.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/io.h> #include <asm/gpio.h> #include <asm/hardware.h> diff --git a/drivers/usb/gadget/atmel_usba_udc.c b/drivers/usb/gadget/atmel_usba_udc.c index 1e23d09..ad31703 100644 --- a/drivers/usb/gadget/atmel_usba_udc.c +++ b/drivers/usb/gadget/atmel_usba_udc.c @@ -9,7 +9,7 @@ */ #include <common.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/gpio.h> #include <asm/hardware.h> #include <linux/list.h> diff --git a/drivers/usb/gadget/ci_udc.c b/drivers/usb/gadget/ci_udc.c index d36bcf6..05c01ce 100644 --- a/drivers/usb/gadget/ci_udc.c +++ b/drivers/usb/gadget/ci_udc.c @@ -14,7 +14,7 @@ #include <net.h> #include <malloc.h> #include <asm/byteorder.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/io.h> #include <asm/unaligned.h> #include <linux/types.h> diff --git a/drivers/usb/gadget/config.c b/drivers/usb/gadget/config.c index 64284b0..525dc79 100644 --- a/drivers/usb/gadget/config.c +++ b/drivers/usb/gadget/config.c @@ -11,7 +11,7 @@ #include <common.h> #include <asm/unaligned.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <linux/list.h> #include <linux/string.h> diff --git a/drivers/usb/gadget/dwc2_udc_otg.c b/drivers/usb/gadget/dwc2_udc_otg.c index 029927f..d72bfdf 100644 --- a/drivers/usb/gadget/dwc2_udc_otg.c +++ b/drivers/usb/gadget/dwc2_udc_otg.c @@ -19,7 +19,7 @@ */ #undef DEBUG #include <common.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <linux/list.h> #include <malloc.h> diff --git a/drivers/usb/gadget/dwc2_udc_otg_phy.c b/drivers/usb/gadget/dwc2_udc_otg_phy.c index e0cbbc0..0c4620d 100644 --- a/drivers/usb/gadget/dwc2_udc_otg_phy.c +++ b/drivers/usb/gadget/dwc2_udc_otg_phy.c @@ -19,7 +19,7 @@ */ #include <common.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <linux/list.h> #include <malloc.h> diff --git a/drivers/usb/gadget/dwc2_udc_otg_priv.h b/drivers/usb/gadget/dwc2_udc_otg_priv.h index b2c1fc4..c40ecf8 100644 --- a/drivers/usb/gadget/dwc2_udc_otg_priv.h +++ b/drivers/usb/gadget/dwc2_udc_otg_priv.h @@ -8,7 +8,7 @@ #ifndef __DWC2_UDC_OTG_PRIV__ #define __DWC2_UDC_OTG_PRIV__ -#include <asm/errno.h> +#include <linux/errno.h> #include <linux/sizes.h> #include <linux/usb/ch9.h> #include <linux/usb/gadget.h> diff --git a/drivers/usb/gadget/epautoconf.c b/drivers/usb/gadget/epautoconf.c index a53a6dc..6d6dbcb 100644 --- a/drivers/usb/gadget/epautoconf.c +++ b/drivers/usb/gadget/epautoconf.c @@ -13,7 +13,7 @@ #include <common.h> #include <linux/usb/ch9.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <linux/usb/gadget.h> #include <asm/unaligned.h> #include "gadget_chips.h" diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c index 9b06f02..497b981 100644 --- a/drivers/usb/gadget/ether.c +++ b/drivers/usb/gadget/ether.c @@ -10,7 +10,7 @@ #include <common.h> #include <console.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <linux/netdevice.h> #include <linux/usb/ch9.h> #include <linux/usb/cdc.h> diff --git a/drivers/usb/gadget/fotg210.c b/drivers/usb/gadget/fotg210.c index 1d8f58f..e061b2e 100644 --- a/drivers/usb/gadget/fotg210.c +++ b/drivers/usb/gadget/fotg210.c @@ -13,7 +13,7 @@ #include <net.h> #include <malloc.h> #include <asm/io.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <linux/types.h> #include <linux/usb/ch9.h> #include <linux/usb/gadget.h> diff --git a/drivers/usb/gadget/rndis.c b/drivers/usb/gadget/rndis.c index 48463db..844a0c7 100644 --- a/drivers/usb/gadget/rndis.c +++ b/drivers/usb/gadget/rndis.c @@ -28,7 +28,7 @@ #include <asm/byteorder.h> #include <asm/unaligned.h> -#include <asm/errno.h> +#include <linux/errno.h> #undef RNDIS_PM #undef RNDIS_WAKEUP @@ -41,8 +41,6 @@ #define ETH_ZLEN 60 /* Min. octets in frame sans FCS */ #define ETH_DATA_LEN 1500 /* Max. octets in payload */ #define ETH_FRAME_LEN PKTSIZE_ALIGN /* Max. octets in frame sans FCS */ -#define ENOTSUPP 524 /* Operation is not supported */ - /* * The driver for your USB chip needs to support ep0 OUT to work with diff --git a/drivers/usb/gadget/usbstring.c b/drivers/usb/gadget/usbstring.c index 3e24fbf..67e98c0 100644 --- a/drivers/usb/gadget/usbstring.c +++ b/drivers/usb/gadget/usbstring.c @@ -8,7 +8,7 @@ */ #include <common.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <linux/usb/ch9.h> #include <linux/usb/gadget.h> diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index e0699d4..61e13d7 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -15,19 +15,19 @@ config USB_XHCI_HCD if USB_XHCI_HCD -config USB_XHCI_UNIPHIER - bool "Support for UniPhier on-chip xHCI USB controller" - depends on ARCH_UNIPHIER - default y - ---help--- - Enables support for the on-chip xHCI controller on UniPhier SoCs. - config USB_XHCI_DWC3 bool "DesignWare USB3 DRD Core Support" help Say Y or if your system has a Dual Role SuperSpeed USB controller based on the DesignWare USB3 IP Core. +config USB_XHCI_ROCKCHIP + bool "Support for Rockchip on-chip xHCI USB controller" + depends on ARCH_ROCKCHIP + default y + help + Enables support for the on-chip xHCI controller on Rockchip SoCs. + endif # USB_XHCI_HCD config USB_EHCI_HCD diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile index 620d114..de25328 100644 --- a/drivers/usb/host/Makefile +++ b/drivers/usb/host/Makefile @@ -56,13 +56,13 @@ obj-$(CONFIG_USB_EHCI_ZYNQ) += ehci-zynq.o # xhci obj-$(CONFIG_USB_XHCI_HCD) += xhci.o xhci-mem.o xhci-ring.o obj-$(CONFIG_USB_XHCI_DWC3) += xhci-dwc3.o +obj-$(CONFIG_USB_XHCI_ROCKCHIP) += xhci-rockchip.o obj-$(CONFIG_USB_XHCI_ZYNQMP) += xhci-zynqmp.o obj-$(CONFIG_USB_XHCI_KEYSTONE) += xhci-keystone.o obj-$(CONFIG_USB_XHCI_EXYNOS) += xhci-exynos5.o obj-$(CONFIG_USB_XHCI_FSL) += xhci-fsl.o obj-$(CONFIG_USB_XHCI_OMAP) += xhci-omap.o obj-$(CONFIG_USB_XHCI_PCI) += xhci-pci.o -obj-$(CONFIG_USB_XHCI_UNIPHIER) += xhci-uniphier.o # designware obj-$(CONFIG_USB_DWC2) += dwc2.o diff --git a/drivers/usb/host/ehci-atmel.c b/drivers/usb/host/ehci-atmel.c index d65bbe9..2b138c5 100644 --- a/drivers/usb/host/ehci-atmel.c +++ b/drivers/usb/host/ehci-atmel.c @@ -128,17 +128,6 @@ static int ehci_atmel_probe(struct udevice *dev) return ehci_register(dev, hccr, hcor, NULL, 0, USB_INIT_HOST); } -static int ehci_atmel_remove(struct udevice *dev) -{ - int ret; - - ret = ehci_deregister(dev); - if (ret) - return ret; - - return 0; -} - static const struct udevice_id ehci_usb_ids[] = { { .compatible = "atmel,at91sam9g45-ehci", }, { } @@ -149,7 +138,7 @@ U_BOOT_DRIVER(ehci_atmel) = { .id = UCLASS_USB, .of_match = ehci_usb_ids, .probe = ehci_atmel_probe, - .remove = ehci_atmel_remove, + .remove = ehci_deregister, .ops = &ehci_usb_ops, .platdata_auto_alloc_size = sizeof(struct usb_platdata), .priv_auto_alloc_size = sizeof(struct ehci_atmel_priv), diff --git a/drivers/usb/host/ehci-exynos.c b/drivers/usb/host/ehci-exynos.c index bede04b..53281d7 100644 --- a/drivers/usb/host/ehci-exynos.c +++ b/drivers/usb/host/ehci-exynos.c @@ -18,7 +18,7 @@ #include <asm/arch/system.h> #include <asm/arch/power.h> #include <asm/gpio.h> -#include <asm-generic/errno.h> +#include <linux/errno.h> #include <linux/compat.h> #include "ehci.h" diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c index f5e3ae7..9c32921 100644 --- a/drivers/usb/host/ehci-fsl.c +++ b/drivers/usb/host/ehci-fsl.c @@ -118,17 +118,6 @@ static int ehci_fsl_probe(struct udevice *dev) return ehci_register(dev, hccr, hcor, &fsl_ehci_ops, 0, USB_INIT_HOST); } -static int ehci_fsl_remove(struct udevice *dev) -{ - int ret; - - ret = ehci_deregister(dev); - if (ret) - return ret; - - return 0; -} - static const struct udevice_id ehci_usb_ids[] = { { .compatible = "fsl-usb2-mph", }, { .compatible = "fsl-usb2-dr", }, @@ -141,7 +130,7 @@ U_BOOT_DRIVER(ehci_fsl) = { .of_match = ehci_usb_ids, .ofdata_to_platdata = ehci_fsl_ofdata_to_platdata, .probe = ehci_fsl_probe, - .remove = ehci_fsl_remove, + .remove = ehci_deregister, .ops = &ehci_usb_ops, .platdata_auto_alloc_size = sizeof(struct usb_platdata), .priv_auto_alloc_size = sizeof(struct ehci_fsl_priv), diff --git a/drivers/usb/host/ehci-generic.c b/drivers/usb/host/ehci-generic.c index e0377ca..2190adb 100644 --- a/drivers/usb/host/ehci-generic.c +++ b/drivers/usb/host/ehci-generic.c @@ -6,6 +6,7 @@ #include <common.h> #include <clk.h> +#include <reset.h> #include <asm/io.h> #include <dm.h> #include "ehci.h" @@ -37,6 +38,18 @@ static int ehci_usb_probe(struct udevice *dev) clk_free(&clk); } + for (i = 0; ; i++) { + struct reset_ctl reset; + int ret; + + ret = reset_get_by_index(dev, i, &reset); + if (ret < 0) + break; + if (reset_deassert(&reset)) + printf("failed to deassert reset %d\n", i); + reset_free(&reset); + } + hccr = map_physmem(dev_get_addr(dev), 0x100, MAP_NOCACHE); hcor = (struct ehci_hcor *)((uintptr_t)hccr + HC_LENGTH(ehci_readl(&hccr->cr_capbase))); @@ -44,11 +57,6 @@ static int ehci_usb_probe(struct udevice *dev) return ehci_register(dev, hccr, hcor, NULL, 0, USB_INIT_HOST); } -static int ehci_usb_remove(struct udevice *dev) -{ - return ehci_deregister(dev); -} - static const struct udevice_id ehci_usb_ids[] = { { .compatible = "generic-ehci" }, { } @@ -59,7 +67,7 @@ U_BOOT_DRIVER(ehci_generic) = { .id = UCLASS_USB, .of_match = ehci_usb_ids, .probe = ehci_usb_probe, - .remove = ehci_usb_remove, + .remove = ehci_deregister, .ops = &ehci_usb_ops, .priv_auto_alloc_size = sizeof(struct generic_ehci), .flags = DM_FLAG_ALLOC_PRIV_DMA, diff --git a/drivers/usb/host/ehci-marvell.c b/drivers/usb/host/ehci-marvell.c index 5b0f46a..253fcb3 100644 --- a/drivers/usb/host/ehci-marvell.c +++ b/drivers/usb/host/ehci-marvell.c @@ -94,17 +94,6 @@ static int ehci_mvebu_probe(struct udevice *dev) return ehci_register(dev, hccr, hcor, NULL, 0, USB_INIT_HOST); } -static int ehci_mvebu_remove(struct udevice *dev) -{ - int ret; - - ret = ehci_deregister(dev); - if (ret) - return ret; - - return 0; -} - static const struct udevice_id ehci_usb_ids[] = { { .compatible = "marvell,orion-ehci", }, { } @@ -115,7 +104,7 @@ U_BOOT_DRIVER(ehci_mvebu) = { .id = UCLASS_USB, .of_match = ehci_usb_ids, .probe = ehci_mvebu_probe, - .remove = ehci_mvebu_remove, + .remove = ehci_deregister, .ops = &ehci_usb_ops, .platdata_auto_alloc_size = sizeof(struct usb_platdata), .priv_auto_alloc_size = sizeof(struct ehci_mvebu_priv), diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c index 602fec5..48889c1 100644 --- a/drivers/usb/host/ehci-mx6.c +++ b/drivers/usb/host/ehci-mx6.c @@ -451,17 +451,6 @@ static int ehci_usb_probe(struct udevice *dev) return ehci_register(dev, hccr, hcor, &mx6_ehci_ops, 0, priv->init_type); } -static int ehci_usb_remove(struct udevice *dev) -{ - int ret; - - ret = ehci_deregister(dev); - if (ret) - return ret; - - return 0; -} - static const struct udevice_id mx6_usb_ids[] = { { .compatible = "fsl,imx27-usb" }, { } @@ -472,7 +461,7 @@ U_BOOT_DRIVER(usb_mx6) = { .id = UCLASS_USB, .of_match = mx6_usb_ids, .probe = ehci_usb_probe, - .remove = ehci_usb_remove, + .remove = ehci_deregister, .ops = &ehci_usb_ops, .platdata_auto_alloc_size = sizeof(struct usb_platdata), .priv_auto_alloc_size = sizeof(struct ehci_mx6_priv_data), diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c index f21a1fa..6fc2479 100644 --- a/drivers/usb/host/ehci-pci.c +++ b/drivers/usb/host/ehci-pci.c @@ -126,17 +126,6 @@ static int ehci_pci_probe(struct udevice *dev) return ehci_register(dev, hccr, hcor, NULL, 0, USB_INIT_HOST); } -static int ehci_pci_remove(struct udevice *dev) -{ - int ret; - - ret = ehci_deregister(dev); - if (ret) - return ret; - - return 0; -} - static const struct udevice_id ehci_pci_ids[] = { { .compatible = "ehci-pci" }, { } @@ -146,7 +135,7 @@ U_BOOT_DRIVER(ehci_pci) = { .name = "ehci_pci", .id = UCLASS_USB, .probe = ehci_pci_probe, - .remove = ehci_pci_remove, + .remove = ehci_deregister, .of_match = ehci_pci_ids, .ops = &ehci_usb_ops, .platdata_auto_alloc_size = sizeof(struct usb_platdata), diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c index 31d54ab..eb54df4 100644 --- a/drivers/usb/host/ehci-tegra.c +++ b/drivers/usb/host/ehci-tegra.c @@ -8,7 +8,7 @@ #include <common.h> #include <dm.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/io.h> #include <asm-generic/gpio.h> #include <asm/arch/clock.h> @@ -846,17 +846,6 @@ static int ehci_usb_probe(struct udevice *dev) plat->init_type); } -static int ehci_usb_remove(struct udevice *dev) -{ - int ret; - - ret = ehci_deregister(dev); - if (ret) - return ret; - - return 0; -} - static const struct udevice_id ehci_usb_ids[] = { { .compatible = "nvidia,tegra20-ehci", .data = USB_CTLR_T20 }, { .compatible = "nvidia,tegra30-ehci", .data = USB_CTLR_T30 }, @@ -871,7 +860,7 @@ U_BOOT_DRIVER(usb_ehci) = { .of_match = ehci_usb_ids, .ofdata_to_platdata = ehci_usb_ofdata_to_platdata, .probe = ehci_usb_probe, - .remove = ehci_usb_remove, + .remove = ehci_deregister, .ops = &ehci_usb_ops, .platdata_auto_alloc_size = sizeof(struct usb_platdata), .priv_auto_alloc_size = sizeof(struct fdt_usb), diff --git a/drivers/usb/host/ehci-zynq.c b/drivers/usb/host/ehci-zynq.c index 76642cd..1e3b800 100644 --- a/drivers/usb/host/ehci-zynq.c +++ b/drivers/usb/host/ehci-zynq.c @@ -73,17 +73,6 @@ static int ehci_zynq_probe(struct udevice *dev) return ehci_register(dev, hccr, hcor, NULL, 0, plat->init_type); } -static int ehci_zynq_remove(struct udevice *dev) -{ - int ret; - - ret = ehci_deregister(dev); - if (ret) - return ret; - - return 0; -} - static const struct udevice_id ehci_zynq_ids[] = { { .compatible = "xlnx,zynq-usb-2.20a" }, { } @@ -95,7 +84,7 @@ U_BOOT_DRIVER(ehci_zynq) = { .of_match = ehci_zynq_ids, .ofdata_to_platdata = ehci_zynq_ofdata_to_platdata, .probe = ehci_zynq_probe, - .remove = ehci_zynq_remove, + .remove = ehci_deregister, .ops = &ehci_usb_ops, .platdata_auto_alloc_size = sizeof(struct usb_platdata), .priv_auto_alloc_size = sizeof(struct zynq_ehci_priv), diff --git a/drivers/usb/host/xhci-exynos5.c b/drivers/usb/host/xhci-exynos5.c index 28416ed..82fcd84 100644 --- a/drivers/usb/host/xhci-exynos5.c +++ b/drivers/usb/host/xhci-exynos5.c @@ -24,7 +24,7 @@ #include <asm/arch/power.h> #include <asm/arch/xhci-exynos.h> #include <asm/gpio.h> -#include <asm-generic/errno.h> +#include <linux/errno.h> #include <linux/compat.h> #include <linux/usb/dwc3.h> diff --git a/drivers/usb/host/xhci-fsl.c b/drivers/usb/host/xhci-fsl.c index bdcd4f1..bda5b5f 100644 --- a/drivers/usb/host/xhci-fsl.c +++ b/drivers/usb/host/xhci-fsl.c @@ -10,7 +10,7 @@ #include <common.h> #include <usb.h> -#include <asm-generic/errno.h> +#include <linux/errno.h> #include <linux/compat.h> #include <linux/usb/xhci-fsl.h> #include <linux/usb/dwc3.h> @@ -129,15 +129,10 @@ static int xhci_fsl_probe(struct udevice *dev) static int xhci_fsl_remove(struct udevice *dev) { struct xhci_fsl_priv *priv = dev_get_priv(dev); - int ret; fsl_xhci_core_exit(&priv->ctx); - ret = xhci_deregister(dev); - if (ret) - return ret; - - return 0; + return xhci_deregister(dev); } static const struct udevice_id xhci_usb_ids[] = { diff --git a/drivers/usb/host/xhci-keystone.c b/drivers/usb/host/xhci-keystone.c index 924fb76..f322a80 100644 --- a/drivers/usb/host/xhci-keystone.c +++ b/drivers/usb/host/xhci-keystone.c @@ -14,7 +14,7 @@ #include <asm/io.h> #include <linux/usb/dwc3.h> #include <asm/arch/xhci-keystone.h> -#include <asm-generic/errno.h> +#include <linux/errno.h> #include <linux/list.h> #include "xhci.h" diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c index 3744452..62db51d 100644 --- a/drivers/usb/host/xhci-mem.c +++ b/drivers/usb/host/xhci-mem.c @@ -20,7 +20,7 @@ #include <usb.h> #include <malloc.h> #include <asm/cache.h> -#include <asm-generic/errno.h> +#include <linux/errno.h> #include "xhci.h" diff --git a/drivers/usb/host/xhci-omap.c b/drivers/usb/host/xhci-omap.c index fd19f79..b881b19 100644 --- a/drivers/usb/host/xhci-omap.c +++ b/drivers/usb/host/xhci-omap.c @@ -11,7 +11,7 @@ #include <common.h> #include <usb.h> -#include <asm-generic/errno.h> +#include <linux/errno.h> #include <asm/omap_common.h> #include <asm/arch/cpu.h> #include <asm/arch/sys_proto.h> diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c index 5a1391f..2675a8f 100644 --- a/drivers/usb/host/xhci-ring.c +++ b/drivers/usb/host/xhci-ring.c @@ -18,7 +18,7 @@ #include <asm/byteorder.h> #include <usb.h> #include <asm/unaligned.h> -#include <asm-generic/errno.h> +#include <linux/errno.h> #include "xhci.h" diff --git a/drivers/usb/host/xhci-rockchip.c b/drivers/usb/host/xhci-rockchip.c new file mode 100644 index 0000000..8cbcb8f --- /dev/null +++ b/drivers/usb/host/xhci-rockchip.c @@ -0,0 +1,211 @@ +/* + * Copyright (c) 2016 Rockchip, Inc. + * Authors: Daniel Meng <daniel.meng@rock-chips.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#include <common.h> +#include <dm.h> +#include <fdtdec.h> +#include <libfdt.h> +#include <malloc.h> +#include <usb.h> +#include <watchdog.h> +#include <asm/gpio.h> +#include <linux/errno.h> +#include <linux/compat.h> +#include <linux/usb/dwc3.h> + +#include "xhci.h" + +DECLARE_GLOBAL_DATA_PTR; + +struct rockchip_xhci_platdata { + fdt_addr_t hcd_base; + fdt_addr_t phy_base; + struct gpio_desc vbus_gpio; +}; + +/* + * Contains pointers to register base addresses + * for the usb controller. + */ +struct rockchip_xhci { + struct usb_platdata usb_plat; + struct xhci_ctrl ctrl; + struct xhci_hccr *hcd; + struct dwc3 *dwc3_reg; +}; + +static int xhci_usb_ofdata_to_platdata(struct udevice *dev) +{ + struct rockchip_xhci_platdata *plat = dev_get_platdata(dev); + struct udevice *child; + int ret = 0; + + /* + * Get the base address for XHCI controller from the device node + */ + plat->hcd_base = dev_get_addr(dev); + if (plat->hcd_base == FDT_ADDR_T_NONE) { + debug("Can't get the XHCI register base address\n"); + return -ENXIO; + } + + /* Get the base address for usbphy from the device node */ + for (device_find_first_child(dev, &child); child; + device_find_next_child(&child)) { + if (!of_device_is_compatible(child, "rockchip,rk3399-usb3-phy")) + continue; + plat->phy_base = dev_get_addr(child); + break; + } + + if (plat->phy_base == FDT_ADDR_T_NONE) { + debug("Can't get the usbphy register address\n"); + return -ENXIO; + } + + /* Vbus gpio */ + ret = gpio_request_by_name(dev, "rockchip,vbus-gpio", 0, + &plat->vbus_gpio, GPIOD_IS_OUT); + if (ret) + debug("rockchip,vbus-gpio node missing!"); + + return 0; +} + +/* + * rockchip_dwc3_phy_setup() - Configure USB PHY Interface of DWC3 Core + * @dwc: Pointer to our controller context structure + * @dev: Pointer to ulcass device + */ +static void rockchip_dwc3_phy_setup(struct dwc3 *dwc3_reg, + struct udevice *dev) +{ + u32 reg; + const void *blob = gd->fdt_blob; + u32 utmi_bits; + + /* Set dwc3 usb2 phy config */ + reg = readl(&dwc3_reg->g_usb2phycfg[0]); + + if (fdtdec_get_bool(blob, dev->of_offset, + "snps,dis-enblslpm-quirk")) + reg &= ~DWC3_GUSB2PHYCFG_ENBLSLPM; + + utmi_bits = fdtdec_get_int(blob, dev->of_offset, + "snps,phyif-utmi-bits", -1); + if (utmi_bits == 16) { + reg |= DWC3_GUSB2PHYCFG_PHYIF; + reg &= ~DWC3_GUSB2PHYCFG_USBTRDTIM_MASK; + reg |= DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT; + } else if (utmi_bits == 8) { + reg &= ~DWC3_GUSB2PHYCFG_PHYIF; + reg &= ~DWC3_GUSB2PHYCFG_USBTRDTIM_MASK; + reg |= DWC3_GUSB2PHYCFG_USBTRDTIM_8BIT; + } + + if (fdtdec_get_bool(blob, dev->of_offset, + "snps,dis-u2-freeclk-exists-quirk")) + reg &= ~DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS; + + if (fdtdec_get_bool(blob, dev->of_offset, + "snps,dis-u2-susphy-quirk")) + reg &= ~DWC3_GUSB2PHYCFG_SUSPHY; + + writel(reg, &dwc3_reg->g_usb2phycfg[0]); +} + +static int rockchip_xhci_core_init(struct rockchip_xhci *rkxhci, + struct udevice *dev) +{ + int ret; + + ret = dwc3_core_init(rkxhci->dwc3_reg); + if (ret) { + debug("failed to initialize core\n"); + return ret; + } + + rockchip_dwc3_phy_setup(rkxhci->dwc3_reg, dev); + + /* We are hard-coding DWC3 core to Host Mode */ + dwc3_set_mode(rkxhci->dwc3_reg, DWC3_GCTL_PRTCAP_HOST); + + return 0; +} + +static int rockchip_xhci_core_exit(struct rockchip_xhci *rkxhci) +{ + return 0; +} + +static int xhci_usb_probe(struct udevice *dev) +{ + struct rockchip_xhci_platdata *plat = dev_get_platdata(dev); + struct rockchip_xhci *ctx = dev_get_priv(dev); + struct xhci_hcor *hcor; + int ret; + + ctx->hcd = (struct xhci_hccr *)plat->hcd_base; + ctx->dwc3_reg = (struct dwc3 *)((char *)(ctx->hcd) + DWC3_REG_OFFSET); + hcor = (struct xhci_hcor *)((uint64_t)ctx->hcd + + HC_LENGTH(xhci_readl(&ctx->hcd->cr_capbase))); + + /* setup the Vbus gpio here */ + if (dm_gpio_is_valid(&plat->vbus_gpio)) + dm_gpio_set_value(&plat->vbus_gpio, 1); + + ret = rockchip_xhci_core_init(ctx, dev); + if (ret) { + debug("XHCI: failed to initialize controller\n"); + return ret; + } + + return xhci_register(dev, ctx->hcd, hcor); +} + +static int xhci_usb_remove(struct udevice *dev) +{ + struct rockchip_xhci *ctx = dev_get_priv(dev); + int ret; + + ret = xhci_deregister(dev); + if (ret) + return ret; + ret = rockchip_xhci_core_exit(ctx); + if (ret) + return ret; + + return 0; +} + +static const struct udevice_id xhci_usb_ids[] = { + { .compatible = "rockchip,rk3399-xhci" }, + { } +}; + +U_BOOT_DRIVER(usb_xhci) = { + .name = "xhci_rockchip", + .id = UCLASS_USB, + .of_match = xhci_usb_ids, + .ofdata_to_platdata = xhci_usb_ofdata_to_platdata, + .probe = xhci_usb_probe, + .remove = xhci_usb_remove, + .ops = &xhci_usb_ops, + .bind = dm_scan_fdt_dev, + .platdata_auto_alloc_size = sizeof(struct rockchip_xhci_platdata), + .priv_auto_alloc_size = sizeof(struct rockchip_xhci), + .flags = DM_FLAG_ALLOC_PRIV_DMA, +}; + +static const struct udevice_id usb_phy_ids[] = { + { .compatible = "rockchip,rk3399-usb3-phy" }, + { } +}; + +U_BOOT_DRIVER(usb_phy) = { + .name = "usb_phy_rockchip", + .of_match = usb_phy_ids, +}; diff --git a/drivers/usb/host/xhci-uniphier.c b/drivers/usb/host/xhci-uniphier.c deleted file mode 100644 index 1b3f3d2..0000000 --- a/drivers/usb/host/xhci-uniphier.c +++ /dev/null @@ -1,85 +0,0 @@ -/* - * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <linux/err.h> -#include <linux/io.h> -#include <usb.h> -#include <fdtdec.h> -#include "xhci.h" - -static int get_uniphier_xhci_base(int index, struct xhci_hccr **base) -{ - DECLARE_GLOBAL_DATA_PTR; - int node_list[2]; - fdt_addr_t addr; - int count; - - count = fdtdec_find_aliases_for_id(gd->fdt_blob, "usb", - COMPAT_SOCIONEXT_XHCI, node_list, - ARRAY_SIZE(node_list)); - - if (index >= count) - return -ENODEV; - - addr = fdtdec_get_addr(gd->fdt_blob, node_list[index], "reg"); - if (addr == FDT_ADDR_T_NONE) - return -ENODEV; - - *base = (struct xhci_hccr *)addr; - - return 0; -} - -#define USB3_RST_CTRL 0x00100040 -#define IOMMU_RST_N (1 << 5) -#define LINK_RST_N (1 << 4) - -static void uniphier_xhci_reset(void __iomem *base, int on) -{ - u32 tmp; - - tmp = readl(base + USB3_RST_CTRL); - - if (on) - tmp &= ~(IOMMU_RST_N | LINK_RST_N); - else - tmp |= IOMMU_RST_N | LINK_RST_N; - - writel(tmp, base + USB3_RST_CTRL); -} - -int xhci_hcd_init(int index, struct xhci_hccr **hccr, struct xhci_hcor **hcor) -{ - int ret; - struct xhci_hccr *cr; - struct xhci_hcor *or; - - ret = get_uniphier_xhci_base(index, &cr); - if (ret < 0) - return ret; - - uniphier_xhci_reset(cr, 0); - - or = (void *)cr + HC_LENGTH(xhci_readl(&cr->cr_capbase)); - - *hccr = cr; - *hcor = or; - - return 0; -} - -void xhci_hcd_stop(int index) -{ - int ret; - struct xhci_hccr *cr; - - ret = get_uniphier_xhci_base(index, &cr); - if (ret < 0) - return; - - uniphier_xhci_reset(cr, 1); -} diff --git a/drivers/usb/host/xhci-zynqmp.c b/drivers/usb/host/xhci-zynqmp.c index a735369..cec1bc4 100644 --- a/drivers/usb/host/xhci-zynqmp.c +++ b/drivers/usb/host/xhci-zynqmp.c @@ -12,7 +12,7 @@ #include <common.h> #include <usb.h> -#include <asm-generic/errno.h> +#include <linux/errno.h> #include <asm/arch-zynqmp/hardware.h> #include <linux/compat.h> #include <linux/usb/dwc3.h> diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c index cb8a04b..3201177 100644 --- a/drivers/usb/host/xhci.c +++ b/drivers/usb/host/xhci.c @@ -28,7 +28,7 @@ #include <watchdog.h> #include <asm/cache.h> #include <asm/unaligned.h> -#include <asm-generic/errno.h> +#include <linux/errno.h> #include "xhci.h" #ifndef CONFIG_USB_MAX_CONTROLLER_COUNT diff --git a/drivers/usb/musb-new/musb_core.c b/drivers/usb/musb-new/musb_core.c index dd0443c..84cb21b 100644 --- a/drivers/usb/musb-new/musb_core.c +++ b/drivers/usb/musb-new/musb_core.c @@ -79,7 +79,7 @@ #else #include <common.h> #include <usb.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <linux/usb/ch9.h> #include <linux/usb/gadget.h> #include <linux/usb/musb.h> diff --git a/drivers/usb/musb-new/musb_core.h b/drivers/usb/musb-new/musb_core.h index 2fe4ed5..4ae0ae2 100644 --- a/drivers/usb/musb-new/musb_core.h +++ b/drivers/usb/musb-new/musb_core.h @@ -21,7 +21,7 @@ #include <linux/usb.h> #include <linux/usb/otg.h> #else -#include <asm/errno.h> +#include <linux/errno.h> #endif #include <linux/usb/ch9.h> #include <linux/usb/gadget.h> diff --git a/drivers/usb/musb-new/musb_gadget.h b/drivers/usb/musb-new/musb_gadget.h index ddd567b..bd1d4f6 100644 --- a/drivers/usb/musb-new/musb_gadget.h +++ b/drivers/usb/musb-new/musb_gadget.h @@ -14,7 +14,7 @@ #include <linux/list.h> #ifdef __UBOOT__ #include <asm/byteorder.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <linux/usb/ch9.h> #include <linux/usb/gadget.h> #endif diff --git a/drivers/usb/musb-new/musb_uboot.c b/drivers/usb/musb-new/musb_uboot.c index 6ce528c..ea71f75 100644 --- a/drivers/usb/musb-new/musb_uboot.c +++ b/drivers/usb/musb-new/musb_uboot.c @@ -4,7 +4,7 @@ #ifdef CONFIG_ARCH_SUNXI #include <asm/arch/usb_phy.h> #endif -#include <asm/errno.h> +#include <linux/errno.h> #include <linux/usb/ch9.h> #include <linux/usb/gadget.h> diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c index c016a0b..469377f 100644 --- a/drivers/usb/musb-new/sunxi.c +++ b/drivers/usb/musb-new/sunxi.c @@ -201,10 +201,11 @@ static irqreturn_t sunxi_musb_interrupt(int irq, void *__hci) /* musb_core does not call enable / disable in a balanced manner <sigh> */ static bool enabled = false; -static struct musb *sunxi_musb; static int sunxi_musb_enable(struct musb *musb) { + int ret; + pr_debug("%s():\n", __func__); musb_ep_select(musb->mregs, 0); @@ -217,26 +218,17 @@ static int sunxi_musb_enable(struct musb *musb) musb_writeb(musb->mregs, USBC_REG_o_VEND0, 0); if (is_host_enabled(musb)) { - int id = sunxi_usb_phy_id_detect(0); - - if (id == 1 && sunxi_usb_phy_power_is_on(0)) - sunxi_usb_phy_power_off(0); - - if (!sunxi_usb_phy_power_is_on(0)) { - int vbus = sunxi_usb_phy_vbus_detect(0); - if (vbus == 1) { - printf("A charger is plugged into the OTG: "); - return -ENODEV; - } + ret = sunxi_usb_phy_vbus_detect(0); + if (ret == 1) { + printf("A charger is plugged into the OTG: "); + return -ENODEV; } - - if (id == 1) { + ret = sunxi_usb_phy_id_detect(0); + if (ret == 1) { printf("No host cable detected: "); return -ENODEV; } - - if (!sunxi_usb_phy_power_is_on(0)) - sunxi_usb_phy_power_on(0); + sunxi_usb_phy_power_on(0); /* port power on */ } USBC_ForceVbusValidToHigh(musb->mregs); @@ -252,6 +244,9 @@ static void sunxi_musb_disable(struct musb *musb) if (!enabled) return; + if (is_host_enabled(musb)) + sunxi_usb_phy_power_off(0); /* port power off */ + USBC_ForceVbusValidToLow(musb->mregs); mdelay(200); /* Wait for the current session to timeout */ @@ -313,7 +308,9 @@ static struct musb_hdrc_platform_data musb_plat = { }; #ifdef CONFIG_USB_MUSB_HOST -int musb_usb_probe(struct udevice *dev) +static int musb_usb_remove(struct udevice *dev); + +static int musb_usb_probe(struct udevice *dev) { struct musb_host_data *host = dev_get_priv(dev); struct usb_bus_priv *priv = dev_get_uclass_priv(dev); @@ -321,23 +318,21 @@ int musb_usb_probe(struct udevice *dev) priv->desc_before_addr = true; - if (!sunxi_musb) { - sunxi_musb = musb_init_controller(&musb_plat, NULL, - (void *)SUNXI_USB0_BASE); - } - - host->host = sunxi_musb; + host->host = musb_init_controller(&musb_plat, NULL, + (void *)SUNXI_USB0_BASE); if (!host->host) return -EIO; ret = musb_lowlevel_init(host); if (ret == 0) printf("MUSB OTG\n"); + else + musb_usb_remove(dev); return ret; } -int musb_usb_remove(struct udevice *dev) +static int musb_usb_remove(struct udevice *dev) { struct musb_host_data *host = dev_get_priv(dev); struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; @@ -350,6 +345,9 @@ int musb_usb_remove(struct udevice *dev) #endif clrbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_USB0); + free(host->host); + host->host = NULL; + return 0; } diff --git a/drivers/usb/phy/omap_usb_phy.c b/drivers/usb/phy/omap_usb_phy.c index 1993da1..7c7fba2 100644 --- a/drivers/usb/phy/omap_usb_phy.c +++ b/drivers/usb/phy/omap_usb_phy.c @@ -11,7 +11,7 @@ #include <common.h> #include <usb.h> -#include <asm-generic/errno.h> +#include <linux/errno.h> #include <asm/omap_common.h> #include <asm/arch/cpu.h> #include <asm/arch/sys_proto.h> diff --git a/drivers/video/ati_radeon_fb.c b/drivers/video/ati_radeon_fb.c index 5748951..07a29ea 100644 --- a/drivers/video/ati_radeon_fb.c +++ b/drivers/video/ati_radeon_fb.c @@ -22,7 +22,7 @@ #include <bios_emul.h> #include <pci.h> #include <asm/processor.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/io.h> #include <malloc.h> #include <video_fb.h> diff --git a/drivers/video/bridge/ptn3460.c b/drivers/video/bridge/ptn3460.c index 2e2ae7c..f9d3720 100644 --- a/drivers/video/bridge/ptn3460.c +++ b/drivers/video/bridge/ptn3460.c @@ -11,14 +11,9 @@ static int ptn3460_attach(struct udevice *dev) { - int ret; - debug("%s: %s\n", __func__, dev->name); - ret = video_bridge_set_active(dev, true); - if (ret) - return ret; - return 0; + return video_bridge_set_active(dev, true); } struct video_bridge_ops ptn3460_ops = { diff --git a/drivers/video/broadwell_igd.c b/drivers/video/broadwell_igd.c index ce4f296..4286fd0 100644 --- a/drivers/video/broadwell_igd.c +++ b/drivers/video/broadwell_igd.c @@ -323,10 +323,7 @@ err: static unsigned long gtt_read(struct broadwell_igd_priv *priv, unsigned long reg) { - u32 val; - - val = readl(priv->regs + reg); - return val; + return readl(priv->regs + reg); } static void gtt_write(struct broadwell_igd_priv *priv, unsigned long reg, diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c index 468f385d..bbd384d 100644 --- a/drivers/video/da8xx-fb.c +++ b/drivers/video/da8xx-fb.c @@ -19,7 +19,7 @@ #include <linux/list.h> #include <linux/fb.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/io.h> #include <asm/arch/hardware.h> diff --git a/drivers/video/exynos/exynos_dp_lowlevel.c b/drivers/video/exynos/exynos_dp_lowlevel.c index f978473..aae78a8 100644 --- a/drivers/video/exynos/exynos_dp_lowlevel.c +++ b/drivers/video/exynos/exynos_dp_lowlevel.c @@ -881,11 +881,7 @@ void exynos_dp_set_lane_count(struct exynos_dp *dp_regs, unsigned char count) unsigned int exynos_dp_get_lane_count(struct exynos_dp *dp_regs) { - unsigned int reg; - - reg = readl(&dp_regs->lane_count_set); - - return reg; + return readl(&dp_regs->lane_count_set); } unsigned char exynos_dp_get_lanex_pre_emphasis(struct exynos_dp *dp_regs, diff --git a/drivers/video/exynos/exynos_fb.c b/drivers/video/exynos/exynos_fb.c index 97228cd..5483d66 100644 --- a/drivers/video/exynos/exynos_fb.c +++ b/drivers/video/exynos/exynos_fb.c @@ -27,7 +27,7 @@ #include <asm/arch/pinmux.h> #include <asm/arch/system.h> #include <asm/gpio.h> -#include <asm-generic/errno.h> +#include <linux/errno.h> DECLARE_GLOBAL_DATA_PTR; diff --git a/drivers/video/ipu_common.c b/drivers/video/ipu_common.c index 5676a0f..f8d4488 100644 --- a/drivers/video/ipu_common.c +++ b/drivers/video/ipu_common.c @@ -16,7 +16,7 @@ #include <linux/types.h> #include <linux/err.h> #include <asm/io.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/arch/imx-regs.h> #include <asm/arch/crm_regs.h> #include <div64.h> diff --git a/drivers/video/ipu_disp.c b/drivers/video/ipu_disp.c index cbac9f7..47d7417 100644 --- a/drivers/video/ipu_disp.c +++ b/drivers/video/ipu_disp.c @@ -15,7 +15,7 @@ #include <common.h> #include <linux/types.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/io.h> #include <asm/arch/imx-regs.h> #include <asm/arch/sys_proto.h> diff --git a/drivers/video/mx3fb.c b/drivers/video/mx3fb.c index 3f10d5c..51d06d6 100644 --- a/drivers/video/mx3fb.c +++ b/drivers/video/mx3fb.c @@ -12,7 +12,7 @@ #include <asm/arch/imx-regs.h> #include <asm/arch/clock.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/io.h> #include "videomodes.h" diff --git a/drivers/video/mxc_ipuv3_fb.c b/drivers/video/mxc_ipuv3_fb.c index 265274b..0d0a0a9 100644 --- a/drivers/video/mxc_ipuv3_fb.c +++ b/drivers/video/mxc_ipuv3_fb.c @@ -12,7 +12,7 @@ */ #include <common.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/global_data.h> #include <linux/string.h> #include <linux/list.h> diff --git a/drivers/video/mxsfb.c b/drivers/video/mxsfb.c index ddbb118..3cc03ca 100644 --- a/drivers/video/mxsfb.c +++ b/drivers/video/mxsfb.c @@ -12,7 +12,7 @@ #include <asm/arch/imx-regs.h> #include <asm/arch/clock.h> #include <asm/arch/sys_proto.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/io.h> #include <asm/imx-common/dma.h> diff --git a/drivers/video/s3c-fb.c b/drivers/video/s3c-fb.c index 521eb75..bea3e69 100644 --- a/drivers/video/s3c-fb.c +++ b/drivers/video/s3c-fb.c @@ -11,7 +11,7 @@ #include <malloc.h> #include <video_fb.h> -#include <asm/errno.h> +#include <linux/errno.h> #include <asm/io.h> #include <asm/arch/s3c24x0_cpu.h> diff --git a/drivers/video/tegra124/display.c b/drivers/video/tegra124/display.c index 2f1f0df..d8999c3 100644 --- a/drivers/video/tegra124/display.c +++ b/drivers/video/tegra124/display.c @@ -326,13 +326,7 @@ static int display_update_config_from_edid(struct udevice *dp_dev, int *panel_bppp, struct display_timing *timing) { - int ret; - - ret = display_read_timing(dp_dev, timing); - if (ret) - return ret; - - return 0; + return display_read_timing(dp_dev, timing); } static int display_init(struct udevice *dev, void *lcdbase, diff --git a/drivers/video/vidconsole-uclass.c b/drivers/video/vidconsole-uclass.c index c8cc05e..e9a90b1 100644 --- a/drivers/video/vidconsole-uclass.c +++ b/drivers/video/vidconsole-uclass.c @@ -190,7 +190,6 @@ static int vidconsole_post_probe(struct udevice *dev) { struct vidconsole_priv *priv = dev_get_uclass_priv(dev); struct stdio_dev *sdev = &priv->sdev; - int ret; if (!priv->tab_width_frac) priv->tab_width_frac = VID_TO_POS(priv->x_charsize) * 8; @@ -206,11 +205,8 @@ static int vidconsole_post_probe(struct udevice *dev) sdev->putc = vidconsole_putc; sdev->puts = vidconsole_puts; sdev->priv = dev; - ret = stdio_register(sdev); - if (ret) - return ret; - return 0; + return stdio_register(sdev); } UCLASS_DRIVER(vidconsole) = { |