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-rw-r--r--drivers/dfu/dfu.c4
-rw-r--r--drivers/dfu/dfu_mmc.c2
-rw-r--r--drivers/i2c/tegra_i2c.c4
-rw-r--r--drivers/misc/pca9551_led.c32
-rw-r--r--drivers/mmc/tegra_mmc.c18
-rw-r--r--drivers/net/keystone_net.c10
-rw-r--r--drivers/net/zynq_gem.c26
-rw-r--r--drivers/pci/pci-uclass.c62
-rw-r--r--drivers/pci/pci_auto.c75
-rw-r--r--drivers/pci/pci_common.c7
-rw-r--r--drivers/spi/zynq_spi.c4
-rw-r--r--drivers/usb/host/ehci-tegra.c31
12 files changed, 200 insertions, 75 deletions
diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c
index 0560afa..675162d 100644
--- a/drivers/dfu/dfu.c
+++ b/drivers/dfu/dfu.c
@@ -198,9 +198,9 @@ int dfu_write(struct dfu_entity *dfu, void *buf, int size, int blk_seq_num)
{
int ret;
- debug("%s: name: %s buf: 0x%p size: 0x%x p_num: 0x%x offset: 0x%llx bufoffset: 0x%x\n",
+ debug("%s: name: %s buf: 0x%p size: 0x%x p_num: 0x%x offset: 0x%llx bufoffset: 0x%lx\n",
__func__, dfu->name, buf, size, blk_seq_num, dfu->offset,
- dfu->i_buf - dfu->i_buf_start);
+ (unsigned long)(dfu->i_buf - dfu->i_buf_start));
if (!dfu->inited) {
/* initial state */
diff --git a/drivers/dfu/dfu_mmc.c b/drivers/dfu/dfu_mmc.c
index fd865e1..2a780f7 100644
--- a/drivers/dfu/dfu_mmc.c
+++ b/drivers/dfu/dfu_mmc.c
@@ -156,7 +156,7 @@ static int mmc_file_op(enum dfu_op op, struct dfu_entity *dfu,
dfu->data.mmc.dev, dfu->data.mmc.part);
if (op != DFU_OP_SIZE)
- sprintf(cmd_buf + strlen(cmd_buf), " 0x%x", (unsigned int)buf);
+ sprintf(cmd_buf + strlen(cmd_buf), " %p", buf);
sprintf(cmd_buf + strlen(cmd_buf), " %s", dfu->name);
diff --git a/drivers/i2c/tegra_i2c.c b/drivers/i2c/tegra_i2c.c
index fc95646..a428978 100644
--- a/drivers/i2c/tegra_i2c.c
+++ b/drivers/i2c/tegra_i2c.c
@@ -235,7 +235,7 @@ static int send_recv_packets(struct i2c_bus *i2c_bus,
if ((words == 1) && last_bytes) {
local = 0;
memcpy(&local, dptr, last_bytes);
- } else if ((unsigned)dptr & 3) {
+ } else if ((unsigned long)dptr & 3) {
memcpy(&local, dptr, sizeof(u32));
} else {
local = *wptr;
@@ -258,7 +258,7 @@ static int send_recv_packets(struct i2c_bus *i2c_bus,
local = readl(&control->rx_fifo);
if ((words == 1) && last_bytes)
memcpy(dptr, (char *)&local, last_bytes);
- else if ((unsigned)dptr & 3)
+ else if ((unsigned long)dptr & 3)
memcpy(dptr, &local, sizeof(u32));
else
*wptr = local;
diff --git a/drivers/misc/pca9551_led.c b/drivers/misc/pca9551_led.c
index 79b1e20..d4034f6 100644
--- a/drivers/misc/pca9551_led.c
+++ b/drivers/misc/pca9551_led.c
@@ -32,7 +32,10 @@ struct pca9551_blink_rate {
u8 pwm; /* Pulse width modulation, see PCA9551_7.pdf p. 6 */
};
-static int freq0, freq1;
+static int freq_last = -1;
+static int mask_last = -1;
+static int idx_last = -1;
+static int mode_last;
static int pca9551_led_get_state(int led, int *state)
{
@@ -135,21 +138,30 @@ void __led_blink(led_id_t mask, int freq)
{
struct pca9551_blink_rate rate;
int mode;
- int blink;
+ int idx;
- if ((freq0 == 0) || (freq == freq0)) {
- blink = 0;
- mode = PCA9551_LED_STATE_BLINK0;
- freq0 = freq;
+ if ((freq == freq_last) || (mask == mask_last)) {
+ idx = idx_last;
+ mode = mode_last;
} else {
- blink = 1;
- mode = PCA9551_LED_STATE_BLINK1;
- freq1 = freq;
+ /* Toggle blink index */
+ if (idx_last == 0) {
+ idx = 1;
+ mode = PCA9551_LED_STATE_BLINK1;
+ } else {
+ idx = 0;
+ mode = PCA9551_LED_STATE_BLINK0;
+ }
+
+ idx_last = idx;
+ mode_last = mode;
}
+ freq_last = freq;
+ mask_last = mask;
rate.psc = ((freq * 38) / 1000) - 1;
rate.pwm = 128; /* 50% duty cycle */
- pca9551_led_set_blink_rate(blink, rate);
+ pca9551_led_set_blink_rate(idx, rate);
pca9551_led_set_state(mask, mode);
}
diff --git a/drivers/mmc/tegra_mmc.c b/drivers/mmc/tegra_mmc.c
index d555692..6f8b4d0 100644
--- a/drivers/mmc/tegra_mmc.c
+++ b/drivers/mmc/tegra_mmc.c
@@ -2,7 +2,7 @@
* (C) Copyright 2009 SAMSUNG Electronics
* Minkyu Kang <mk7.kang@samsung.com>
* Jaehoon Chung <jh80.chung@samsung.com>
- * Portions Copyright 2011-2013 NVIDIA Corporation
+ * Portions Copyright 2011-2015 NVIDIA Corporation
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -67,7 +67,7 @@ static void mmc_prepare_data(struct mmc_host *host, struct mmc_data *data,
bbstate->bounce_buffer, bbstate->user_buffer, data->blocks,
data->blocksize);
- writel((u32)bbstate->bounce_buffer, &host->reg->sysad);
+ writel((u32)(unsigned long)bbstate->bounce_buffer, &host->reg->sysad);
/*
* DMASEL[4:3]
* 00 = Selects SDMA
@@ -233,8 +233,8 @@ static int mmc_send_cmd_bounced(struct mmc *mmc, struct mmc_cmd *cmd,
if (cmd->resp_type & MMC_RSP_136) {
/* CRC is stripped so we need to do some shifting. */
for (i = 0; i < 4; i++) {
- unsigned int offset =
- (unsigned int)(&host->reg->rspreg3 - i);
+ unsigned long offset =
+ (unsigned long)(&host->reg->rspreg3 - i);
cmd->response[i] = readl(offset) << 8;
if (i != 3) {
@@ -668,6 +668,16 @@ void tegra_mmc_init(void)
const void *blob = gd->fdt_blob;
debug("%s entry\n", __func__);
+ /* See if any Tegra210 MMC controllers are present */
+ count = fdtdec_find_aliases_for_id(blob, "sdhci",
+ COMPAT_NVIDIA_TEGRA210_SDMMC, node_list,
+ CONFIG_SYS_MMC_MAX_DEVICE);
+ debug("%s: count of Tegra210 sdhci nodes is %d\n", __func__, count);
+ if (process_nodes(blob, node_list, count)) {
+ printf("%s: Error processing T30 mmc node(s)!\n", __func__);
+ return;
+ }
+
/* See if any Tegra124 MMC controllers are present */
count = fdtdec_find_aliases_for_id(blob, "sdhci",
COMPAT_NVIDIA_TEGRA124_SDMMC, node_list,
diff --git a/drivers/net/keystone_net.c b/drivers/net/keystone_net.c
index 0c5fdee..67b5702 100644
--- a/drivers/net/keystone_net.c
+++ b/drivers/net/keystone_net.c
@@ -512,6 +512,13 @@ static int keystone2_eth_rcv_packet(struct eth_device *dev)
return pkt_size;
}
+#ifdef CONFIG_MCAST_TFTP
+static int keystone2_eth_bcast_addr(struct eth_device *dev, u32 ip, u8 set)
+{
+ return 0;
+}
+#endif
+
/*
* This function initializes the EMAC hardware.
*/
@@ -537,6 +544,9 @@ int keystone2_emac_initialize(struct eth_priv_t *eth_priv)
dev->halt = keystone2_eth_close;
dev->send = keystone2_eth_send_packet;
dev->recv = keystone2_eth_rcv_packet;
+#ifdef CONFIG_MCAST_TFTP
+ dev->mcast = keystone2_eth_bcast_addr;
+#endif
eth_register(dev);
diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c
index c723dbb..b2006df 100644
--- a/drivers/net/zynq_gem.c
+++ b/drivers/net/zynq_gem.c
@@ -20,6 +20,7 @@
#include <phy.h>
#include <miiphy.h>
#include <watchdog.h>
+#include <asm/system.h>
#include <asm/arch/hardware.h>
#include <asm/arch/sys_proto.h>
@@ -58,7 +59,14 @@
#define ZYNQ_GEM_NWCFG_MDCCLKDIV 0x000080000 /* Div pclk by 32, 80MHz */
#define ZYNQ_GEM_NWCFG_MDCCLKDIV2 0x0000c0000 /* Div pclk by 48, 120MHz */
-#define ZYNQ_GEM_NWCFG_INIT (ZYNQ_GEM_NWCFG_FDEN | \
+#ifdef CONFIG_ARM64
+# define ZYNQ_GEM_DBUS_WIDTH (1 << 21) /* 64 bit bus */
+#else
+# define ZYNQ_GEM_DBUS_WIDTH (0 << 21) /* 32 bit bus */
+#endif
+
+#define ZYNQ_GEM_NWCFG_INIT (ZYNQ_GEM_DBUS_WIDTH | \
+ ZYNQ_GEM_NWCFG_FDEN | \
ZYNQ_GEM_NWCFG_FSREM | \
ZYNQ_GEM_NWCFG_MDCCLKDIV)
@@ -130,7 +138,7 @@ struct emac_bd {
u32 status;
};
-#define RX_BUF 3
+#define RX_BUF 32
/* Page table entries are set to 1MB, or multiples of 1MB
* (not < 1MB). driver uses less bd's so use 1MB bdspace.
*/
@@ -155,7 +163,7 @@ struct zynq_gem_priv {
static inline int mdio_wait(struct eth_device *dev)
{
struct zynq_gem_regs *regs = (struct zynq_gem_regs *)dev->iobase;
- u32 timeout = 200;
+ u32 timeout = 20000;
/* Wait till MDIO interface is ready to accept a new transaction. */
while (--timeout) {
@@ -395,12 +403,18 @@ static int zynq_gem_send(struct eth_device *dev, void *ptr, int len)
priv->tx_bd->addr = (u32)ptr;
priv->tx_bd->status = (len & ZYNQ_GEM_TXBUF_FRMLEN_MASK) |
- ZYNQ_GEM_TXBUF_LAST_MASK;
+ ZYNQ_GEM_TXBUF_LAST_MASK |
+ ZYNQ_GEM_TXBUF_WRAP_MASK;
addr = (u32) ptr;
addr &= ~(ARCH_DMA_MINALIGN - 1);
size = roundup(len, ARCH_DMA_MINALIGN);
flush_dcache_range(addr, addr + size);
+
+ addr = (u32)priv->rxbuffers;
+ addr &= ~(ARCH_DMA_MINALIGN - 1);
+ size = roundup((RX_BUF * PKTSIZE_ALIGN), ARCH_DMA_MINALIGN);
+ flush_dcache_range(addr, addr + size);
barrier();
/* Start transmit */
@@ -436,8 +450,6 @@ static int zynq_gem_recv(struct eth_device *dev)
if (frame_len) {
u32 addr = current_bd->addr & ZYNQ_GEM_RXBUF_ADD_MASK;
addr &= ~(ARCH_DMA_MINALIGN - 1);
- u32 size = roundup(frame_len, ARCH_DMA_MINALIGN);
- invalidate_dcache_range(addr, addr + size);
net_process_received_packet((u8 *)addr, frame_len);
@@ -511,7 +523,7 @@ int zynq_gem_initialize(bd_t *bis, phys_addr_t base_addr,
priv->rxbuffers = memalign(ARCH_DMA_MINALIGN, RX_BUF * PKTSIZE_ALIGN);
memset(priv->rxbuffers, 0, RX_BUF * PKTSIZE_ALIGN);
- /* Align bd_space to 1MB */
+ /* Align bd_space to MMU_SECTION_SHIFT */
bd_space = memalign(1 << MMU_SECTION_SHIFT, BD_SPACE);
mmu_set_region_dcache_behaviour((phys_addr_t)bd_space,
BD_SPACE, DCACHE_OFF);
diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index 3be76c9..c7d93f9 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -207,8 +207,7 @@ int pci_write_config(pci_dev_t bdf, int offset, unsigned long value,
if (ret)
return ret;
- return pci_bus_write_config(bus, PCI_MASK_BUS(bdf), offset, value,
- size);
+ return pci_bus_write_config(bus, bdf, offset, value, size);
}
int pci_write_config32(pci_dev_t bdf, int offset, u32 value)
@@ -247,8 +246,7 @@ int pci_read_config(pci_dev_t bdf, int offset, unsigned long *valuep,
if (ret)
return ret;
- return pci_bus_read_config(bus, PCI_MASK_BUS(bdf), offset, valuep,
- size);
+ return pci_bus_read_config(bus, bdf, offset, valuep, size);
}
int pci_read_config32(pci_dev_t bdf, int offset, u32 *valuep)
@@ -303,14 +301,10 @@ int pci_auto_config_devices(struct udevice *bus)
for (ret = device_find_first_child(bus, &dev);
!ret && dev;
ret = device_find_next_child(&dev)) {
- struct pci_controller *ctlr_hose;
unsigned int max_bus;
debug("%s: device %s\n", __func__, dev->name);
-
- /* The root controller has the region information */
- ctlr_hose = hose->ctlr->uclass_priv;
- max_bus = pciauto_config_device(ctlr_hose, pci_get_bdf(dev));
+ max_bus = pciauto_config_device(hose, pci_get_bdf(dev));
sub_bus = max(sub_bus, max_bus);
}
debug("%s: done\n", __func__);
@@ -328,7 +322,7 @@ int dm_pci_hose_probe_bus(struct pci_controller *hose, pci_dev_t bdf)
parent = hose->bus;
/* Find the bus within the parent */
- ret = pci_bus_find_devfn(parent, bdf, &bus);
+ ret = pci_bus_find_devfn(parent, PCI_MASK_BUS(bdf), &bus);
if (ret) {
debug("%s: Cannot find device %x on bus %s: %d\n", __func__,
bdf, parent->name, ret);
@@ -383,7 +377,7 @@ static bool pci_match_one_id(const struct pci_device_id *id,
* This only looks at certain fields in the descriptor.
*/
static int pci_find_and_bind_driver(struct udevice *parent,
- struct pci_device_id *find_id, int devfn,
+ struct pci_device_id *find_id, pci_dev_t bdf,
struct udevice **devp)
{
struct pci_driver_entry *start, *entry;
@@ -430,8 +424,8 @@ static int pci_find_and_bind_driver(struct udevice *parent,
}
/* Bind a generic driver so that the device can be used */
- sprintf(name, "pci_%x:%x.%x", parent->seq, PCI_DEV(devfn),
- PCI_FUNC(devfn));
+ sprintf(name, "pci_%x:%x.%x", parent->seq, PCI_DEV(bdf),
+ PCI_FUNC(bdf));
str = strdup(name);
if (!str)
return -ENOMEM;
@@ -455,42 +449,44 @@ int pci_bind_bus_devices(struct udevice *bus)
{
ulong vendor, device;
ulong header_type;
- pci_dev_t devfn, end;
+ pci_dev_t bdf, end;
bool found_multi;
int ret;
found_multi = false;
- end = PCI_DEVFN(PCI_MAX_PCI_DEVICES - 1, PCI_MAX_PCI_FUNCTIONS - 1);
- for (devfn = PCI_DEVFN(0, 0); devfn < end; devfn += PCI_DEVFN(0, 1)) {
+ end = PCI_BDF(bus->seq, PCI_MAX_PCI_DEVICES - 1,
+ PCI_MAX_PCI_FUNCTIONS - 1);
+ for (bdf = PCI_BDF(bus->seq, 0, 0); bdf < end;
+ bdf += PCI_BDF(0, 0, 1)) {
struct pci_child_platdata *pplat;
struct udevice *dev;
ulong class;
- if (PCI_FUNC(devfn) && !found_multi)
+ if (PCI_FUNC(bdf) && !found_multi)
continue;
/* Check only the first access, we don't expect problems */
- ret = pci_bus_read_config(bus, devfn, PCI_HEADER_TYPE,
+ ret = pci_bus_read_config(bus, bdf, PCI_HEADER_TYPE,
&header_type, PCI_SIZE_8);
if (ret)
goto error;
- pci_bus_read_config(bus, devfn, PCI_VENDOR_ID, &vendor,
+ pci_bus_read_config(bus, bdf, PCI_VENDOR_ID, &vendor,
PCI_SIZE_16);
if (vendor == 0xffff || vendor == 0x0000)
continue;
- if (!PCI_FUNC(devfn))
+ if (!PCI_FUNC(bdf))
found_multi = header_type & 0x80;
debug("%s: bus %d/%s: found device %x, function %d\n", __func__,
- bus->seq, bus->name, PCI_DEV(devfn), PCI_FUNC(devfn));
- pci_bus_read_config(bus, devfn, PCI_DEVICE_ID, &device,
+ bus->seq, bus->name, PCI_DEV(bdf), PCI_FUNC(bdf));
+ pci_bus_read_config(bus, bdf, PCI_DEVICE_ID, &device,
PCI_SIZE_16);
- pci_bus_read_config(bus, devfn, PCI_CLASS_REVISION, &class,
+ pci_bus_read_config(bus, bdf, PCI_CLASS_REVISION, &class,
PCI_SIZE_32);
class >>= 8;
/* Find this device in the device tree */
- ret = pci_bus_find_devfn(bus, devfn, &dev);
+ ret = pci_bus_find_devfn(bus, PCI_MASK_BUS(bdf), &dev);
/* Search for a driver */
@@ -504,13 +500,13 @@ int pci_bind_bus_devices(struct udevice *bus)
find_id.device = device;
find_id.class = class;
if ((header_type & 0x7f) == PCI_HEADER_TYPE_NORMAL) {
- pci_bus_read_config(bus, devfn,
+ pci_bus_read_config(bus, bdf,
PCI_SUBSYSTEM_VENDOR_ID,
&val, PCI_SIZE_32);
find_id.subvendor = val & 0xffff;
find_id.subdevice = val >> 16;
}
- ret = pci_find_and_bind_driver(bus, &find_id, devfn,
+ ret = pci_find_and_bind_driver(bus, &find_id, bdf,
&dev);
}
if (ret)
@@ -518,7 +514,7 @@ int pci_bind_bus_devices(struct udevice *bus)
/* Update the platform data */
pplat = dev_get_parent_platdata(dev);
- pplat->devfn = devfn;
+ pplat->devfn = PCI_MASK_BUS(bdf);
pplat->vendor = vendor;
pplat->device = device;
pplat->class = class;
@@ -689,20 +685,20 @@ static int pci_uclass_child_post_bind(struct udevice *dev)
return 0;
}
-int pci_bridge_read_config(struct udevice *bus, pci_dev_t devfn, uint offset,
- ulong *valuep, enum pci_size_t size)
+static int pci_bridge_read_config(struct udevice *bus, pci_dev_t bdf,
+ uint offset, ulong *valuep,
+ enum pci_size_t size)
{
struct pci_controller *hose = bus->uclass_priv;
- pci_dev_t bdf = PCI_ADD_BUS(bus->seq, devfn);
return pci_bus_read_config(hose->ctlr, bdf, offset, valuep, size);
}
-int pci_bridge_write_config(struct udevice *bus, pci_dev_t devfn, uint offset,
- ulong value, enum pci_size_t size)
+static int pci_bridge_write_config(struct udevice *bus, pci_dev_t bdf,
+ uint offset, ulong value,
+ enum pci_size_t size)
{
struct pci_controller *hose = bus->uclass_priv;
- pci_dev_t bdf = PCI_ADD_BUS(bus->seq, devfn);
return pci_bus_write_config(hose->ctlr, bdf, offset, value, size);
}
diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c
index e034ed1..a7af8cb 100644
--- a/drivers/pci/pci_auto.c
+++ b/drivers/pci/pci_auto.c
@@ -213,21 +213,39 @@ void pciauto_setup_device(struct pci_controller *hose,
void pciauto_prescan_setup_bridge(struct pci_controller *hose,
pci_dev_t dev, int sub_bus)
{
- struct pci_region *pci_mem = hose->pci_mem;
- struct pci_region *pci_prefetch = hose->pci_prefetch;
- struct pci_region *pci_io = hose->pci_io;
+ struct pci_region *pci_mem;
+ struct pci_region *pci_prefetch;
+ struct pci_region *pci_io;
u16 cmdstat, prefechable_64;
+#ifdef CONFIG_DM_PCI
+ /* The root controller has the region information */
+ struct pci_controller *ctlr_hose = pci_bus_to_hose(0);
+
+ pci_mem = ctlr_hose->pci_mem;
+ pci_prefetch = ctlr_hose->pci_prefetch;
+ pci_io = ctlr_hose->pci_io;
+#else
+ pci_mem = hose->pci_mem;
+ pci_prefetch = hose->pci_prefetch;
+ pci_io = hose->pci_io;
+#endif
+
pci_hose_read_config_word(hose, dev, PCI_COMMAND, &cmdstat);
pci_hose_read_config_word(hose, dev, PCI_PREF_MEMORY_BASE,
&prefechable_64);
prefechable_64 &= PCI_PREF_RANGE_TYPE_MASK;
/* Configure bus number registers */
+#ifdef CONFIG_DM_PCI
+ pci_hose_write_config_byte(hose, dev, PCI_PRIMARY_BUS, PCI_BUS(dev));
+ pci_hose_write_config_byte(hose, dev, PCI_SECONDARY_BUS, sub_bus);
+#else
pci_hose_write_config_byte(hose, dev, PCI_PRIMARY_BUS,
PCI_BUS(dev) - hose->first_busno);
pci_hose_write_config_byte(hose, dev, PCI_SECONDARY_BUS,
sub_bus - hose->first_busno);
+#endif
pci_hose_write_config_byte(hose, dev, PCI_SUBORDINATE_BUS, 0xff);
if (pci_mem) {
@@ -290,13 +308,30 @@ void pciauto_prescan_setup_bridge(struct pci_controller *hose,
void pciauto_postscan_setup_bridge(struct pci_controller *hose,
pci_dev_t dev, int sub_bus)
{
- struct pci_region *pci_mem = hose->pci_mem;
- struct pci_region *pci_prefetch = hose->pci_prefetch;
- struct pci_region *pci_io = hose->pci_io;
+ struct pci_region *pci_mem;
+ struct pci_region *pci_prefetch;
+ struct pci_region *pci_io;
+
+#ifdef CONFIG_DM_PCI
+ /* The root controller has the region information */
+ struct pci_controller *ctlr_hose = pci_bus_to_hose(0);
+
+ pci_mem = ctlr_hose->pci_mem;
+ pci_prefetch = ctlr_hose->pci_prefetch;
+ pci_io = ctlr_hose->pci_io;
+#else
+ pci_mem = hose->pci_mem;
+ pci_prefetch = hose->pci_prefetch;
+ pci_io = hose->pci_io;
+#endif
/* Configure bus number registers */
+#ifdef CONFIG_DM_PCI
+ pci_hose_write_config_byte(hose, dev, PCI_SUBORDINATE_BUS, sub_bus);
+#else
pci_hose_write_config_byte(hose, dev, PCI_SUBORDINATE_BUS,
sub_bus - hose->first_busno);
+#endif
if (pci_mem) {
/* Round memory allocator to 1MB boundary */
@@ -416,10 +451,26 @@ void pciauto_config_init(struct pci_controller *hose)
*/
int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev)
{
+ struct pci_region *pci_mem;
+ struct pci_region *pci_prefetch;
+ struct pci_region *pci_io;
unsigned int sub_bus = PCI_BUS(dev);
unsigned short class;
int n;
+#ifdef CONFIG_DM_PCI
+ /* The root controller has the region information */
+ struct pci_controller *ctlr_hose = pci_bus_to_hose(0);
+
+ pci_mem = ctlr_hose->pci_mem;
+ pci_prefetch = ctlr_hose->pci_prefetch;
+ pci_io = ctlr_hose->pci_io;
+#else
+ pci_mem = hose->pci_mem;
+ pci_prefetch = hose->pci_prefetch;
+ pci_io = hose->pci_io;
+#endif
+
pci_hose_read_config_word(hose, dev, PCI_CLASS_DEVICE, &class);
switch (class) {
@@ -427,8 +478,8 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev)
DEBUGF("PCI Autoconfig: Found P2P bridge, device %d\n",
PCI_DEV(dev));
- pciauto_setup_device(hose, dev, 2, hose->pci_mem,
- hose->pci_prefetch, hose->pci_io);
+ pciauto_setup_device(hose, dev, 2, pci_mem,
+ pci_prefetch, pci_io);
#ifdef CONFIG_DM_PCI
n = dm_pci_hose_probe_bus(hose, dev);
@@ -458,8 +509,8 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev)
* just do a minimal setup of the bridge,
* let the OS take care of the rest
*/
- pciauto_setup_device(hose, dev, 0, hose->pci_mem,
- hose->pci_prefetch, hose->pci_io);
+ pciauto_setup_device(hose, dev, 0, pci_mem,
+ pci_prefetch, pci_io);
DEBUGF("PCI Autoconfig: Found P2CardBus bridge, device %d\n",
PCI_DEV(dev));
@@ -493,8 +544,8 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev)
DEBUGF("PCI AutoConfig: Found PowerPC device\n");
default:
- pciauto_setup_device(hose, dev, 6, hose->pci_mem,
- hose->pci_prefetch, hose->pci_io);
+ pciauto_setup_device(hose, dev, 6, pci_mem,
+ pci_prefetch, pci_io);
break;
}
diff --git a/drivers/pci/pci_common.c b/drivers/pci/pci_common.c
index f67c9c7..07f1726 100644
--- a/drivers/pci/pci_common.c
+++ b/drivers/pci/pci_common.c
@@ -224,7 +224,7 @@ phys_addr_t pci_hose_bus_to_phys(struct pci_controller *hose,
#ifdef CONFIG_DM_PCI
/* The root controller has the region information */
- hose = hose->ctlr->uclass_priv;
+ hose = pci_bus_to_hose(0);
#endif
/*
@@ -289,6 +289,11 @@ pci_addr_t pci_hose_phys_to_bus(struct pci_controller *hose,
return bus_addr;
}
+#ifdef CONFIG_DM_PCI
+ /* The root controller has the region information */
+ hose = pci_bus_to_hose(0);
+#endif
+
/*
* if PCI_REGION_MEM is set we do a two pass search with preference
* on matches that don't have PCI_REGION_SYS_MEMORY set
diff --git a/drivers/spi/zynq_spi.c b/drivers/spi/zynq_spi.c
index c5c3e10..7ae1f0e 100644
--- a/drivers/spi/zynq_spi.c
+++ b/drivers/spi/zynq_spi.c
@@ -79,7 +79,7 @@ static int zynq_spi_ofdata_to_platdata(struct udevice *bus)
250000000);
plat->speed_hz = plat->frequency / 2;
- debug("zynq_spi_ofdata_to_platdata: regs=%p max-frequency=%d\n",
+ debug("%s: regs=%p max-frequency=%d\n", __func__,
plat->regs, plat->frequency);
return 0;
@@ -309,7 +309,7 @@ static const struct dm_spi_ops zynq_spi_ops = {
};
static const struct udevice_id zynq_spi_ids[] = {
- { .compatible = "xlnx,zynq-spi" },
+ { .compatible = "xlnx,zynq-spi-r1p6" },
{ }
};
diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c
index e2574d7..0edd557 100644
--- a/drivers/usb/host/ehci-tegra.c
+++ b/drivers/usb/host/ehci-tegra.c
@@ -1,6 +1,6 @@
/*
* Copyright (c) 2011 The Chromium OS Authors.
- * Copyright (c) 2009-2013 NVIDIA Corporation
+ * Copyright (c) 2009-2015 NVIDIA Corporation
* Copyright (c) 2013 Lucas Stach
*
* SPDX-License-Identifier: GPL-2.0+
@@ -64,6 +64,7 @@ enum usb_ctlr_type {
USB_CTLR_T20,
USB_CTLR_T30,
USB_CTLR_T114,
+ USB_CTLR_T210,
USB_CTRL_COUNT,
};
@@ -149,6 +150,15 @@ static const unsigned T114_usb_pll[CLOCK_OSC_FREQ_COUNT][PARAM_COUNT] = {
{ 0x3C0, 0x1A, 0x00, 0xC, 2, 0x04, 0x66, 0x09, 0xFE, 0xFDE8, 0xB }
};
+/* NOTE: 13/26MHz settings are N/A for T210, so dupe 12MHz settings for now */
+static const unsigned T210_usb_pll[CLOCK_OSC_FREQ_COUNT][PARAM_COUNT] = {
+ /* DivN, DivM, DivP, KCP, KVCO, Delays Debounce, Bias */
+ { 0x028, 0x01, 0x01, 0x0, 0, 0x02, 0x2F, 0x08, 0x76, 30000, 5 },
+ { 0x019, 0x01, 0x01, 0x0, 0, 0x03, 0x4B, 0x0C, 0xBB, 48000, 8 },
+ { 0x028, 0x01, 0x01, 0x0, 0, 0x02, 0x2F, 0x08, 0x76, 30000, 5 },
+ { 0x028, 0x01, 0x01, 0x0, 0, 0x02, 0x2F, 0x08, 0x76, 30000, 5 },
+};
+
/* UTMIP Idle Wait Delay */
static const u8 utmip_idle_wait_delay = 17;
@@ -177,6 +187,10 @@ static struct fdt_usb_controller fdt_usb_controllers[USB_CTRL_COUNT] = {
.has_hostpc = 1,
.pll_parameter = (const unsigned *)T114_usb_pll,
},
+ {
+ .has_hostpc = 1,
+ .pll_parameter = (const unsigned *)T210_usb_pll,
+ },
};
/*
@@ -458,6 +472,16 @@ static int init_utmi_usb_controller(struct fdt_usb *config,
UTMIP_DEBOUNCE_CFG0_MASK,
timing[PARAM_DEBOUNCE_A_TIME] << UTMIP_DEBOUNCE_CFG0_SHIFT);
+ if (timing[PARAM_DEBOUNCE_A_TIME] > 0xFFFF) {
+ clrsetbits_le32(&usbctlr->utmip_debounce_cfg0,
+ UTMIP_DEBOUNCE_CFG0_MASK,
+ (timing[PARAM_DEBOUNCE_A_TIME] >> 1)
+ << UTMIP_DEBOUNCE_CFG0_SHIFT);
+ clrsetbits_le32(&usbctlr->utmip_bias_cfg1,
+ UTMIP_BIAS_DEBOUNCE_TIMESCALE_MASK,
+ 1 << UTMIP_BIAS_DEBOUNCE_TIMESCALE_SHIFT);
+ }
+
setbits_le32(&usbctlr->utmip_tx_cfg0, UTMIP_FS_PREAMBLE_J);
/* Disable battery charge enabling bit */
@@ -643,6 +667,10 @@ static int init_ulpi_usb_controller(struct fdt_usb *config,
static void config_clock(const u32 timing[])
{
+ debug("%s: DIVM = %d, DIVN = %d, DIVP = %d, cpcon/lfcon = %d/%d\n",
+ __func__, timing[PARAM_DIVM], timing[PARAM_DIVN],
+ timing[PARAM_DIVP], timing[PARAM_CPCON], timing[PARAM_LFCON]);
+
clock_start_pll(CLOCK_ID_USB,
timing[PARAM_DIVM], timing[PARAM_DIVN], timing[PARAM_DIVP],
timing[PARAM_CPCON], timing[PARAM_LFCON]);
@@ -823,6 +851,7 @@ static const struct udevice_id ehci_usb_ids[] = {
{ .compatible = "nvidia,tegra20-ehci", .data = USB_CTLR_T20 },
{ .compatible = "nvidia,tegra30-ehci", .data = USB_CTLR_T30 },
{ .compatible = "nvidia,tegra114-ehci", .data = USB_CTLR_T114 },
+ { .compatible = "nvidia,tegra210-ehci", .data = USB_CTLR_T210 },
{ }
};
generated by cgit v1.1 at 2024-09-12 17:34:20 +0000