diff options
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/misc/fsl_law.c | 2 | ||||
| -rw-r--r-- | drivers/qe/qe.c | 9 | ||||
| -rw-r--r-- | drivers/qe/qe.h | 1 |
3 files changed, 11 insertions, 1 deletions
diff --git a/drivers/misc/fsl_law.c b/drivers/misc/fsl_law.c index 58340c1..be43a3e 100644 --- a/drivers/misc/fsl_law.c +++ b/drivers/misc/fsl_law.c @@ -35,7 +35,7 @@ DECLARE_GLOBAL_DATA_PTR; defined(CONFIG_MPC8560) || defined(CONFIG_MPC8555) #define FSL_HW_NUM_LAWS 8 #elif defined(CONFIG_MPC8548) || defined(CONFIG_MPC8544) || \ - defined(CONFIG_MPC8568) || \ + defined(CONFIG_MPC8568) || defined(CONFIG_MPC8569) || \ defined(CONFIG_MPC8641) || defined(CONFIG_MPC8610) #define FSL_HW_NUM_LAWS 10 #elif defined(CONFIG_MPC8536) || defined(CONFIG_MPC8572) || \ diff --git a/drivers/qe/qe.c b/drivers/qe/qe.c index e90a4a5..ea5a14b 100644 --- a/drivers/qe/qe.c +++ b/drivers/qe/qe.c @@ -161,6 +161,15 @@ void qe_init(uint qe_base) /* Init the QE IMMR base */ qe_immr = (qe_map_t *)qe_base; +#ifdef CONFIG_SYS_QE_FW_ADDR + /* Upload microcode to IRAM for those SOCs which do not have ROM in QE. + */ + qe_upload_firmware((const struct qe_firmware *) CONFIG_SYS_QE_FW_ADDR); + + /* enable the microcode in IRAM */ + out_be32(&qe_immr->iram.iready,QE_IRAM_READY); +#endif + gd->mp_alloc_base = QE_DATAONLY_BASE; gd->mp_alloc_top = gd->mp_alloc_base + QE_DATAONLY_SIZE; diff --git a/drivers/qe/qe.h b/drivers/qe/qe.h index a55555f..d78edba 100644 --- a/drivers/qe/qe.h +++ b/drivers/qe/qe.h @@ -230,6 +230,7 @@ typedef enum qe_clock { /* I-RAM */ #define QE_IRAM_IADD_AIE 0x80000000 /* Auto Increment Enable */ #define QE_IRAM_IADD_BADDR 0x00080000 /* Base Address */ +#define QE_IRAM_READY 0x80000000 /* Structure that defines QE firmware binary files. * |