summaryrefslogtreecommitdiff
path: root/drivers
diff options
context:
space:
mode:
Diffstat (limited to 'drivers')
-rw-r--r--drivers/block/fsl_sata.c14
-rw-r--r--drivers/i2c/bfin-twi_i2c.c169
-rw-r--r--drivers/mmc/fsl_esdhc.c34
-rw-r--r--drivers/net/lan91c96.c1
-rw-r--r--drivers/net/smc911x.c1
-rw-r--r--drivers/serial/ns16550.c69
-rw-r--r--drivers/usb/phy/Makefile1
-rw-r--r--drivers/video/Makefile9
8 files changed, 181 insertions, 117 deletions
diff --git a/drivers/block/fsl_sata.c b/drivers/block/fsl_sata.c
index 8878560..4b97a0e 100644
--- a/drivers/block/fsl_sata.c
+++ b/drivers/block/fsl_sata.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2008 Freescale Semiconductor, Inc.
+ * Copyright (C) 2008,2010 Freescale Semiconductor, Inc.
* Dave Liu <daveliu@freescale.com>
*
* This program is free software; you can redistribute it and/or
@@ -22,6 +22,7 @@
#include <command.h>
#include <asm/io.h>
#include <asm/processor.h>
+#include <asm/fsl_serdes.h>
#include <malloc.h>
#include <libata.h>
#include <fis.h>
@@ -129,6 +130,17 @@ int init_sata(int dev)
return -1;
}
+#ifdef CONFIG_MPC85xx
+ if ((dev == 0) && (!is_serdes_configured(SATA1))) {
+ printf("SATA%d [dev = %d] is not enabled\n", dev+1, dev);
+ return -1;
+ }
+ if ((dev == 1) && (!is_serdes_configured(SATA2))) {
+ printf("SATA%d [dev = %d] is not enabled\n", dev+1, dev);
+ return -1;
+ }
+#endif
+
/* Allocate SATA device driver struct */
sata = (fsl_sata_t *)malloc(sizeof(fsl_sata_t));
if (!sata) {
diff --git a/drivers/i2c/bfin-twi_i2c.c b/drivers/i2c/bfin-twi_i2c.c
index 73a78d2..b3a04d3 100644
--- a/drivers/i2c/bfin-twi_i2c.c
+++ b/drivers/i2c/bfin-twi_i2c.c
@@ -1,7 +1,7 @@
/*
* i2c.c - driver for Blackfin on-chip TWI/I2C
*
- * Copyright (c) 2006-2008 Analog Devices Inc.
+ * Copyright (c) 2006-2010 Analog Devices Inc.
*
* Licensed under the GPL-2 or later.
*/
@@ -12,6 +12,35 @@
#include <asm/blackfin.h>
#include <asm/mach-common/bits/twi.h>
+/* Every register is 32bit aligned, but only 16bits in size */
+#define ureg(name) u16 name; u16 __pad_##name;
+struct twi_regs {
+ ureg(clkdiv);
+ ureg(control);
+ ureg(slave_ctl);
+ ureg(slave_stat);
+ ureg(slave_addr);
+ ureg(master_ctl);
+ ureg(master_stat);
+ ureg(master_addr);
+ ureg(int_stat);
+ ureg(int_mask);
+ ureg(fifo_ctl);
+ ureg(fifo_stat);
+ char __pad[0x50];
+ ureg(xmt_data8);
+ ureg(xmt_data16);
+ ureg(rcv_data8);
+ ureg(rcv_data16);
+};
+#undef ureg
+
+/* U-Boot I2C framework allows only one active device at a time. */
+#ifdef TWI_CLKDIV
+#define TWI0_CLKDIV TWI_CLKDIV
+#endif
+static volatile struct twi_regs *twi = (void *)TWI0_CLKDIV;
+
#ifdef DEBUG
# define dmemset(s, c, n) memset(s, c, n)
#else
@@ -19,29 +48,10 @@
#endif
#define debugi(fmt, args...) \
debug( \
- "MSTAT:0x%03x FSTAT:0x%x ISTAT:0x%02x\t" \
- "%-20s:%-3i: " fmt "\n", \
- bfin_read_TWI_MASTER_STAT(), bfin_read_TWI_FIFO_STAT(), bfin_read_TWI_INT_STAT(), \
+ "MSTAT:0x%03x FSTAT:0x%x ISTAT:0x%02x\t%-20s:%-3i: " fmt "\n", \
+ twi->master_stat, twi->fifo_stat, twi->int_stat, \
__func__, __LINE__, ## args)
-#ifdef TWI0_CLKDIV
-#define bfin_write_TWI_CLKDIV(val) bfin_write_TWI0_CLKDIV(val)
-#define bfin_read_TWI_CLKDIV(val) bfin_read_TWI0_CLKDIV(val)
-#define bfin_write_TWI_CONTROL(val) bfin_write_TWI0_CONTROL(val)
-#define bfin_read_TWI_CONTROL(val) bfin_read_TWI0_CONTROL(val)
-#define bfin_write_TWI_MASTER_ADDR(val) bfin_write_TWI0_MASTER_ADDR(val)
-#define bfin_write_TWI_XMT_DATA8(val) bfin_write_TWI0_XMT_DATA8(val)
-#define bfin_read_TWI_RCV_DATA8() bfin_read_TWI0_RCV_DATA8()
-#define bfin_read_TWI_INT_STAT() bfin_read_TWI0_INT_STAT()
-#define bfin_write_TWI_INT_STAT(val) bfin_write_TWI0_INT_STAT(val)
-#define bfin_read_TWI_MASTER_STAT() bfin_read_TWI0_MASTER_STAT()
-#define bfin_write_TWI_MASTER_STAT(val) bfin_write_TWI0_MASTER_STAT(val)
-#define bfin_read_TWI_MASTER_CTL() bfin_read_TWI0_MASTER_CTL()
-#define bfin_write_TWI_MASTER_CTL(val) bfin_write_TWI0_MASTER_CTL(val)
-#define bfin_write_TWI_INT_MASK(val) bfin_write_TWI0_INT_MASK(val)
-#define bfin_write_TWI_FIFO_CTL(val) bfin_write_TWI0_FIFO_CTL(val)
-#endif
-
#ifdef CONFIG_TWICLK_KHZ
# error do not define CONFIG_TWICLK_KHZ ... use CONFIG_SYS_I2C_SPEED
#endif
@@ -87,49 +97,48 @@ static int wait_for_completion(struct i2c_msg *msg)
ulong timebase = get_timer(0);
do {
- int_stat = bfin_read_TWI_INT_STAT();
+ int_stat = twi->int_stat;
if (int_stat & XMTSERV) {
debugi("processing XMTSERV");
- bfin_write_TWI_INT_STAT(XMTSERV);
+ twi->int_stat = XMTSERV;
SSYNC();
if (msg->alen) {
- bfin_write_TWI_XMT_DATA8(*(msg->abuf++));
+ twi->xmt_data8 = *(msg->abuf++);
--msg->alen;
} else if (!(msg->flags & I2C_M_COMBO) && msg->len) {
- bfin_write_TWI_XMT_DATA8(*(msg->buf++));
+ twi->xmt_data8 = *(msg->buf++);
--msg->len;
} else {
- bfin_write_TWI_MASTER_CTL(bfin_read_TWI_MASTER_CTL() |
- (msg->flags & I2C_M_COMBO ? RSTART | MDIR : STOP));
+ twi->master_ctl |= (msg->flags & I2C_M_COMBO) ? RSTART | MDIR : STOP;
SSYNC();
}
}
if (int_stat & RCVSERV) {
debugi("processing RCVSERV");
- bfin_write_TWI_INT_STAT(RCVSERV);
+ twi->int_stat = RCVSERV;
SSYNC();
if (msg->len) {
- *(msg->buf++) = bfin_read_TWI_RCV_DATA8();
+ *(msg->buf++) = twi->rcv_data8;
--msg->len;
} else if (msg->flags & I2C_M_STOP) {
- bfin_write_TWI_MASTER_CTL(bfin_read_TWI_MASTER_CTL() | STOP);
+ twi->master_ctl |= STOP;
SSYNC();
}
}
if (int_stat & MERR) {
debugi("processing MERR");
- bfin_write_TWI_INT_STAT(MERR);
+ twi->int_stat = MERR;
SSYNC();
return msg->len;
}
if (int_stat & MCOMP) {
debugi("processing MCOMP");
- bfin_write_TWI_INT_STAT(MCOMP);
+ twi->int_stat = MCOMP;
SSYNC();
if (msg->flags & I2C_M_COMBO && msg->len) {
- bfin_write_TWI_MASTER_CTL((bfin_read_TWI_MASTER_CTL() & ~RSTART) |
- (min(msg->len, 0xff) << 6) | MEN | MDIR);
+ twi->master_ctl = (twi->master_ctl & ~RSTART) |
+ (min(msg->len, 0xff) << 6) | MEN | MDIR;
SSYNC();
} else
break;
@@ -172,55 +181,54 @@ static int i2c_transfer(uchar chip, uint addr, int alen, uchar *buffer, int len,
chip, addr, alen, buffer[0], len, flags, (flags & I2C_M_READ ? "rd" : "wr"));
/* wait for things to settle */
- while (bfin_read_TWI_MASTER_STAT() & BUSBUSY)
+ while (twi->master_stat & BUSBUSY)
if (ctrlc())
return 1;
/* Set Transmit device address */
- bfin_write_TWI_MASTER_ADDR(chip);
+ twi->master_addr = chip;
/* Clear the FIFO before starting things */
- bfin_write_TWI_FIFO_CTL(XMTFLUSH | RCVFLUSH);
+ twi->fifo_ctl = XMTFLUSH | RCVFLUSH;
SSYNC();
- bfin_write_TWI_FIFO_CTL(0);
+ twi->fifo_ctl = 0;
SSYNC();
/* prime the pump */
if (msg.alen) {
len = (msg.flags & I2C_M_COMBO) ? msg.alen : msg.alen + len;
debugi("first byte=0x%02x", *msg.abuf);
- bfin_write_TWI_XMT_DATA8(*(msg.abuf++));
+ twi->xmt_data8 = *(msg.abuf++);
--msg.alen;
} else if (!(msg.flags & I2C_M_READ) && msg.len) {
debugi("first byte=0x%02x", *msg.buf);
- bfin_write_TWI_XMT_DATA8(*(msg.buf++));
+ twi->xmt_data8 = *(msg.buf++);
--msg.len;
}
/* clear int stat */
- bfin_write_TWI_MASTER_STAT(-1);
- bfin_write_TWI_INT_STAT(-1);
- bfin_write_TWI_INT_MASK(0);
+ twi->master_stat = -1;
+ twi->int_stat = -1;
+ twi->int_mask = 0;
SSYNC();
/* Master enable */
- bfin_write_TWI_MASTER_CTL(
- (bfin_read_TWI_MASTER_CTL() & FAST) |
+ twi->master_ctl =
+ (twi->master_ctl & FAST) |
(min(len, 0xff) << 6) | MEN |
- ((msg.flags & I2C_M_READ) ? MDIR : 0)
- );
+ ((msg.flags & I2C_M_READ) ? MDIR : 0);
SSYNC();
- debugi("CTL=0x%04x", bfin_read_TWI_MASTER_CTL());
+ debugi("CTL=0x%04x", twi->master_ctl);
/* process the rest */
ret = wait_for_completion(&msg);
debugi("ret=%d", ret);
if (ret) {
- bfin_write_TWI_MASTER_CTL(bfin_read_TWI_MASTER_CTL() & ~MEN);
- bfin_write_TWI_CONTROL(bfin_read_TWI_CONTROL() & ~TWI_ENA);
+ twi->master_ctl &= ~MEN;
+ twi->control &= ~TWI_ENA;
SSYNC();
- bfin_write_TWI_CONTROL(bfin_read_TWI_CONTROL() | TWI_ENA);
+ twi->control |= TWI_ENA;
SSYNC();
}
@@ -238,10 +246,10 @@ int i2c_set_bus_speed(unsigned int speed)
/* Set TWI interface clock */
if (clkdiv < I2C_DUTY_MAX || clkdiv > I2C_DUTY_MIN)
return -1;
- bfin_write_TWI_CLKDIV((clkdiv << 8) | (clkdiv & 0xff));
+ twi->clkdiv = (clkdiv << 8) | (clkdiv & 0xff);
/* Don't turn it on */
- bfin_write_TWI_MASTER_CTL(speed > 100000 ? FAST : 0);
+ twi->master_ctl = (speed > 100000 ? FAST : 0);
return 0;
}
@@ -253,7 +261,7 @@ int i2c_set_bus_speed(unsigned int speed)
unsigned int i2c_get_bus_speed(void)
{
/* 10 MHz / (2 * CLKDIV) -> 5 MHz / CLKDIV */
- return 5000000 / (bfin_read_TWI_CLKDIV() & 0xff);
+ return 5000000 / (twi->clkdiv & 0xff);
}
/**
@@ -269,24 +277,23 @@ void i2c_init(int speed, int slaveaddr)
uint8_t prescale = ((get_sclk() / 1024 / 1024 + 5) / 10) & 0x7F;
/* Set TWI internal clock as 10MHz */
- bfin_write_TWI_CONTROL(prescale);
+ twi->control = prescale;
/* Set TWI interface clock as specified */
i2c_set_bus_speed(speed);
/* Enable it */
- bfin_write_TWI_CONTROL(TWI_ENA | prescale);
+ twi->control = TWI_ENA | prescale;
SSYNC();
- debugi("CONTROL:0x%04x CLKDIV:0x%04x",
- bfin_read_TWI_CONTROL(), bfin_read_TWI_CLKDIV());
+ debugi("CONTROL:0x%04x CLKDIV:0x%04x", twi->control, twi->clkdiv);
#if CONFIG_SYS_I2C_SLAVE
# error I2C slave support not tested/supported
/* If they want us as a slave, do it */
if (slaveaddr) {
- bfin_write_TWI_SLAVE_ADDR(slaveaddr);
- bfin_write_TWI_SLAVE_CTL(SEN);
+ twi->slave_addr = slaveaddr;
+ twi->slave_ctl = SEN;
}
#endif
}
@@ -329,3 +336,43 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
{
return i2c_transfer(chip, addr, alen, buffer, len, 0);
}
+
+/**
+ * i2c_set_bus_num - change active I2C bus
+ * @bus: bus index, zero based
+ * @returns: 0 on success, non-0 on failure
+ */
+int i2c_set_bus_num(unsigned int bus)
+{
+ switch (bus) {
+#if CONFIG_SYS_MAX_I2C_BUS > 0
+ case 0: twi = (void *)TWI0_CLKDIV; return 0;
+#endif
+#if CONFIG_SYS_MAX_I2C_BUS > 1
+ case 1: twi = (void *)TWI1_CLKDIV; return 0;
+#endif
+#if CONFIG_SYS_MAX_I2C_BUS > 2
+ case 2: twi = (void *)TWI2_CLKDIV; return 0;
+#endif
+ default: return -1;
+ }
+}
+
+/**
+ * i2c_get_bus_num - returns index of active I2C bus
+ */
+unsigned int i2c_get_bus_num(void)
+{
+ switch ((unsigned long)twi) {
+#if CONFIG_SYS_MAX_I2C_BUS > 0
+ case TWI0_CLKDIV: return 0;
+#endif
+#if CONFIG_SYS_MAX_I2C_BUS > 1
+ case TWI1_CLKDIV: return 1;
+#endif
+#if CONFIG_SYS_MAX_I2C_BUS > 2
+ case TWI2_CLKDIV: return 2;
+#endif
+ default: return -1;
+ }
+}
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index a9b07a9..a368fe6 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -103,7 +103,7 @@ uint esdhc_xfertyp(struct mmc_cmd *cmd, struct mmc_data *data)
/*
* PIO Read/Write Mode reduce the performace as DMA is not used in this mode.
*/
-static int
+static void
esdhc_pio_read_write(struct mmc *mmc, struct mmc_data *data)
{
struct fsl_esdhc *regs = mmc->priv;
@@ -125,7 +125,7 @@ esdhc_pio_read_write(struct mmc *mmc, struct mmc_data *data)
&& --timeout);
if (timeout <= 0) {
printf("\nData Read Failed in PIO Mode.");
- return timeout;
+ return;
}
while (size && (!(irqstat & IRQSTAT_TC))) {
udelay(100); /* Wait before last byte transfer complete */
@@ -139,7 +139,7 @@ esdhc_pio_read_write(struct mmc *mmc, struct mmc_data *data)
}
} else {
blocks = data->blocks;
- buffer = data->src;
+ buffer = (char *)data->src;
while (blocks) {
timeout = PIO_TIMEOUT;
size = data->blocksize;
@@ -148,7 +148,7 @@ esdhc_pio_read_write(struct mmc *mmc, struct mmc_data *data)
&& --timeout);
if (timeout <= 0) {
printf("\nData Write Failed in PIO Mode.");
- return timeout;
+ return;
}
while (size && (!(irqstat & IRQSTAT_TC))) {
udelay(100); /* Wait before last byte transfer complete */
@@ -166,22 +166,12 @@ esdhc_pio_read_write(struct mmc *mmc, struct mmc_data *data)
static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data)
{
- uint wml_value;
int timeout;
struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base;
+#ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO
+ uint wml_value;
-#ifdef CONFIG_SYS_FSL_ESDHC_USE_PIO
- if (!(data->flags & MMC_DATA_READ)) {
- if ((esdhc_read32(&regs->prsstat) & PRSSTAT_WPSPL) == 0) {
- printf("\nThe SD card is locked. "
- "Can not write to a locked card.\n\n");
- return TIMEOUT;
- }
- esdhc_write32(&regs->dsaddr, (u32)data->src);
- } else
- esdhc_write32(&regs->dsaddr, (u32)data->dest);
-#else
wml_value = data->blocksize/4;
if (data->flags & MMC_DATA_READ) {
@@ -202,7 +192,17 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data)
wml_value << 16);
esdhc_write32(&regs->dsaddr, (u32)data->src);
}
-#endif
+#else /* CONFIG_SYS_FSL_ESDHC_USE_PIO */
+ if (!(data->flags & MMC_DATA_READ)) {
+ if ((esdhc_read32(&regs->prsstat) & PRSSTAT_WPSPL) == 0) {
+ printf("\nThe SD card is locked. "
+ "Can not write to a locked card.\n\n");
+ return TIMEOUT;
+ }
+ esdhc_write32(&regs->dsaddr, (u32)data->src);
+ } else
+ esdhc_write32(&regs->dsaddr, (u32)data->dest);
+#endif /* CONFIG_SYS_FSL_ESDHC_USE_PIO */
esdhc_write32(&regs->blkattr, data->blocks << 16 | data->blocksize);
diff --git a/drivers/net/lan91c96.c b/drivers/net/lan91c96.c
index 90e4002..810079f 100644
--- a/drivers/net/lan91c96.c
+++ b/drivers/net/lan91c96.c
@@ -795,7 +795,6 @@ int lan91c96_initialize(u8 dev_num, int base_addr)
dev = malloc(sizeof(*dev));
if (!dev) {
- free(dev);
return 0;
}
memset(dev, 0, sizeof(*dev));
diff --git a/drivers/net/smc911x.c b/drivers/net/smc911x.c
index f2fc88b..3da4c35 100644
--- a/drivers/net/smc911x.c
+++ b/drivers/net/smc911x.c
@@ -242,7 +242,6 @@ int smc911x_initialize(u8 dev_num, int base_addr)
dev = malloc(sizeof(*dev));
if (!dev) {
- free(dev);
return -1;
}
memset(dev, 0, sizeof(*dev));
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index 23c0f76..7e833fd 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -7,6 +7,8 @@
#include <config.h>
#include <ns16550.h>
#include <watchdog.h>
+#include <linux/types.h>
+#include <asm/io.h>
#define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */
#define UART_MCRVAL (UART_MCR_DTR | \
@@ -14,28 +16,35 @@
#define UART_FCRVAL (UART_FCR_FIFO_EN | \
UART_FCR_RXSR | \
UART_FCR_TXSR) /* Clear & enable FIFOs */
+#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
+#define serial_out(x,y) outb(x,(ulong)y)
+#define serial_in(y) inb((ulong)y)
+#else
+#define serial_out(x,y) writeb(x,y)
+#define serial_in(y) readb(y)
+#endif
void NS16550_init (NS16550_t com_port, int baud_divisor)
{
- com_port->ier = 0x00;
+ serial_out(0x00, &com_port->ier);
#if defined(CONFIG_OMAP) && !defined(CONFIG_OMAP3_ZOOM2)
- com_port->mdr1 = 0x7; /* mode select reset TL16C750*/
+ serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/
#endif
- com_port->lcr = UART_LCR_BKSE | UART_LCRVAL;
- com_port->dll = 0;
- com_port->dlm = 0;
- com_port->lcr = UART_LCRVAL;
- com_port->mcr = UART_MCRVAL;
- com_port->fcr = UART_FCRVAL;
- com_port->lcr = UART_LCR_BKSE | UART_LCRVAL;
- com_port->dll = baud_divisor & 0xff;
- com_port->dlm = (baud_divisor >> 8) & 0xff;
- com_port->lcr = UART_LCRVAL;
+ serial_out(UART_LCR_BKSE | UART_LCRVAL, (ulong)&com_port->lcr);
+ serial_out(0, &com_port->dll);
+ serial_out(0, &com_port->dlm);
+ serial_out(UART_LCRVAL, &com_port->lcr);
+ serial_out(UART_MCRVAL, &com_port->mcr);
+ serial_out(UART_FCRVAL, &com_port->fcr);
+ serial_out(UART_LCR_BKSE | UART_LCRVAL, &com_port->lcr);
+ serial_out(baud_divisor & 0xff, &com_port->dll);
+ serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);
+ serial_out(UART_LCRVAL, &com_port->lcr);
#if defined(CONFIG_OMAP) && !defined(CONFIG_OMAP3_ZOOM2)
#if defined(CONFIG_APTIX)
- com_port->mdr1 = 3; /* /13 mode so Aptix 6MHz can hit 115200 */
+ serial_out(3, &com_port->mdr1); /* /13 mode so Aptix 6MHz can hit 115200 */
#else
- com_port->mdr1 = 0; /* /16 is proper to hit 115200 with 48MHz */
+ serial_out(0, &com_port->mdr1); /* /16 is proper to hit 115200 with 48MHz */
#endif
#endif /* CONFIG_OMAP */
}
@@ -43,42 +52,42 @@ void NS16550_init (NS16550_t com_port, int baud_divisor)
#ifndef CONFIG_NS16550_MIN_FUNCTIONS
void NS16550_reinit (NS16550_t com_port, int baud_divisor)
{
- com_port->ier = 0x00;
- com_port->lcr = UART_LCR_BKSE | UART_LCRVAL;
- com_port->dll = 0;
- com_port->dlm = 0;
- com_port->lcr = UART_LCRVAL;
- com_port->mcr = UART_MCRVAL;
- com_port->fcr = UART_FCRVAL;
- com_port->lcr = UART_LCR_BKSE;
- com_port->dll = baud_divisor & 0xff;
- com_port->dlm = (baud_divisor >> 8) & 0xff;
- com_port->lcr = UART_LCRVAL;
+ serial_out(0x00, &com_port->ier);
+ serial_out(UART_LCR_BKSE | UART_LCRVAL, &com_port->lcr);
+ serial_out(0, &com_port->dll);
+ serial_out(0, &com_port->dlm);
+ serial_out(UART_LCRVAL, &com_port->lcr);
+ serial_out(UART_MCRVAL, &com_port->mcr);
+ serial_out(UART_FCRVAL, &com_port->fcr);
+ serial_out(UART_LCR_BKSE, &com_port->lcr);
+ serial_out(baud_divisor & 0xff, &com_port->dll);
+ serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);
+ serial_out(UART_LCRVAL, &com_port->lcr);
}
#endif /* CONFIG_NS16550_MIN_FUNCTIONS */
void NS16550_putc (NS16550_t com_port, char c)
{
- while ((com_port->lsr & UART_LSR_THRE) == 0);
- com_port->thr = c;
+ while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0);
+ serial_out(c, &com_port->thr);
}
#ifndef CONFIG_NS16550_MIN_FUNCTIONS
char NS16550_getc (NS16550_t com_port)
{
- while ((com_port->lsr & UART_LSR_DR) == 0) {
+ while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) {
#ifdef CONFIG_USB_TTY
extern void usbtty_poll(void);
usbtty_poll();
#endif
WATCHDOG_RESET();
}
- return (com_port->rbr);
+ return serial_in(&com_port->rbr);
}
int NS16550_tstc (NS16550_t com_port)
{
- return ((com_port->lsr & UART_LSR_DR) != 0);
+ return ((serial_in(&com_port->lsr) & UART_LSR_DR) != 0);
}
#endif /* CONFIG_NS16550_MIN_FUNCTIONS */
diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
index 200b907..f09e55f 100644
--- a/drivers/usb/phy/Makefile
+++ b/drivers/usb/phy/Makefile
@@ -23,7 +23,6 @@ include $(TOPDIR)/config.mk
LIB := $(obj)libusb_phy.a
COBJS-$(CONFIG_TWL4030_USB) += twl4030.o
-COBJS-y := twl4030.o
COBJS := $(COBJS-y)
SRCS := $(COBJS:.o=.c)
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index a5e339a..7d84fc7 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -25,20 +25,19 @@ include $(TOPDIR)/config.mk
LIB := $(obj)libvideo.a
-COBJS-$(CONFIG_ATI_RADEON_FB) += ati_radeon_fb.o
+COBJS-$(CONFIG_ATI_RADEON_FB) += ati_radeon_fb.o videomodes.o
COBJS-$(CONFIG_ATMEL_LCD) += atmel_lcdfb.o
COBJS-$(CONFIG_CFB_CONSOLE) += cfb_console.o
COBJS-$(CONFIG_S6E63D6) += s6e63d6.o
COBJS-$(CONFIG_VIDEO_AMBA) += amba.o
-COBJS-$(CONFIG_VIDEO_CT69000) += ct69000.o
-COBJS-$(CONFIG_VIDEO_MB862xx) += mb862xx.o
+COBJS-$(CONFIG_VIDEO_CT69000) += ct69000.o videomodes.o
+COBJS-$(CONFIG_VIDEO_MB862xx) += mb862xx.o videomodes.o
COBJS-$(CONFIG_VIDEO_MX3) += mx3fb.o
COBJS-$(CONFIG_VIDEO_SED13806) += sed13806.o
COBJS-$(CONFIG_SED156X) += sed156x.o
COBJS-$(CONFIG_VIDEO_SM501) += sm501.o
-COBJS-$(CONFIG_VIDEO_SMI_LYNXEM) += smiLynxEM.o
+COBJS-$(CONFIG_VIDEO_SMI_LYNXEM) += smiLynxEM.o videomodes.o
COBJS-$(CONFIG_VIDEO_VCXK) += bus_vcxk.o
-COBJS-y += videomodes.o
COBJS := $(COBJS-y)
SRCS := $(COBJS:.o=.c)
generated by cgit v1.1 at 2025-01-03 05:41:43 +0000