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-rw-r--r--drivers/dma/apbh_dma.c4
-rw-r--r--drivers/i2c/mxs_i2c.c2
-rw-r--r--drivers/mmc/mxsmmc.c2
-rw-r--r--drivers/mtd/nand/mxs_nand.c6
-rw-r--r--drivers/rtc/mxsrtc.c4
-rw-r--r--drivers/spi/mxs_spi.c8
6 files changed, 13 insertions, 13 deletions
diff --git a/drivers/dma/apbh_dma.c b/drivers/dma/apbh_dma.c
index 38eff4f..ca5a32f 100644
--- a/drivers/dma/apbh_dma.c
+++ b/drivers/dma/apbh_dma.c
@@ -512,7 +512,7 @@ static int mxs_dma_wait_complete(uint32_t timeout, unsigned int chan)
if (ret)
return ret;
- if (mx28_wait_mask_set(&apbh_regs->hw_apbh_ctrl1_reg,
+ if (mxs_wait_mask_set(&apbh_regs->hw_apbh_ctrl1_reg,
1 << chan, timeout)) {
ret = -ETIMEDOUT;
mxs_dma_reset(chan);
@@ -557,7 +557,7 @@ void mxs_dma_init(void)
struct mxs_apbh_regs *apbh_regs =
(struct mxs_apbh_regs *)MXS_APBH_BASE;
- mx28_reset_block(&apbh_regs->hw_apbh_ctrl0_reg);
+ mxs_reset_block(&apbh_regs->hw_apbh_ctrl0_reg);
#ifdef CONFIG_APBH_DMA_BURST8
writel(APBH_CTRL0_AHB_BURST8_EN,
diff --git a/drivers/i2c/mxs_i2c.c b/drivers/i2c/mxs_i2c.c
index 5d61d7a..2a193c2 100644
--- a/drivers/i2c/mxs_i2c.c
+++ b/drivers/i2c/mxs_i2c.c
@@ -41,7 +41,7 @@ void mxs_i2c_reset(void)
struct mxs_i2c_regs *i2c_regs = (struct mxs_i2c_regs *)MXS_I2C0_BASE;
int ret;
- ret = mx28_reset_block(&i2c_regs->hw_i2c_ctrl0_reg);
+ ret = mxs_reset_block(&i2c_regs->hw_i2c_ctrl0_reg);
if (ret) {
debug("MXS I2C: Block reset timeout\n");
return;
diff --git a/drivers/mmc/mxsmmc.c b/drivers/mmc/mxsmmc.c
index 018939f..9a98c6b 100644
--- a/drivers/mmc/mxsmmc.c
+++ b/drivers/mmc/mxsmmc.c
@@ -336,7 +336,7 @@ static int mxsmmc_init(struct mmc *mmc)
struct mxs_ssp_regs *ssp_regs = priv->regs;
/* Reset SSP */
- mx28_reset_block(&ssp_regs->hw_ssp_ctrl0_reg);
+ mxs_reset_block(&ssp_regs->hw_ssp_ctrl0_reg);
/* 8 bits word length in MMC mode */
clrsetbits_le32(&ssp_regs->hw_ssp_ctrl1,
diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c
index 807c9fd..bf9414f 100644
--- a/drivers/mtd/nand/mxs_nand.c
+++ b/drivers/mtd/nand/mxs_nand.c
@@ -237,7 +237,7 @@ static int mxs_nand_wait_for_bch_complete(void)
int timeout = MXS_NAND_BCH_TIMEOUT;
int ret;
- ret = mx28_wait_mask_set(&bch_regs->hw_bch_ctrl_reg,
+ ret = mxs_wait_mask_set(&bch_regs->hw_bch_ctrl_reg,
BCH_CTRL_COMPLETE_IRQ, timeout);
writel(BCH_CTRL_COMPLETE_IRQ, &bch_regs->hw_bch_ctrl_clr);
@@ -972,7 +972,7 @@ static int mxs_nand_scan_bbt(struct mtd_info *mtd)
uint32_t tmp;
/* Configure BCH and set NFC geometry */
- mx28_reset_block(&bch_regs->hw_bch_ctrl_reg);
+ mxs_reset_block(&bch_regs->hw_bch_ctrl_reg);
/* Configure layout 0 */
tmp = (mxs_nand_ecc_chunk_cnt(mtd->writesize) - 1)
@@ -1080,7 +1080,7 @@ int mxs_nand_init(struct mxs_nand_info *info)
}
/* Reset the GPMI block. */
- mx28_reset_block(&gpmi_regs->hw_gpmi_ctrl0_reg);
+ mxs_reset_block(&gpmi_regs->hw_gpmi_ctrl0_reg);
/*
* Choose NAND mode, set IRQ polarity, disable write protection and
diff --git a/drivers/rtc/mxsrtc.c b/drivers/rtc/mxsrtc.c
index 72f7400..ffefb91 100644
--- a/drivers/rtc/mxsrtc.c
+++ b/drivers/rtc/mxsrtc.c
@@ -41,7 +41,7 @@ int mxs_rtc_set_time(uint32_t secs)
* is taken from the linux kernel driver for the STMP37xx RTC since
* documentation doesn't mention it.
*/
- ret = mx28_wait_mask_clr(&rtc_regs->hw_rtc_stat_reg,
+ ret = mxs_wait_mask_clr(&rtc_regs->hw_rtc_stat_reg,
0x80 << RTC_STAT_STALE_REGS_OFFSET, MXS_RTC_MAX_TIMEOUT);
if (ret)
@@ -80,7 +80,7 @@ void rtc_reset(void)
mxs_rtc_set_time(0);
/* Reset the RTC block */
- ret = mx28_reset_block(&rtc_regs->hw_rtc_ctrl_reg);
+ ret = mxs_reset_block(&rtc_regs->hw_rtc_ctrl_reg);
if (ret)
printf("MXS RTC: Block reset timeout\n");
}
diff --git a/drivers/spi/mxs_spi.c b/drivers/spi/mxs_spi.c
index bd834fb..a037c13 100644
--- a/drivers/spi/mxs_spi.c
+++ b/drivers/spi/mxs_spi.c
@@ -139,7 +139,7 @@ int spi_claim_bus(struct spi_slave *slave)
struct mxs_ssp_regs *ssp_regs = mxs_slave->regs;
uint32_t reg = 0;
- mx28_reset_block(&ssp_regs->hw_ssp_ctrl0_reg);
+ mxs_reset_block(&ssp_regs->hw_ssp_ctrl0_reg);
writel(SSP_CTRL0_BUS_WIDTH_ONE_BIT, &ssp_regs->hw_ssp_ctrl0);
@@ -193,7 +193,7 @@ static int mxs_spi_xfer_pio(struct mxs_spi_slave *slave,
writel(SSP_CTRL0_RUN, &ssp_regs->hw_ssp_ctrl0_set);
- if (mx28_wait_mask_set(&ssp_regs->hw_ssp_ctrl0_reg,
+ if (mxs_wait_mask_set(&ssp_regs->hw_ssp_ctrl0_reg,
SSP_CTRL0_RUN, MXS_SPI_MAX_TIMEOUT)) {
printf("MXS SPI: Timeout waiting for start\n");
return -ETIMEDOUT;
@@ -205,7 +205,7 @@ static int mxs_spi_xfer_pio(struct mxs_spi_slave *slave,
writel(SSP_CTRL0_DATA_XFER, &ssp_regs->hw_ssp_ctrl0_set);
if (!write) {
- if (mx28_wait_mask_clr(&ssp_regs->hw_ssp_status_reg,
+ if (mxs_wait_mask_clr(&ssp_regs->hw_ssp_status_reg,
SSP_STATUS_FIFO_EMPTY, MXS_SPI_MAX_TIMEOUT)) {
printf("MXS SPI: Timeout waiting for data\n");
return -ETIMEDOUT;
@@ -215,7 +215,7 @@ static int mxs_spi_xfer_pio(struct mxs_spi_slave *slave,
data++;
}
- if (mx28_wait_mask_clr(&ssp_regs->hw_ssp_ctrl0_reg,
+ if (mxs_wait_mask_clr(&ssp_regs->hw_ssp_ctrl0_reg,
SSP_CTRL0_RUN, MXS_SPI_MAX_TIMEOUT)) {
printf("MXS SPI: Timeout waiting for finish\n");
return -ETIMEDOUT;