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-rw-r--r--drivers/serial/serial_sh.c8
-rw-r--r--drivers/serial/serial_sh.h4
2 files changed, 9 insertions, 3 deletions
diff --git a/drivers/serial/serial_sh.c b/drivers/serial/serial_sh.c
index 0826d59..144a925 100644
--- a/drivers/serial/serial_sh.c
+++ b/drivers/serial/serial_sh.c
@@ -49,9 +49,15 @@ static struct uart_port sh_sci = {
static void sh_serial_setbrg(void)
{
DECLARE_GLOBAL_DATA_PTR;
-
+#ifdef CONFIG_SCIF_USE_EXT_CLK
+ unsigned short dl = DL_VALUE(gd->baudrate, CONFIG_SH_SCIF_CLK_FREQ);
+ sci_out(&sh_sci, DL, dl);
+ /* Need wait: Clock * 1/dl × 1/16 */
+ udelay((1000000 * dl * 16 / CONFIG_SYS_CLK_FREQ) * 1000 + 1);
+#else
sci_out(&sh_sci, SCBRR,
SCBRR_VALUE(gd->baudrate, CONFIG_SH_SCIF_CLK_FREQ));
+#endif
}
static int sh_serial_init(void)
diff --git a/drivers/serial/serial_sh.h b/drivers/serial/serial_sh.h
index 4f3e225..fe8cde4 100644
--- a/drivers/serial/serial_sh.h
+++ b/drivers/serial/serial_sh.h
@@ -735,8 +735,8 @@ static inline int scbrr_calc(struct uart_port port, int bps, int clk)
#elif defined(__H8300H__) || defined(__H8300S__)
#define SCBRR_VALUE(bps, clk) (((clk*1000/32)/bps)-1)
#elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791)
-#define SCBRR DL
-#define SCBRR_VALUE(bps, clk) (clk / bps / 16)
+#define DL_VALUE(bps, clk) (clk / bps / 16) /* External Clock */
+#define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(32*bps)-1) /* Internal Clock */
#else /* Generic SH */
#define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(32*bps)-1)
#endif