diff options
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpio/Kconfig | 7 | ||||
| -rw-r--r-- | drivers/gpio/Makefile | 1 | ||||
| -rw-r--r-- | drivers/gpio/pcf8575_gpio.c | 180 | ||||
| -rw-r--r-- | drivers/i2c/i2c-uclass-compat.c | 2 | ||||
| -rw-r--r-- | drivers/net/cpsw.c | 12 | ||||
| -rw-r--r-- | drivers/net/keystone_net.c | 228 | ||||
| -rw-r--r-- | drivers/spi/cadence_qspi_apb.c | 7 |
7 files changed, 386 insertions, 51 deletions
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 73b862d..64cf221 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -79,6 +79,13 @@ config PM8916_GPIO Power and reset buttons are placed in "pm8916_key" bank and have gpio numbers 0 and 1 respectively. +config PCF8575_GPIO + bool "PCF8575 I2C GPIO Expander driver" + depends on DM_GPIO && DM_I2C + help + Support for PCF8575 I2C 16-bit GPIO expander. Most of these + chips are from NXP and TI. + config ROCKCHIP_GPIO bool "Rockchip GPIO driver" depends on DM_GPIO diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 792d191..8939226 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -56,4 +56,5 @@ obj-$(CONFIG_HIKEY_GPIO) += hi6220_gpio.o obj-$(CONFIG_PIC32_GPIO) += pic32_gpio.o obj-$(CONFIG_MVEBU_GPIO) += mvebu_gpio.o obj-$(CONFIG_MSM_GPIO) += msm_gpio.o +obj-$(CONFIG_$(SPL_)PCF8575_GPIO) += pcf8575_gpio.o obj-$(CONFIG_PM8916_GPIO) += pm8916_gpio.o diff --git a/drivers/gpio/pcf8575_gpio.c b/drivers/gpio/pcf8575_gpio.c new file mode 100644 index 0000000..2bda0ff --- /dev/null +++ b/drivers/gpio/pcf8575_gpio.c @@ -0,0 +1,180 @@ +/* + * PCF8575 I2C GPIO EXPANDER DRIVER + * + * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/ + * + * Vignesh R <vigneshr@ti.com> + * + * SPDX-License-Identifier: GPL-2.0 + * + * + * Driver for TI PCF-8575 16-bit I2C gpio expander. Based on + * gpio-pcf857x Linux Kernel(v4.7) driver. + * + * Copyright (C) 2007 David Brownell + * + */ + +/* + * NOTE: The driver and devicetree bindings are borrowed from Linux + * Kernel, but driver does not support all PCF857x devices. It currently + * supports PCF8575 16-bit expander by TI and NXP. + * + * TODO(vigneshr@ti.com): + * Support 8 bit PCF857x compatible expanders. + */ + +#include <common.h> +#include <dm.h> +#include <i2c.h> +#include <asm-generic/gpio.h> + +DECLARE_GLOBAL_DATA_PTR; + +struct pcf8575_chip { + int gpio_count; /* No. GPIOs supported by the chip */ + + /* NOTE: these chips have strange "quasi-bidirectional" I/O pins. + * We can't actually know whether a pin is configured (a) as output + * and driving the signal low, or (b) as input and reporting a low + * value ... without knowing the last value written since the chip + * came out of reset (if any). We can't read the latched output. + * In short, the only reliable solution for setting up pin direction + * is to do it explicitly. + * + * Using "out" avoids that trouble. When left initialized to zero, + * our software copy of the "latch" then matches the chip's all-ones + * reset state. Otherwise it flags pins to be driven low. + */ + unsigned int out; /* software latch */ + const char *bank_name; /* Name of the expander bank */ +}; + +/* Read/Write to 16-bit I/O expander */ + +static int pcf8575_i2c_write_le16(struct udevice *dev, unsigned int word) +{ + struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); + u8 buf[2] = { word & 0xff, word >> 8, }; + int ret; + + ret = dm_i2c_write(dev, 0, buf, 2); + if (ret) + printf("%s i2c write failed to addr %x\n", __func__, + chip->chip_addr); + + return ret; +} + +static int pcf8575_i2c_read_le16(struct udevice *dev) +{ + struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); + u8 buf[2]; + int ret; + + ret = dm_i2c_read(dev, 0, buf, 2); + if (ret) { + printf("%s i2c read failed from addr %x\n", __func__, + chip->chip_addr); + return ret; + } + + return (buf[1] << 8) | buf[0]; +} + +static int pcf8575_direction_input(struct udevice *dev, unsigned offset) +{ + struct pcf8575_chip *plat = dev_get_platdata(dev); + int status; + + plat->out |= BIT(offset); + status = pcf8575_i2c_write_le16(dev, plat->out); + + return status; +} + +static int pcf8575_direction_output(struct udevice *dev, + unsigned int offset, int value) +{ + struct pcf8575_chip *plat = dev_get_platdata(dev); + int ret; + + if (value) + plat->out |= BIT(offset); + else + plat->out &= ~BIT(offset); + + ret = pcf8575_i2c_write_le16(dev, plat->out); + + return ret; +} + +static int pcf8575_get_value(struct udevice *dev, unsigned int offset) +{ + int value; + + value = pcf8575_i2c_read_le16(dev); + + return (value < 0) ? value : ((value & BIT(offset)) >> offset); +} + +static int pcf8575_set_value(struct udevice *dev, unsigned int offset, + int value) +{ + return pcf8575_direction_output(dev, offset, value); +} + +static int pcf8575_ofdata_platdata(struct udevice *dev) +{ + struct pcf8575_chip *plat = dev_get_platdata(dev); + struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); + + int n_latch; + + uc_priv->gpio_count = fdtdec_get_int(gd->fdt_blob, dev->of_offset, + "gpio-count", 16); + uc_priv->bank_name = fdt_getprop(gd->fdt_blob, dev->of_offset, + "gpio-bank-name", NULL); + if (!uc_priv->bank_name) + uc_priv->bank_name = fdt_get_name(gd->fdt_blob, + dev->of_offset, NULL); + + n_latch = fdtdec_get_uint(gd->fdt_blob, dev->of_offset, + "lines-initial-states", 0); + plat->out = ~n_latch; + + return 0; +} + +static int pcf8575_gpio_probe(struct udevice *dev) +{ + struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); + + debug("%s GPIO controller with %d gpios probed\n", + uc_priv->bank_name, uc_priv->gpio_count); + + return 0; +} + +static const struct dm_gpio_ops pcf8575_gpio_ops = { + .direction_input = pcf8575_direction_input, + .direction_output = pcf8575_direction_output, + .get_value = pcf8575_get_value, + .set_value = pcf8575_set_value, +}; + +static const struct udevice_id pcf8575_gpio_ids[] = { + { .compatible = "nxp,pcf8575" }, + { .compatible = "ti,pcf8575" }, + { } +}; + +U_BOOT_DRIVER(gpio_pcf8575) = { + .name = "gpio_pcf8575", + .id = UCLASS_GPIO, + .ops = &pcf8575_gpio_ops, + .of_match = pcf8575_gpio_ids, + .ofdata_to_platdata = pcf8575_ofdata_platdata, + .probe = pcf8575_gpio_probe, + .platdata_auto_alloc_size = sizeof(struct pcf8575_chip), +}; diff --git a/drivers/i2c/i2c-uclass-compat.c b/drivers/i2c/i2c-uclass-compat.c index 5606d1f..de78db6 100644 --- a/drivers/i2c/i2c-uclass-compat.c +++ b/drivers/i2c/i2c-uclass-compat.c @@ -9,7 +9,7 @@ #include <errno.h> #include <i2c.h> -static int cur_busnum; +static int cur_busnum __attribute__((section(".data"))); static int i2c_compat_get_device(uint chip_addr, int alen, struct udevice **devp) diff --git a/drivers/net/cpsw.c b/drivers/net/cpsw.c index 2ce4ec6..774b021 100644 --- a/drivers/net/cpsw.c +++ b/drivers/net/cpsw.c @@ -22,6 +22,7 @@ #include <netdev.h> #include <cpsw.h> #include <asm/errno.h> +#include <asm/gpio.h> #include <asm/io.h> #include <phy.h> #include <asm/arch/cpu.h> @@ -1152,12 +1153,14 @@ static int cpsw_eth_ofdata_to_platdata(struct udevice *dev) { struct eth_pdata *pdata = dev_get_platdata(dev); struct cpsw_priv *priv = dev_get_priv(dev); + struct gpio_desc *mode_gpios; const char *phy_mode; const void *fdt = gd->fdt_blob; int node = dev->of_offset; int subnode; int slave_index = 0; int active_slave; + int num_mode_gpios; int ret; pdata->iobase = dev_get_addr(dev); @@ -1203,6 +1206,15 @@ static int cpsw_eth_ofdata_to_platdata(struct udevice *dev) return -ENOENT; } + num_mode_gpios = gpio_get_list_count(dev, "mode-gpios"); + if (num_mode_gpios > 0) { + mode_gpios = malloc(sizeof(struct gpio_desc) * + num_mode_gpios); + gpio_request_list_by_name(dev, "mode-gpios", mode_gpios, + num_mode_gpios, GPIOD_IS_OUT); + free(mode_gpios); + } + active_slave = fdtdec_get_int(fdt, node, "active_slave", 0); priv->data.active_slave = active_slave; diff --git a/drivers/net/keystone_net.c b/drivers/net/keystone_net.c index 6b28df0..e41b7d1 100644 --- a/drivers/net/keystone_net.c +++ b/drivers/net/keystone_net.c @@ -11,6 +11,7 @@ #include <console.h> #include <dm.h> +#include <dm/lists.h> #include <net.h> #include <phy.h> @@ -765,6 +766,8 @@ static int ks2_eth_start(struct udevice *dev) hw_config_streaming_switch(); if (priv->has_mdio) { + keystone2_mdio_reset(priv->mdio_bus); + phy_startup(priv->phydev); if (priv->phydev->link == 0) { error("phy startup failed\n"); @@ -906,27 +909,38 @@ static int ks2_eth_probe(struct udevice *dev) pll_pa_clk_sel(); - priv->net_rx_buffs.buff_ptr = rx_buffs, - priv->net_rx_buffs.num_buffs = RX_BUFF_NUMS, - priv->net_rx_buffs.buff_len = RX_BUFF_LEN, + priv->net_rx_buffs.buff_ptr = rx_buffs; + priv->net_rx_buffs.num_buffs = RX_BUFF_NUMS; + priv->net_rx_buffs.buff_len = RX_BUFF_LEN; - /* Register MDIO bus */ - mdio_bus = mdio_alloc(); - if (!mdio_bus) { - error("MDIO alloc failed\n"); - return -ENOMEM; - } - priv->mdio_bus = mdio_bus; - mdio_bus->read = keystone2_mdio_read; - mdio_bus->write = keystone2_mdio_write; - mdio_bus->reset = keystone2_mdio_reset; - mdio_bus->priv = priv->mdio_base; - sprintf(mdio_bus->name, "ethernet-mdio"); - - ret = mdio_register(mdio_bus); - if (ret) { - error("MDIO bus register failed\n"); - return ret; + if (priv->slave_port == 1) { + /* + * Register MDIO bus for slave 0 only, other slave have + * to re-use the same + */ + mdio_bus = mdio_alloc(); + if (!mdio_bus) { + error("MDIO alloc failed\n"); + return -ENOMEM; + } + priv->mdio_bus = mdio_bus; + mdio_bus->read = keystone2_mdio_read; + mdio_bus->write = keystone2_mdio_write; + mdio_bus->reset = keystone2_mdio_reset; + mdio_bus->priv = priv->mdio_base; + sprintf(mdio_bus->name, "ethernet-mdio"); + + ret = mdio_register(mdio_bus); + if (ret) { + error("MDIO bus register failed\n"); + return ret; + } + } else { + /* Get the MDIO bus from slave 0 device */ + struct ks2_eth_priv *parent_priv; + + parent_priv = dev_get_priv(dev->parent); + priv->mdio_bus = parent_priv->mdio_bus; } #ifndef CONFIG_SOC_K2G @@ -935,8 +949,11 @@ static int ks2_eth_probe(struct udevice *dev) priv->netcp_pktdma = &netcp_pktdma; - priv->phydev = phy_connect(mdio_bus, priv->phy_addr, dev, priv->phy_if); - phy_config(priv->phydev); + if (priv->has_mdio) { + priv->phydev = phy_connect(priv->mdio_bus, priv->phy_addr, + dev, priv->phy_if); + phy_config(priv->phydev); + } return 0; } @@ -962,39 +979,103 @@ static const struct eth_ops ks2_eth_ops = { .write_hwaddr = ks2_eth_write_hwaddr, }; - -static int ks2_eth_ofdata_to_platdata(struct udevice *dev) +static int ks2_eth_bind_slaves(struct udevice *dev, int gbe, int *gbe_0) { - struct ks2_eth_priv *priv = dev_get_priv(dev); - struct eth_pdata *pdata = dev_get_platdata(dev); const void *fdt = gd->fdt_blob; + struct udevice *sl_dev; int interfaces; - int interface_0; - int netcp_gbe_0; - int phy; + int sec_slave; + int slave; + int ret; + char *slave_name; + + interfaces = fdt_subnode_offset(fdt, gbe, "interfaces"); + fdt_for_each_subnode(fdt, slave, interfaces) { + int slave_no; + + slave_no = fdtdec_get_int(fdt, slave, "slave-port", -ENOENT); + if (slave_no == -ENOENT) + continue; + + if (slave_no == 0) { + /* This is the current eth device */ + *gbe_0 = slave; + } else { + /* Slave devices to be registered */ + slave_name = malloc(20); + snprintf(slave_name, 20, "netcp@slave-%d", slave_no); + ret = device_bind_driver_to_node(dev, "eth_ks2_sl", + slave_name, slave, + &sl_dev); + if (ret) { + error("ks2_net - not able to bind slave interfaces\n"); + return ret; + } + } + } + + sec_slave = fdt_subnode_offset(fdt, gbe, "secondary-slave-ports"); + fdt_for_each_subnode(fdt, slave, sec_slave) { + int slave_no; + + slave_no = fdtdec_get_int(fdt, slave, "slave-port", -ENOENT); + if (slave_no == -ENOENT) + continue; + + /* Slave devices to be registered */ + slave_name = malloc(20); + snprintf(slave_name, 20, "netcp@slave-%d", slave_no); + ret = device_bind_driver_to_node(dev, "eth_ks2_sl", slave_name, + slave, &sl_dev); + if (ret) { + error("ks2_net - not able to bind slave interfaces\n"); + return ret; + } + } + + return 0; +} + +static int ks2_eth_parse_slave_interface(int netcp, int slave, + struct ks2_eth_priv *priv, + struct eth_pdata *pdata) +{ + const void *fdt = gd->fdt_blob; int mdio; - u32 dma_channel[6]; + int phy; + int dma_count; + u32 dma_channel[8]; - interfaces = fdt_subnode_offset(fdt, dev->of_offset, - "netcp-interfaces"); - interface_0 = fdt_subnode_offset(fdt, interfaces, "interface-0"); + priv->slave_port = fdtdec_get_int(fdt, slave, "slave-port", -1); + priv->net_rx_buffs.rx_flow = priv->slave_port * 8; - netcp_gbe_0 = fdtdec_lookup_phandle(fdt, interface_0, "netcp-gbe"); - priv->link_type = fdtdec_get_int(fdt, netcp_gbe_0, - "link-interface", -1); - priv->slave_port = fdtdec_get_int(fdt, netcp_gbe_0, "slave-port", -1); /* U-Boot slave port number starts with 1 instead of 0 */ priv->slave_port += 1; - phy = fdtdec_lookup_phandle(fdt, netcp_gbe_0, "phy-handle"); - priv->phy_addr = fdtdec_get_int(fdt, phy, "reg", -1); + dma_count = fdtdec_get_int_array_count(fdt, netcp, + "ti,navigator-dmas", + dma_channel, 8); - mdio = fdt_parent_offset(fdt, phy); - if (mdio < 0) { - error("mdio dt not found\n"); - return -ENODEV; + if (dma_count > (2 * priv->slave_port)) { + int dma_idx; + + dma_idx = priv->slave_port * 2 - 1; + priv->net_rx_buffs.rx_flow = dma_channel[dma_idx]; + } + + priv->link_type = fdtdec_get_int(fdt, slave, "link-interface", -1); + + phy = fdtdec_lookup_phandle(fdt, slave, "phy-handle"); + if (phy >= 0) { + priv->phy_addr = fdtdec_get_int(fdt, phy, "reg", -1); + + mdio = fdt_parent_offset(fdt, phy); + if (mdio < 0) { + error("mdio dt not found\n"); + return -ENODEV; + } + priv->mdio_base = (void *)fdtdec_get_addr(fdt, mdio, "reg"); } - priv->mdio_base = (void *)fdtdec_get_addr(fdt, mdio, "reg"); if (priv->link_type == LINK_TYPE_MAC_TO_PHY_MODE) { priv->phy_if = PHY_INTERFACE_MODE_SGMII; @@ -1002,11 +1083,51 @@ static int ks2_eth_ofdata_to_platdata(struct udevice *dev) priv->sgmii_link_type = SGMII_LINK_MAC_PHY; priv->has_mdio = true; } - pdata->iobase = dev_get_addr(dev); - fdtdec_get_int_array(fdt, dev->of_offset, "ti,navigator-dmas", - dma_channel, 6); - priv->net_rx_buffs.rx_flow = dma_channel[1]; + return 0; +} + +static int ks2_sl_eth_ofdata_to_platdata(struct udevice *dev) +{ + struct ks2_eth_priv *priv = dev_get_priv(dev); + struct eth_pdata *pdata = dev_get_platdata(dev); + const void *fdt = gd->fdt_blob; + int slave = dev->of_offset; + int interfaces; + int gbe; + int netcp_devices; + int netcp; + + interfaces = fdt_parent_offset(fdt, slave); + gbe = fdt_parent_offset(fdt, interfaces); + netcp_devices = fdt_parent_offset(fdt, gbe); + netcp = fdt_parent_offset(fdt, netcp_devices); + + ks2_eth_parse_slave_interface(netcp, slave, priv, pdata); + + pdata->iobase = fdtdec_get_addr(fdt, netcp, "reg"); + + return 0; +} + +static int ks2_eth_ofdata_to_platdata(struct udevice *dev) +{ + struct ks2_eth_priv *priv = dev_get_priv(dev); + struct eth_pdata *pdata = dev_get_platdata(dev); + const void *fdt = gd->fdt_blob; + int gbe_0 = -ENODEV; + int netcp_devices; + int gbe; + + netcp_devices = fdt_subnode_offset(fdt, dev->of_offset, + "netcp-devices"); + gbe = fdt_subnode_offset(fdt, netcp_devices, "gbe"); + + ks2_eth_bind_slaves(dev, gbe, &gbe_0); + + ks2_eth_parse_slave_interface(dev->of_offset, gbe_0, priv, pdata); + + pdata->iobase = dev_get_addr(dev); return 0; } @@ -1016,6 +1137,17 @@ static const struct udevice_id ks2_eth_ids[] = { { } }; +U_BOOT_DRIVER(eth_ks2_slave) = { + .name = "eth_ks2_sl", + .id = UCLASS_ETH, + .ofdata_to_platdata = ks2_sl_eth_ofdata_to_platdata, + .probe = ks2_eth_probe, + .remove = ks2_eth_remove, + .ops = &ks2_eth_ops, + .priv_auto_alloc_size = sizeof(struct ks2_eth_priv), + .platdata_auto_alloc_size = sizeof(struct eth_pdata), + .flags = DM_FLAG_ALLOC_PRIV_DMA, +}; U_BOOT_DRIVER(eth_ks2) = { .name = "eth_ks2", diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c index 1a35d55..1d68379 100644 --- a/drivers/spi/cadence_qspi_apb.c +++ b/drivers/spi/cadence_qspi_apb.c @@ -293,8 +293,11 @@ void cadence_qspi_apb_config_baudrate_div(void *reg_base, debug("%s: ref_clk %dHz sclk %dHz Div 0x%x\n", __func__, ref_clk_hz, sclk_hz, div); - div = (div & CQSPI_REG_CONFIG_BAUD_MASK) << CQSPI_REG_CONFIG_BAUD_LSB; - reg |= div; + /* ensure the baud rate doesn't exceed the max value */ + if (div > CQSPI_REG_CONFIG_BAUD_MASK) + div = CQSPI_REG_CONFIG_BAUD_MASK; + + reg |= (div << CQSPI_REG_CONFIG_BAUD_LSB); writel(reg, reg_base + CQSPI_REG_CONFIG); cadence_qspi_apb_controller_enable(reg_base); |