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-rw-r--r--drivers/i2c/designware_i2c.c23
-rw-r--r--drivers/mmc/mmc-uclass.c15
-rw-r--r--drivers/mmc/mmc.c30
-rw-r--r--drivers/mmc/sdhci.c9
-rw-r--r--drivers/mmc/socfpga_dw_mmc.c2
-rw-r--r--drivers/mtd/nand/Kconfig7
-rw-r--r--drivers/net/Kconfig7
-rw-r--r--drivers/pci/Kconfig19
-rw-r--r--drivers/serial/Kconfig7
-rw-r--r--drivers/thermal/Kconfig13
10 files changed, 107 insertions, 25 deletions
diff --git a/drivers/i2c/designware_i2c.c b/drivers/i2c/designware_i2c.c
index e60fd0a..c68ff64 100644
--- a/drivers/i2c/designware_i2c.c
+++ b/drivers/i2c/designware_i2c.c
@@ -249,6 +249,7 @@ static int __dw_i2c_read(struct i2c_regs *i2c_base, u8 dev, uint addr,
int alen, u8 *buffer, int len)
{
unsigned long start_time_rx;
+ unsigned int active = 0;
#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
/*
@@ -274,18 +275,28 @@ static int __dw_i2c_read(struct i2c_regs *i2c_base, u8 dev, uint addr,
start_time_rx = get_timer(0);
while (len) {
- if (len == 1)
- writel(IC_CMD | IC_STOP, &i2c_base->ic_cmd_data);
- else
- writel(IC_CMD, &i2c_base->ic_cmd_data);
+ if (!active) {
+ /*
+ * Avoid writing to ic_cmd_data multiple times
+ * in case this loop spins too quickly and the
+ * ic_status RFNE bit isn't set after the first
+ * write. Subsequent writes to ic_cmd_data can
+ * trigger spurious i2c transfer.
+ */
+ if (len == 1)
+ writel(IC_CMD | IC_STOP, &i2c_base->ic_cmd_data);
+ else
+ writel(IC_CMD, &i2c_base->ic_cmd_data);
+ active = 1;
+ }
if (readl(&i2c_base->ic_status) & IC_STATUS_RFNE) {
*buffer++ = (uchar)readl(&i2c_base->ic_cmd_data);
len--;
start_time_rx = get_timer(0);
-
+ active = 0;
} else if (get_timer(start_time_rx) > I2C_BYTE_TO) {
- return 1;
+ return 1;
}
}
diff --git a/drivers/mmc/mmc-uclass.c b/drivers/mmc/mmc-uclass.c
index 77424cd..2fe5d61 100644
--- a/drivers/mmc/mmc-uclass.c
+++ b/drivers/mmc/mmc-uclass.c
@@ -116,13 +116,7 @@ int get_mmc_num(void)
int mmc_get_next_devnum(void)
{
- int ret;
-
- ret = blk_find_max_devnum(IF_TYPE_MMC);
- if (ret < 0)
- return ret;
-
- return ret;
+ return blk_find_max_devnum(IF_TYPE_MMC);
}
struct blk_desc *mmc_get_blk_desc(struct mmc *mmc)
@@ -243,7 +237,6 @@ static int mmc_select_hwpart(struct udevice *bdev, int hwpart)
struct udevice *mmc_dev = dev_get_parent(bdev);
struct mmc *mmc = mmc_get_mmc_dev(mmc_dev);
struct blk_desc *desc = dev_get_uclass_platdata(bdev);
- int ret;
if (desc->hwpart == hwpart)
return 0;
@@ -251,11 +244,7 @@ static int mmc_select_hwpart(struct udevice *bdev, int hwpart)
if (mmc->part_config == MMCPART_NOAVAILABLE)
return -EMEDIUMTYPE;
- ret = mmc_switch_part(mmc, hwpart);
- if (ret)
- return ret;
-
- return 0;
+ return mmc_switch_part(mmc, hwpart);
}
static const struct blk_ops mmc_blk_ops = {
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 0312da9..4380c7c 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -15,6 +15,7 @@
#include <errno.h>
#include <mmc.h>
#include <part.h>
+#include <power/regulator.h>
#include <malloc.h>
#include <memalign.h>
#include <linux/list.h>
@@ -1582,6 +1583,31 @@ __weak void board_mmc_power_init(void)
{
}
+static int mmc_power_init(struct mmc *mmc)
+{
+ board_mmc_power_init();
+
+#if defined(CONFIG_DM_MMC) && defined(CONFIG_DM_REGULATOR) && \
+ !defined(CONFIG_SPL_BUILD)
+ struct udevice *vmmc_supply;
+ int ret;
+
+ ret = device_get_supply_regulator(mmc->dev, "vmmc-supply",
+ &vmmc_supply);
+ if (ret) {
+ debug("%s: No vmmc supply\n", mmc->dev->name);
+ return 0;
+ }
+
+ ret = regulator_set_enable(vmmc_supply, true);
+ if (ret) {
+ puts("Error enabling VMMC supply\n");
+ return ret;
+ }
+#endif
+ return 0;
+}
+
int mmc_start_init(struct mmc *mmc)
{
bool no_card;
@@ -1606,7 +1632,9 @@ int mmc_start_init(struct mmc *mmc)
#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
mmc_adapter_card_type_ident();
#endif
- board_mmc_power_init();
+ err = mmc_power_init(mmc);
+ if (err)
+ return err;
#ifdef CONFIG_DM_MMC_OPS
/* The device has already been probed ready for use */
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index 837c538..766e9ee 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -242,6 +242,7 @@ static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd,
sdhci_writel(host, cmd->cmdarg, SDHCI_ARGUMENT);
#ifdef CONFIG_MMC_SDMA
+ trans_bytes = ALIGN(trans_bytes, CONFIG_SYS_CACHELINE_SIZE);
flush_cache(start_addr, trans_bytes);
#endif
sdhci_writew(host, SDHCI_MAKE_CMD(cmd->cmdidx, flags), SDHCI_COMMAND);
@@ -607,9 +608,11 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host,
* In case of Host Controller v3.00, find out whether clock
* multiplier is supported.
*/
- caps_1 = sdhci_readl(host, SDHCI_CAPABILITIES_1);
- host->clk_mul = (caps_1 & SDHCI_CLOCK_MUL_MASK) >>
- SDHCI_CLOCK_MUL_SHIFT;
+ if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) {
+ caps_1 = sdhci_readl(host, SDHCI_CAPABILITIES_1);
+ host->clk_mul = (caps_1 & SDHCI_CLOCK_MUL_MASK) >>
+ SDHCI_CLOCK_MUL_SHIFT;
+ }
return 0;
}
diff --git a/drivers/mmc/socfpga_dw_mmc.c b/drivers/mmc/socfpga_dw_mmc.c
index 5a3a4ff..0a22e58 100644
--- a/drivers/mmc/socfpga_dw_mmc.c
+++ b/drivers/mmc/socfpga_dw_mmc.c
@@ -151,7 +151,9 @@ U_BOOT_DRIVER(socfpga_dwmmc_drv) = {
.id = UCLASS_MMC,
.of_match = socfpga_dwmmc_ids,
.ofdata_to_platdata = socfpga_dwmmc_ofdata_to_platdata,
+ .ops = &dm_dwmci_ops,
.bind = socfpga_dwmmc_bind,
.probe = socfpga_dwmmc_probe,
.priv_auto_alloc_size = sizeof(struct dwmci_socfpga_priv_data),
+ .platdata_auto_alloc_size = sizeof(struct socfpga_dwmci_plat),
};
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 5ce7d6d..df154bf 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -80,6 +80,13 @@ config NAND_ARASAN
controller. This uses the hardware ECC for read and
write operations.
+config NAND_MXS
+ bool "MXS NAND support"
+ depends on MX6
+ help
+ This enables NAND driver for the NAND flash controller on the
+ MXS processors.
+
comment "Generic NAND options"
# Enhance depends when converting drivers to Kconfig which use this config
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 302c005..7b9961d 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -129,6 +129,13 @@ config ETHOC
help
This MAC is present in OpenRISC and Xtensa XTFPGA boards.
+config FEC_MXC
+ bool "FEC Ethernet controller"
+ depends on MX6
+ help
+ This driver supports the 10/100 Fast Ethernet controller for
+ NXP i.MX processors.
+
config MVPP2
bool "Marvell Armada 375 network interface support"
depends on ARMADA_375
diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index 9a7c187..b8376b4 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -1,4 +1,12 @@
-menu "PCI"
+menuconfig PCI
+ bool "PCI support"
+ default y if PPC || X86
+ help
+ Enable support for PCI (Peripheral Interconnect Bus), a type of bus
+ used on some devices to allow the CPU to communicate with its
+ peripherals.
+
+if PCI
config DM_PCI
bool "Enable driver mode for PCI"
@@ -18,6 +26,13 @@ config DM_PCI_COMPAT
measure when porting a board to use driver model for PCI. Once the
board is fully supported, this option should be disabled.
+config PCI_PNP
+ bool "Enable Plug & Play support for PCI"
+ depends on PCI || DM_PCI
+ default y
+ help
+ Enable PCI memory and I/O space resource allocation and assignment.
+
config PCI_SANDBOX
bool "Sandbox PCI support"
depends on SANDBOX && DM_PCI
@@ -46,4 +61,4 @@ config PCI_XILINX
Enable support for the Xilinx AXI bridge for PCI express, an IP block
which can be used on some generations of Xilinx FPGAs.
-endmenu
+endif
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 507a27d..56c024f 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -323,6 +323,13 @@ config MVEBU_A3700_UART
Choose this option to add support for UART driver on the Marvell
Armada 3700 SoC. The base address is configured via DT.
+config MXC_UART
+ bool "IMX serial port support"
+ depends on MX6
+ help
+ If you have a machine based on a Motorola IMX CPU you
+ can enable its onboard serial port by enabling this option.
+
config PIC32_SERIAL
bool "Support for Microchip PIC32 on-chip UART"
depends on DM_SERIAL && MACH_PIC32
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index 8e22ea7..f0ffbb3 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -5,3 +5,16 @@ config DM_THERMAL
temperature sensors to permit warnings, speed throttling or even
automatic power-off when the temperature gets too high or low. Other
devices may be discrete but connected on a suitable bus.
+
+if DM_THERMAL
+
+config IMX_THERMAL
+ bool "Temperature sensor driver for Freescale i.MX SoCs"
+ depends on MX6
+ help
+ Support for Temperature Monitor (TEMPMON) found on Freescale i.MX SoCs.
+ It supports one critical trip point and one passive trip point. The
+ cpufreq is used as the cooling device to throttle CPUs when the
+ passive trip is crossed.
+
+endif # if DM_THERMAL
generated by cgit v1.1 at 2024-07-07 20:14:57 +0000