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-rw-r--r--drivers/net/rtl8169.c100
-rw-r--r--drivers/net/tsec.c10
-rw-r--r--drivers/qe/uec.c23
-rw-r--r--drivers/rtc/Makefile1
-rw-r--r--drivers/rtc/rx8025.c227
5 files changed, 306 insertions, 55 deletions
diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c
index 63ea2cc..1d7f31c 100644
--- a/drivers/net/rtl8169.c
+++ b/drivers/net/rtl8169.c
@@ -48,7 +48,10 @@
*
* Indent Options: indent -kr -i8
***************************************************************************/
-
+/*
+ * 26 August 2006 Mihai Georgian <u-boot@linuxnotincluded.org.uk>
+ * Modified to use le32_to_cpu and cpu_to_le32 properly
+ */
#include <common.h>
#include <malloc.h>
#include <net.h>
@@ -68,12 +71,7 @@
static u32 ioaddr;
/* Condensed operations for readability. */
-#define virt_to_le32desc(addr) cpu_to_le32(virt_to_bus(addr))
-#define le32desc_to_virt(addr) bus_to_virt(le32_to_cpu(addr))
-
#define currticks() get_timer(0)
-#define bus_to_phys(a) pci_mem_to_phys((pci_dev_t)dev->priv, a)
-#define phys_to_bus(a) pci_phys_to_mem((pci_dev_t)dev->priv, a)
/* media options */
#define MAX_UNITS 8
@@ -102,7 +100,7 @@ static int media[MAX_UNITS] = { -1, -1, -1, -1, -1, -1, -1, -1 };
#define RTL_MIN_IO_SIZE 0x80
#define TX_TIMEOUT (6*HZ)
-/* write/read MMIO register */
+/* write/read MMIO register. Notice: {read,write}[wl] do the necessary swapping */
#define RTL_W8(reg, val8) writeb ((val8), ioaddr + (reg))
#define RTL_W16(reg, val16) writew ((val16), ioaddr + (reg))
#define RTL_W32(reg, val32) writel ((val32), ioaddr + (reg))
@@ -218,7 +216,7 @@ enum RTL8169_register_content {
PHY_Enable_Auto_Nego = 0x1000,
/* PHY_STAT_REG = 1; */
- PHY_Auto_Neco_Comp = 0x0020,
+ PHY_Auto_Nego_Comp = 0x0020,
/* PHY_AUTO_NEGO_REG = 4; */
PHY_Cap_10_Half = 0x0020,
@@ -413,23 +411,23 @@ static int rtl_recv(struct eth_device *dev)
ioaddr = dev->iobase;
cur_rx = tpc->cur_rx;
- if ((tpc->RxDescArray[cur_rx].status & OWNbit) == 0) {
- if (!(tpc->RxDescArray[cur_rx].status & RxRES)) {
+ if ((le32_to_cpu(tpc->RxDescArray[cur_rx].status) & OWNbit) == 0) {
+ if (!(le32_to_cpu(tpc->RxDescArray[cur_rx].status) & RxRES)) {
unsigned char rxdata[RX_BUF_LEN];
- length = (int) (tpc->RxDescArray[cur_rx].
- status & 0x00001FFF) - 4;
+ length = (int) (le32_to_cpu(tpc->RxDescArray[cur_rx].
+ status) & 0x00001FFF) - 4;
memcpy(rxdata, tpc->RxBufferRing[cur_rx], length);
NetReceive(rxdata, length);
if (cur_rx == NUM_RX_DESC - 1)
tpc->RxDescArray[cur_rx].status =
- (OWNbit | EORbit) + RX_BUF_SIZE;
+ cpu_to_le32((OWNbit | EORbit) + RX_BUF_SIZE);
else
tpc->RxDescArray[cur_rx].status =
- OWNbit + RX_BUF_SIZE;
+ cpu_to_le32(OWNbit + RX_BUF_SIZE);
tpc->RxDescArray[cur_rx].buf_addr =
- virt_to_bus(tpc->RxBufferRing[cur_rx]);
+ cpu_to_le32(tpc->RxBufferRing[cur_rx]);
} else {
puts("Error Rx");
}
@@ -454,6 +452,7 @@ static int rtl_send(struct eth_device *dev, volatile void *packet, int length)
u8 *ptxb;
int entry = tpc->cur_tx % NUM_TX_DESC;
u32 len = length;
+ int ret;
#ifdef DEBUG_RTL8169_TX
int stime = currticks();
@@ -470,34 +469,38 @@ static int rtl_send(struct eth_device *dev, volatile void *packet, int length)
while (len < ETH_ZLEN)
ptxb[len++] = '\0';
- tpc->TxDescArray[entry].buf_addr = virt_to_bus(ptxb);
+ tpc->TxDescArray[entry].buf_addr = cpu_to_le32(ptxb);
if (entry != (NUM_TX_DESC - 1)) {
tpc->TxDescArray[entry].status =
- (OWNbit | FSbit | LSbit) | ((len > ETH_ZLEN) ?
- len : ETH_ZLEN);
+ cpu_to_le32((OWNbit | FSbit | LSbit) |
+ ((len > ETH_ZLEN) ? len : ETH_ZLEN));
} else {
tpc->TxDescArray[entry].status =
- (OWNbit | EORbit | FSbit | LSbit) |
- ((len > ETH_ZLEN) ? length : ETH_ZLEN);
+ cpu_to_le32((OWNbit | EORbit | FSbit | LSbit) |
+ ((len > ETH_ZLEN) ? len : ETH_ZLEN));
}
RTL_W8(TxPoll, 0x40); /* set polling bit */
tpc->cur_tx++;
to = currticks() + TX_TIMEOUT;
- while ((tpc->TxDescArray[entry].status & OWNbit) && (currticks() < to)); /* wait */
+ while ((le32_to_cpu(tpc->TxDescArray[entry].status) & OWNbit)
+ && (currticks() < to)); /* wait */
if (currticks() >= to) {
#ifdef DEBUG_RTL8169_TX
puts ("tx timeout/error\n");
printf ("%s elapsed time : %d\n", __FUNCTION__, currticks()-stime);
#endif
- return 0;
+ ret = 0;
} else {
#ifdef DEBUG_RTL8169_TX
puts("tx done\n");
#endif
- return length;
+ ret = length;
}
+ /* Delay to make net console (nc) work properly */
+ udelay(20);
+ return ret;
}
static void rtl8169_set_rx_mode(struct eth_device *dev)
@@ -564,8 +567,8 @@ static void rtl8169_hw_start(struct eth_device *dev)
tpc->cur_rx = 0;
- RTL_W32(TxDescStartAddr, virt_to_le32desc(tpc->TxDescArray));
- RTL_W32(RxDescStartAddr, virt_to_le32desc(tpc->RxDescArray));
+ RTL_W32(TxDescStartAddr, tpc->TxDescArray);
+ RTL_W32(RxDescStartAddr, tpc->RxDescArray);
RTL_W8(Cfg9346, Cfg9346_Lock);
udelay(10);
@@ -603,13 +606,14 @@ static void rtl8169_init_ring(struct eth_device *dev)
for (i = 0; i < NUM_RX_DESC; i++) {
if (i == (NUM_RX_DESC - 1))
tpc->RxDescArray[i].status =
- (OWNbit | EORbit) + RX_BUF_SIZE;
+ cpu_to_le32((OWNbit | EORbit) + RX_BUF_SIZE);
else
- tpc->RxDescArray[i].status = OWNbit + RX_BUF_SIZE;
+ tpc->RxDescArray[i].status =
+ cpu_to_le32(OWNbit + RX_BUF_SIZE);
tpc->RxBufferRing[i] = &rxb[i * RX_BUF_SIZE];
tpc->RxDescArray[i].buf_addr =
- virt_to_bus(tpc->RxBufferRing[i]);
+ cpu_to_le32(tpc->RxBufferRing[i]);
}
#ifdef DEBUG_RTL8169
@@ -623,8 +627,6 @@ RESET - Finish setting up the ethernet interface
static void rtl_reset(struct eth_device *dev, bd_t *bis)
{
int i;
- u8 diff;
- u32 TxPhyAddr, RxPhyAddr;
#ifdef DEBUG_RTL8169
int stime = currticks();
@@ -632,25 +634,14 @@ static void rtl_reset(struct eth_device *dev, bd_t *bis)
#endif
tpc->TxDescArrays = tx_ring;
- if (tpc->TxDescArrays == 0)
- puts("Allot Error");
/* Tx Desscriptor needs 256 bytes alignment; */
- TxPhyAddr = virt_to_bus(tpc->TxDescArrays);
- diff = 256 - (TxPhyAddr - ((TxPhyAddr >> 8) << 8));
- TxPhyAddr += diff;
- tpc->TxDescArray = (struct TxDesc *) (tpc->TxDescArrays + diff);
+ tpc->TxDescArray = (struct TxDesc *) ((unsigned long)(tpc->TxDescArrays +
+ 255) & ~255);
tpc->RxDescArrays = rx_ring;
/* Rx Desscriptor needs 256 bytes alignment; */
- RxPhyAddr = virt_to_bus(tpc->RxDescArrays);
- diff = 256 - (RxPhyAddr - ((RxPhyAddr >> 8) << 8));
- RxPhyAddr += diff;
- tpc->RxDescArray = (struct RxDesc *) (tpc->RxDescArrays + diff);
-
- if (tpc->TxDescArrays == NULL || tpc->RxDescArrays == NULL) {
- puts("Allocate RxDescArray or TxDescArray failed\n");
- return;
- }
+ tpc->RxDescArray = (struct RxDesc *) ((unsigned long)(tpc->RxDescArrays +
+ 255) & ~255);
rtl8169_init_ring(dev);
rtl8169_hw_start(dev);
@@ -733,7 +724,7 @@ static int rtl_init(struct eth_device *dev, bd_t *bis)
/* Get MAC address. FIXME: read EEPROM */
for (i = 0; i < MAC_ADDR_LEN; i++)
- dev->enetaddr[i] = RTL_R8(MAC0 + i);
+ bis->bi_enetaddr[i] = dev->enetaddr[i] = RTL_R8(MAC0 + i);
#ifdef DEBUG_RTL8169
printf("MAC Address");
@@ -808,7 +799,7 @@ static int rtl_init(struct eth_device *dev, bd_t *bis)
/* wait for auto-negotiation process */
for (i = 10000; i > 0; i--) {
/* check if auto-negotiation complete */
- if (mdio_read(PHY_STAT_REG) & PHY_Auto_Neco_Comp) {
+ if (mdio_read(PHY_STAT_REG) & PHY_Auto_Nego_Comp) {
udelay(100);
option = RTL_R8(PHYstatus);
if (option & _1000bpsF) {
@@ -818,13 +809,12 @@ static int rtl_init(struct eth_device *dev, bd_t *bis)
#endif
} else {
#ifdef DEBUG_RTL8169
- printf
- ("%s: %sMbps %s-duplex operation.\n",
- dev->name,
- (option & _100bps) ? "100" :
- "10",
- (option & FullDup) ? "Full" :
- "Half");
+ printf("%s: %sMbps %s-duplex operation.\n",
+ dev->name,
+ (option & _100bps) ? "100" :
+ "10",
+ (option & FullDup) ? "Full" :
+ "Half");
#endif
}
break;
@@ -869,7 +859,7 @@ int rtl8169_initialize(bd_t *bis)
sprintf (dev->name, "RTL8169#%d", card_number);
dev->priv = (void *) devno;
- dev->iobase = (int)bus_to_phys(iobase);
+ dev->iobase = (int)pci_mem_to_phys(devno, iobase);
dev->init = rtl_reset;
dev->halt = rtl_halt;
diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index ca6284b..108cebd 100644
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
@@ -674,6 +674,15 @@ uint mii_cis8204_setmode(uint mii_reg, struct tsec_private * priv)
return MIIM_CIS8204_EPHYCON_INIT;
}
+uint mii_m88e1111s_setmode(uint mii_reg, struct tsec_private *priv)
+{
+ uint mii_data = read_phy_reg(priv, mii_reg);
+
+ if (priv->flags & TSEC_REDUCED)
+ mii_data = (mii_data & 0xfff0) | 0x000b;
+ return mii_data;
+}
+
/* Initialized required registers to appropriate values, zeroing
* those we don't care about (unless zero is bad, in which case,
* choose a more appropriate value)
@@ -1034,6 +1043,7 @@ struct phy_info phy_info_M88E1111S = {
(struct phy_cmd[]){ /* config */
/* Reset and configure the PHY */
{MIIM_CONTROL, MIIM_CONTROL_RESET, NULL},
+ {0x1b, 0x848f, &mii_m88e1111s_setmode},
{0x14, 0x0cd2, NULL}, /* Delay RGMII TX and RX */
{MIIM_GBIT_CONTROL, MIIM_GBIT_CONTROL_INIT, NULL},
{MIIM_ANAR, MIIM_ANAR_INIT, NULL},
diff --git a/drivers/qe/uec.c b/drivers/qe/uec.c
index dc2765b..a27c12a 100644
--- a/drivers/qe/uec.c
+++ b/drivers/qe/uec.c
@@ -69,6 +69,25 @@ static uec_info_t eth2_uec_info = {
};
#endif
+#ifdef CONFIG_UEC_ETH3
+static uec_info_t eth3_uec_info = {
+ .uf_info = {
+ .ucc_num = CFG_UEC3_UCC_NUM,
+ .rx_clock = CFG_UEC3_RX_CLK,
+ .tx_clock = CFG_UEC3_TX_CLK,
+ .eth_type = CFG_UEC3_ETH_TYPE,
+ },
+ .num_threads_tx = UEC_NUM_OF_THREADS_4,
+ .num_threads_rx = UEC_NUM_OF_THREADS_4,
+ .riscTx = QE_RISC_ALLOCATION_RISC1_AND_RISC2,
+ .riscRx = QE_RISC_ALLOCATION_RISC1_AND_RISC2,
+ .tx_bd_ring_len = 16,
+ .rx_bd_ring_len = 16,
+ .phy_address = CFG_UEC3_PHY_ADDR,
+ .enet_interface = CFG_UEC3_INTERFACE_MODE,
+};
+#endif
+
static int uec_mac_enable(uec_private_t *uec, comm_dir_e mode)
{
uec_t *uec_regs;
@@ -1238,6 +1257,10 @@ int uec_initialize(int index)
#ifdef CONFIG_UEC_ETH2
uec_info = &eth2_uec_info;
#endif
+ } else if (index == 2) {
+#ifdef CONFIG_UEC_ETH3
+ uec_info = &eth3_uec_info;
+#endif
} else {
printf("%s: index is illegal.\n", __FUNCTION__);
return -EINVAL;
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index e5ee611..8c7f148 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -50,6 +50,7 @@ COBJS-y += mpc8xx.o
COBJS-y += pcf8563.o
COBJS-y += s3c24x0_rtc.o
COBJS-y += rs5c372.o
+COBJS-y += rx8025.o
COBJS-y += mcfrtc.o
COBJS-y += x1205.o
diff --git a/drivers/rtc/rx8025.c b/drivers/rtc/rx8025.c
new file mode 100644
index 0000000..6c94ae1
--- /dev/null
+++ b/drivers/rtc/rx8025.c
@@ -0,0 +1,227 @@
+/*
+ * (C) Copyright 2007
+ * Matthias Fuchs, esd gmbh, matthias.fuchs@esd-electronics.com.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * Epson RX8025 RTC driver.
+ */
+
+#include <common.h>
+#include <command.h>
+#include <rtc.h>
+#include <i2c.h>
+
+#if defined(CONFIG_RTC_RX8025) && defined(CONFIG_CMD_DATE)
+
+/*---------------------------------------------------------------------*/
+#undef DEBUG_RTC
+
+#ifdef DEBUG_RTC
+#define DEBUGR(fmt,args...) printf(fmt ,##args)
+#else
+#define DEBUGR(fmt,args...)
+#endif
+/*---------------------------------------------------------------------*/
+
+#ifndef CFG_I2C_RTC_ADDR
+# define CFG_I2C_RTC_ADDR 0x32
+#endif
+
+/*
+ * RTC register addresses
+ */
+#define RTC_SEC_REG_ADDR 0x00
+#define RTC_MIN_REG_ADDR 0x01
+#define RTC_HR_REG_ADDR 0x02
+#define RTC_DAY_REG_ADDR 0x03
+#define RTC_DATE_REG_ADDR 0x04
+#define RTC_MON_REG_ADDR 0x05
+#define RTC_YR_REG_ADDR 0x06
+
+#define RTC_CTL1_REG_ADDR 0x0e
+#define RTC_CTL2_REG_ADDR 0x0f
+
+/*
+ * Control register 1 bits
+ */
+#define RTC_CTL1_BIT_2412 0x20
+
+/*
+ * Control register 2 bits
+ */
+#define RTC_CTL2_BIT_PON 0x10
+#define RTC_CTL2_BIT_VDET 0x40
+#define RTC_CTL2_BIT_XST 0x20
+#define RTC_CTL2_BIT_VDSL 0x80
+
+/*
+ * Note: the RX8025 I2C RTC requires register
+ * reads and write to consist of a single bus
+ * cycle. It is not allowed to write the register
+ * address in a first cycle that is terminated by
+ * a STOP condition. The chips needs a 'restart'
+ * sequence (start sequence without a prior stop).
+ * This driver has been written for a 4xx board.
+ * U-Boot's 4xx i2c driver is currently not capable
+ * to generate such cycles to some work arounds
+ * are used.
+ */
+
+/* static uchar rtc_read (uchar reg); */
+#define rtc_read(reg) buf[((reg) + 1) & 0xf]
+
+static void rtc_write (uchar reg, uchar val);
+static uchar bin2bcd (unsigned int n);
+static unsigned bcd2bin (uchar c);
+
+/*
+ * Get the current time from the RTC
+ */
+void rtc_get (struct rtc_time *tmp)
+{
+ uchar sec, min, hour, mday, wday, mon, year, ctl2;
+ uchar buf[16];
+
+ if (i2c_read(CFG_I2C_RTC_ADDR, 0, 0, buf, 16))
+ printf("Error reading from RTC\n");
+
+ sec = rtc_read(RTC_SEC_REG_ADDR);
+ min = rtc_read(RTC_MIN_REG_ADDR);
+ hour = rtc_read(RTC_HR_REG_ADDR);
+ wday = rtc_read(RTC_DAY_REG_ADDR);
+ mday = rtc_read(RTC_DATE_REG_ADDR);
+ mon = rtc_read(RTC_MON_REG_ADDR);
+ year = rtc_read(RTC_YR_REG_ADDR);
+
+ DEBUGR ("Get RTC year: %02x mon: %02x mday: %02x wday: %02x "
+ "hr: %02x min: %02x sec: %02x\n",
+ year, mon, mday, wday, hour, min, sec);
+
+ /* dump status */
+ ctl2 = rtc_read(RTC_CTL2_REG_ADDR);
+ if (ctl2 & RTC_CTL2_BIT_PON)
+ printf("RTC: power-on detected\n");
+
+ if (ctl2 & RTC_CTL2_BIT_VDET)
+ printf("RTC: voltage drop detected\n");
+
+ if (!(ctl2 & RTC_CTL2_BIT_XST))
+ printf("RTC: oscillator stop detected\n");
+
+ tmp->tm_sec = bcd2bin (sec & 0x7F);
+ tmp->tm_min = bcd2bin (min & 0x7F);
+ tmp->tm_hour = bcd2bin (hour & 0x3F);
+ tmp->tm_mday = bcd2bin (mday & 0x3F);
+ tmp->tm_mon = bcd2bin (mon & 0x1F);
+ tmp->tm_year = bcd2bin (year) + ( bcd2bin (year) >= 70 ? 1900 : 2000);
+ tmp->tm_wday = bcd2bin (wday & 0x07);
+ tmp->tm_yday = 0;
+ tmp->tm_isdst= 0;
+
+ DEBUGR ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
+ tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
+ tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
+}
+
+
+/*
+ * Set the RTC
+ */
+void rtc_set (struct rtc_time *tmp)
+{
+ DEBUGR ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
+ tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
+ tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
+
+ if (tmp->tm_year < 1970 || tmp->tm_year > 2069)
+ printf("WARNING: year should be between 1970 and 2069!\n");
+
+ rtc_write (RTC_YR_REG_ADDR, bin2bcd (tmp->tm_year % 100));
+ rtc_write (RTC_MON_REG_ADDR, bin2bcd (tmp->tm_mon));
+ rtc_write (RTC_DAY_REG_ADDR, bin2bcd (tmp->tm_wday));
+ rtc_write (RTC_DATE_REG_ADDR, bin2bcd (tmp->tm_mday));
+ rtc_write (RTC_HR_REG_ADDR, bin2bcd (tmp->tm_hour));
+ rtc_write (RTC_MIN_REG_ADDR, bin2bcd (tmp->tm_min));
+ rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec));
+
+ rtc_write (RTC_CTL1_REG_ADDR, RTC_CTL1_BIT_2412);
+}
+
+
+/*
+ * Reset the RTC. We setting the date back to 1970-01-01.
+ */
+void rtc_reset (void)
+{
+ struct rtc_time tmp;
+ uchar buf[16];
+ uchar ctl2;
+
+ if (i2c_read(CFG_I2C_RTC_ADDR, 0, 0, buf, 16))
+ printf("Error reading from RTC\n");
+
+ ctl2 = rtc_read(RTC_CTL2_REG_ADDR);
+ ctl2 &= ~(RTC_CTL2_BIT_PON | RTC_CTL2_BIT_VDET);
+ ctl2 |= RTC_CTL2_BIT_XST | RTC_CTL2_BIT_VDSL;
+ rtc_write (RTC_CTL2_REG_ADDR, ctl2);
+
+ tmp.tm_year = 1970;
+ tmp.tm_mon = 1;
+ tmp.tm_mday= 1;
+ tmp.tm_hour = 0;
+ tmp.tm_min = 0;
+ tmp.tm_sec = 0;
+
+ rtc_set(&tmp);
+
+ printf ( "RTC: %4d-%02d-%02d %2d:%02d:%02d UTC\n",
+ tmp.tm_year, tmp.tm_mon, tmp.tm_mday,
+ tmp.tm_hour, tmp.tm_min, tmp.tm_sec);
+
+ return;
+}
+
+
+/*
+ * Helper functions
+ */
+static void rtc_write (uchar reg, uchar val)
+{
+ uchar buf[2];
+ buf[0] = reg << 4;
+ buf[1] = val;
+ if (i2c_write(CFG_I2C_RTC_ADDR, 0, 0, buf, 2) != 0)
+ printf("Error writing to RTC\n");
+
+}
+
+static unsigned bcd2bin (uchar n)
+{
+ return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
+}
+
+static unsigned char bin2bcd (unsigned int n)
+{
+ return (((n / 10) << 4) | (n % 10));
+}
+
+#endif /* CONFIG_RTC_RX8025 && (CFG_COMMANDS & CFG_CMD_DATE) */
generated by cgit v1.1 at 2024-11-06 12:41:51 +0000