diff options
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/block/fsl_sata.c | 15 | ||||
| -rw-r--r-- | drivers/mtd/nand/davinci_nand.c | 26 | ||||
| -rw-r--r-- | drivers/net/fm/dtsec.c | 2 | ||||
| -rw-r--r-- | drivers/net/fm/eth.c | 3 | ||||
| -rw-r--r-- | drivers/net/phy/teranetics.c | 21 |
5 files changed, 46 insertions, 21 deletions
diff --git a/drivers/block/fsl_sata.c b/drivers/block/fsl_sata.c index 4b97a0e..b101bd7 100644 --- a/drivers/block/fsl_sata.c +++ b/drivers/block/fsl_sata.c @@ -700,7 +700,7 @@ u32 fsl_sata_rw_ncq_cmd(int dev, u32 start, u32 blkcnt, u8 *buffer, int is_write int ncq_channel; u64 block; - if (sata_dev_desc[dev].lba48 != 1) { + if (sata->lba48 != 1) { printf("execute FPDMA command on non-LBA48 hard disk\n\r"); return -1; } @@ -854,8 +854,9 @@ u32 ata_low_level_rw_lba28(int dev, u32 blknr, u32 blkcnt, void *buffer, int is_ ulong sata_read(int dev, u32 blknr, u32 blkcnt, void *buffer) { u32 rc; + fsl_sata_t *sata = (fsl_sata_t *)sata_dev_desc[dev].priv; - if (sata_dev_desc[dev].lba48) + if (sata->lba48) rc = ata_low_level_rw_lba48(dev, blknr, blkcnt, buffer, READ_CMD); else rc = ata_low_level_rw_lba28(dev, blknr, blkcnt, buffer, READ_CMD); @@ -865,8 +866,9 @@ ulong sata_read(int dev, u32 blknr, u32 blkcnt, void *buffer) ulong sata_write(int dev, u32 blknr, u32 blkcnt, void *buffer) { u32 rc; + fsl_sata_t *sata = (fsl_sata_t *)sata_dev_desc[dev].priv; - if (sata_dev_desc[dev].lba48) { + if (sata->lba48) { rc = ata_low_level_rw_lba48(dev, blknr, blkcnt, buffer, WRITE_CMD); if (fsl_sata_get_wcache(dev) && fsl_sata_get_flush_ext(dev)) fsl_sata_flush_cache_ext(dev); @@ -916,11 +918,14 @@ int scan_sata(int dev) n_sectors = ata_id_n_sectors(id); sata_dev_desc[dev].lba = (u32)n_sectors; +#ifdef CONFIG_LBA48 /* Check if support LBA48 */ if (ata_id_has_lba48(id)) { - sata_dev_desc[dev].lba48 = 1; + sata->lba48 = 1; debug("Device support LBA48\n\r"); - } + } else + debug("Device supports LBA28\n\r"); +#endif /* Get the NCQ queue depth from device */ sata->queue_depth = ata_id_queue_depth(id); diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c index d41579c..e8506dd 100644 --- a/drivers/mtd/nand/davinci_nand.c +++ b/drivers/mtd/nand/davinci_nand.c @@ -176,35 +176,35 @@ static void nand_davinci_hwcontrol(struct mtd_info *mtd, int cmd, #ifdef CONFIG_SYS_NAND_HW_ECC -static void nand_davinci_enable_hwecc(struct mtd_info *mtd, int mode) +static u_int32_t nand_davinci_readecc(struct mtd_info *mtd) { - u_int32_t val; + u_int32_t ecc = 0; - (void)__raw_readl(&(davinci_emif_regs->nandfecc[ + ecc = __raw_readl(&(davinci_emif_regs->nandfecc[ CONFIG_SYS_NAND_CS - 2])); - val = __raw_readl(&davinci_emif_regs->nandfcr); - val |= DAVINCI_NANDFCR_NAND_ENABLE(CONFIG_SYS_NAND_CS); - val |= DAVINCI_NANDFCR_1BIT_ECC_START(CONFIG_SYS_NAND_CS); - __raw_writel(val, &davinci_emif_regs->nandfcr); + return ecc; } -static u_int32_t nand_davinci_readecc(struct mtd_info *mtd, u_int32_t region) +static void nand_davinci_enable_hwecc(struct mtd_info *mtd, int mode) { - u_int32_t ecc = 0; + u_int32_t val; - ecc = __raw_readl(&(davinci_emif_regs->nandfecc[region - 1])); + /* reading the ECC result register resets the ECC calculation */ + nand_davinci_readecc(mtd); - return ecc; + val = __raw_readl(&davinci_emif_regs->nandfcr); + val |= DAVINCI_NANDFCR_NAND_ENABLE(CONFIG_SYS_NAND_CS); + val |= DAVINCI_NANDFCR_1BIT_ECC_START(CONFIG_SYS_NAND_CS); + __raw_writel(val, &davinci_emif_regs->nandfcr); } static int nand_davinci_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code) { u_int32_t tmp; - const int region = 1; - tmp = nand_davinci_readecc(mtd, region); + tmp = nand_davinci_readecc(mtd); /* Squeeze 4 bytes ECC into 3 bytes by removing RESERVED bits * and shifting. RESERVED bits are 31 to 28 and 15 to 12. */ diff --git a/drivers/net/fm/dtsec.c b/drivers/net/fm/dtsec.c index a77ee20..7dd78f2 100644 --- a/drivers/net/fm/dtsec.c +++ b/drivers/net/fm/dtsec.c @@ -171,7 +171,7 @@ void init_dtsec(struct fsl_enet_mac *mac, void *base, void *phyregs, int max_rx_len) { mac->base = base; - mac->phyregs = NULL; + mac->phyregs = phyregs; mac->max_rx_len = max_rx_len; mac->init_mac = dtsec_init_mac; mac->enable_mac = dtsec_enable_mac; diff --git a/drivers/net/fm/eth.c b/drivers/net/fm/eth.c index 308d610..f7ed850 100644 --- a/drivers/net/fm/eth.c +++ b/drivers/net/fm/eth.c @@ -537,6 +537,7 @@ static int fm_eth_init_mac(struct fm_eth *fm_eth, struct ccsr_fman *reg) /* Get the mac registers base address */ if (fm_eth->type == FM_ETH_1G_E) { base = ®->mac_1g[num].fm_dtesc; + phyregs = ®->mac_1g[num].fm_mdio.miimcfg; } else { base = ®->mac_10g[num].fm_10gec; phyregs = ®->mac_10g[num].fm_10gec_mdio; @@ -552,7 +553,7 @@ static int fm_eth_init_mac(struct fm_eth *fm_eth, struct ccsr_fman *reg) fm_eth->mac = mac; if (fm_eth->type == FM_ETH_1G_E) - init_dtsec(mac, base, NULL, MAX_RXBUF_LEN); + init_dtsec(mac, base, phyregs, MAX_RXBUF_LEN); else init_tgec(mac, base, phyregs, MAX_RXBUF_LEN); diff --git a/drivers/net/phy/teranetics.c b/drivers/net/phy/teranetics.c index a771791..a13b48c 100644 --- a/drivers/net/phy/teranetics.c +++ b/drivers/net/phy/teranetics.c @@ -41,6 +41,25 @@ int tn2020_config(struct phy_device *phydev) return 0; } +int tn2020_startup(struct phy_device *phydev) +{ + if (phydev->port != PORT_FIBRE) + return gen10g_startup(phydev); + + /* + * The TN2020 only pretends to support fiber. + * It works, but it doesn't look like it works, + * so the link status reports no link. + */ + phydev->link = 1; + + /* For now just lie and say it's 10G all the time */ + phydev->speed = SPEED_10000; + phydev->duplex = DUPLEX_FULL; + + return 0; +} + struct phy_driver tn2020_driver = { .name = "Teranetics TN2020", .uid = 0x00a19410, @@ -50,7 +69,7 @@ struct phy_driver tn2020_driver = { MDIO_DEVS_PHYXS | MDIO_DEVS_AN | MDIO_DEVS_VEND1 | MDIO_DEVS_VEND2), .config = &tn2020_config, - .startup = &gen10g_startup, + .startup = &tn2020_startup, .shutdown = &gen10g_shutdown, }; |