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-rw-r--r--drivers/mmc/Makefile1
-rw-r--r--drivers/mmc/pci_mmc.c42
-rw-r--r--drivers/pci/pci.c43
-rw-r--r--drivers/pci/pci_rom.c32
-rw-r--r--drivers/spi/ich.c59
-rw-r--r--drivers/spi/ich.h11
-rw-r--r--drivers/usb/host/Makefile1
-rw-r--r--drivers/usb/host/ehci-pci.c53
-rw-r--r--drivers/usb/host/xhci-pci.c60
-rw-r--r--drivers/video/vesa_fb.c9
10 files changed, 228 insertions, 83 deletions
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index 4ba5878..ed73687 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -24,6 +24,7 @@ obj-$(CONFIG_MVEBU_MMC) += mvebu_mmc.o
obj-$(CONFIG_MXC_MMC) += mxcmmc.o
obj-$(CONFIG_MXS_MMC) += mxsmmc.o
obj-$(CONFIG_OMAP_HSMMC) += omap_hsmmc.o
+obj-$(CONFIG_X86) += pci_mmc.o
obj-$(CONFIG_PXA_MMC_GENERIC) += pxa_mmc_gen.o
obj-$(CONFIG_SUPPORT_EMMC_RPMB) += rpmb.o
obj-$(CONFIG_S3C_SDI) += s3c_sdi.o
diff --git a/drivers/mmc/pci_mmc.c b/drivers/mmc/pci_mmc.c
new file mode 100644
index 0000000..37171bf
--- /dev/null
+++ b/drivers/mmc/pci_mmc.c
@@ -0,0 +1,42 @@
+/*
+ * Copyright (C) 2015, Google, Inc
+ * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <errno.h>
+#include <malloc.h>
+#include <sdhci.h>
+#include <asm/pci.h>
+
+int pci_mmc_init(const char *name, struct pci_device_id *mmc_supported,
+ int num_ids)
+{
+ struct sdhci_host *mmc_host;
+ pci_dev_t devbusfn;
+ u32 iobase;
+ int ret;
+ int i;
+
+ for (i = 0; i < num_ids; i++) {
+ devbusfn = pci_find_devices(mmc_supported, i);
+ if (devbusfn == -1)
+ return -ENODEV;
+
+ mmc_host = malloc(sizeof(struct sdhci_host));
+ if (!mmc_host)
+ return -ENOMEM;
+
+ mmc_host->name = (char *)name;
+ pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_0, &iobase);
+ mmc_host->ioaddr = (void *)iobase;
+ mmc_host->quirks = 0;
+ ret = add_sdhci(mmc_host, 0, 0);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 950a247..e1296ca 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -15,6 +15,7 @@
#include <common.h>
#include <command.h>
+#include <errno.h>
#include <asm/processor.h>
#include <asm/io.h>
#include <pci.h>
@@ -236,6 +237,48 @@ pci_dev_t pci_find_devices(struct pci_device_id *ids, int index)
return -1;
}
+pci_dev_t pci_find_class(uint find_class, int index)
+{
+ int bus;
+ int devnum;
+ pci_dev_t bdf;
+ uint32_t class;
+
+ for (bus = 0; bus <= pci_last_busno(); bus++) {
+ for (devnum = 0; devnum < PCI_MAX_PCI_DEVICES - 1; devnum++) {
+ pci_read_config_dword(PCI_BDF(bus, devnum, 0),
+ PCI_CLASS_REVISION, &class);
+ if (class >> 16 == 0xffff)
+ continue;
+
+ for (bdf = PCI_BDF(bus, devnum, 0);
+ bdf <= PCI_BDF(bus, devnum,
+ PCI_MAX_PCI_FUNCTIONS - 1);
+ bdf += PCI_BDF(0, 0, 1)) {
+ pci_read_config_dword(bdf, PCI_CLASS_REVISION,
+ &class);
+ class >>= 8;
+
+ if (class != find_class)
+ continue;
+ /*
+ * Decrement the index. We want to return the
+ * correct device, so index is 0 for the first
+ * matching device, 1 for the second, etc.
+ */
+ if (index) {
+ index--;
+ continue;
+ }
+ /* Return index'th controller. */
+ return bdf;
+ }
+ }
+ }
+
+ return -ENODEV;
+}
+
pci_dev_t pci_find_device(unsigned int vendor, unsigned int device, int index)
{
struct pci_device_id ids[2] = { {}, {0, 0} };
diff --git a/drivers/pci/pci_rom.c b/drivers/pci/pci_rom.c
index 5729a15..48c0a77 100644
--- a/drivers/pci/pci_rom.c
+++ b/drivers/pci/pci_rom.c
@@ -228,11 +228,12 @@ int vbe_get_video_info(struct graphic_device *gdev)
#endif
}
-int pci_run_vga_bios(pci_dev_t dev, int (*int15_handler)(void), bool emulate)
+int pci_run_vga_bios(pci_dev_t dev, int (*int15_handler)(void), int exec_method)
{
struct pci_rom_header *rom, *ram;
int vesa_mode = -1;
uint16_t class;
+ bool emulate;
int ret;
/* Only execute VGA ROMs */
@@ -262,6 +263,29 @@ int pci_run_vga_bios(pci_dev_t dev, int (*int15_handler)(void), bool emulate)
vesa_mode = CONFIG_FRAMEBUFFER_VESA_MODE;
#endif
debug("Selected vesa mode %#x\n", vesa_mode);
+
+ if (exec_method & PCI_ROM_USE_NATIVE) {
+#ifdef CONFIG_X86
+ emulate = false;
+#else
+ if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
+ printf("BIOS native execution is only available on x86\n");
+ return -ENOSYS;
+ }
+ emulate = true;
+#endif
+ } else {
+#ifdef CONFIG_BIOSEMU
+ emulate = true;
+#else
+ if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
+ printf("BIOS emulation not available - see CONFIG_BIOSEMU\n");
+ return -ENOSYS;
+ }
+ emulate = false;
+#endif
+ }
+
if (emulate) {
#ifdef CONFIG_BIOSEMU
BE_VGAInfo *info;
@@ -274,9 +298,6 @@ int pci_run_vga_bios(pci_dev_t dev, int (*int15_handler)(void), bool emulate)
vesa_mode, &mode_info);
if (ret)
return ret;
-#else
- printf("BIOS emulation not available - see CONFIG_BIOSEMU\n");
- return -ENOSYS;
#endif
} else {
#ifdef CONFIG_X86
@@ -284,9 +305,6 @@ int pci_run_vga_bios(pci_dev_t dev, int (*int15_handler)(void), bool emulate)
bios_run_on_x86(dev, (unsigned long)ram, vesa_mode,
&mode_info);
-#else
- printf("BIOS native execution is only available on x86\n");
- return -ENOSYS;
#endif
}
debug("Final vesa mode %#x\n", mode_info.video_mode);
diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c
index fdff158..194e882 100644
--- a/drivers/spi/ich.c
+++ b/drivers/spi/ich.c
@@ -7,6 +7,7 @@
*/
#include <common.h>
+#include <errno.h>
#include <malloc.h>
#include <spi.h>
#include <pci.h>
@@ -21,6 +22,7 @@
struct ich_ctlr {
pci_dev_t dev; /* PCI device number */
int ich_version; /* Controller version, 7 or 9 */
+ bool use_sbase; /* Use SBASE instead of RCB */
int ichspi_lock;
int locked;
uint8_t *opmenu;
@@ -145,7 +147,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
* ICH 7 SPI controller only supports array read command
* and byte program command for SST flash
*/
- if (ctlr.ich_version == 7) {
+ if (ctlr.ich_version == 7 || ctlr.use_sbase) {
ich->slave.op_mode_rx = SPI_OPM_RX_AS;
ich->slave.op_mode_tx = SPI_OPM_TX_BP;
}
@@ -175,13 +177,15 @@ void spi_free_slave(struct spi_slave *slave)
static int get_ich_version(uint16_t device_id)
{
if (device_id == PCI_DEVICE_ID_INTEL_TGP_LPC ||
- device_id == PCI_DEVICE_ID_INTEL_ITC_LPC)
+ device_id == PCI_DEVICE_ID_INTEL_ITC_LPC ||
+ device_id == PCI_DEVICE_ID_INTEL_QRK_ILB)
return 7;
if ((device_id >= PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MIN &&
device_id <= PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MAX) ||
(device_id >= PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MIN &&
- device_id <= PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MAX))
+ device_id <= PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MAX) ||
+ device_id == PCI_DEVICE_ID_INTEL_VALLEYVIEW_LPC)
return 9;
return 0;
@@ -204,14 +208,14 @@ static int ich9_can_do_33mhz(pci_dev_t dev)
return speed == 1;
}
-static int ich_find_spi_controller(pci_dev_t *devp, int *ich_versionp)
+static int ich_find_spi_controller(struct ich_ctlr *ich)
{
int last_bus = pci_last_busno();
int bus;
if (last_bus == -1) {
debug("No PCI busses?\n");
- return -1;
+ return -ENODEV;
}
for (bus = 0; bus <= last_bus; bus++) {
@@ -225,24 +229,33 @@ static int ich_find_spi_controller(pci_dev_t *devp, int *ich_versionp)
device_id = ids >> 16;
if (vendor_id == PCI_VENDOR_ID_INTEL) {
- *devp = dev;
- *ich_versionp = get_ich_version(device_id);
- return 0;
+ ich->dev = dev;
+ ich->ich_version = get_ich_version(device_id);
+ if (device_id == PCI_DEVICE_ID_INTEL_VALLEYVIEW_LPC)
+ ich->use_sbase = true;
+ return ich->ich_version == 0 ? -ENODEV : 0;
}
}
debug("ICH SPI: No ICH found.\n");
- return -1;
+ return -ENODEV;
}
static int ich_init_controller(struct ich_ctlr *ctlr)
{
uint8_t *rcrb; /* Root Complex Register Block */
uint32_t rcba; /* Root Complex Base Address */
+ uint32_t sbase_addr;
+ uint8_t *sbase;
pci_read_config_dword(ctlr->dev, 0xf0, &rcba);
/* Bits 31-14 are the base address, 13-1 are reserved, 0 is enable. */
rcrb = (uint8_t *)(rcba & 0xffffc000);
+
+ /* SBASE is similar */
+ pci_read_config_dword(ctlr->dev, 0x54, &sbase_addr);
+ sbase = (uint8_t *)(sbase_addr & 0xfffffe00);
+
if (ctlr->ich_version == 7) {
struct ich7_spi_regs *ich7_spi;
@@ -262,7 +275,10 @@ static int ich_init_controller(struct ich_ctlr *ctlr)
} else if (ctlr->ich_version == 9) {
struct ich9_spi_regs *ich9_spi;
- ich9_spi = (struct ich9_spi_regs *)(rcrb + 0x3800);
+ if (ctlr->use_sbase)
+ ich9_spi = (struct ich9_spi_regs *)sbase;
+ else
+ ich9_spi = (struct ich9_spi_regs *)(rcrb + 0x3800);
ctlr->ichspi_lock = ich_readw(&ich9_spi->hsfs) & HSFS_FLOCKDN;
ctlr->opmenu = ich9_spi->opmenu;
ctlr->menubytes = sizeof(ich9_spi->opmenu);
@@ -282,12 +298,13 @@ static int ich_init_controller(struct ich_ctlr *ctlr)
ctlr->ich_version);
return -1;
}
- debug("ICH SPI: Version %d detected\n", ctlr->ich_version);
/* Work out the maximum speed we can support */
ctlr->max_speed = 20000000;
if (ctlr->ich_version == 9 && ich9_can_do_33mhz(ctlr->dev))
ctlr->max_speed = 33000000;
+ debug("ICH SPI: Version %d detected at %p, speed %ld\n",
+ ctlr->ich_version, ctlr->base, ctlr->max_speed);
ich_set_bbar(ctlr, 0);
@@ -298,7 +315,7 @@ void spi_init(void)
{
uint8_t bios_cntl;
- if (ich_find_spi_controller(&ctlr.dev, &ctlr.ich_version)) {
+ if (ich_find_spi_controller(&ctlr)) {
printf("ICH SPI: Cannot find device\n");
return;
}
@@ -312,10 +329,20 @@ void spi_init(void)
* Disable the BIOS write protect so write commands are allowed. On
* v9, deassert SMM BIOS Write Protect Disable.
*/
- pci_read_config_byte(ctlr.dev, 0xdc, &bios_cntl);
- if (ctlr.ich_version == 9)
- bios_cntl &= ~(1 << 5);
- pci_write_config_byte(ctlr.dev, 0xdc, bios_cntl | 0x1);
+ if (ctlr.use_sbase) {
+ struct ich9_spi_regs *ich9_spi;
+
+ ich9_spi = (struct ich9_spi_regs *)ctlr.base;
+ bios_cntl = ich_readb(&ich9_spi->bcr);
+ bios_cntl &= ~(1 << 5); /* clear Enable InSMM_STS (EISS) */
+ bios_cntl |= 1; /* Write Protect Disable (WPD) */
+ ich_writeb(bios_cntl, &ich9_spi->bcr);
+ } else {
+ pci_read_config_byte(ctlr.dev, 0xdc, &bios_cntl);
+ if (ctlr.ich_version == 9)
+ bios_cntl &= ~(1 << 5);
+ pci_write_config_byte(ctlr.dev, 0xdc, bios_cntl | 0x1);
+ }
}
int spi_claim_bus(struct spi_slave *slave)
diff --git a/drivers/spi/ich.h b/drivers/spi/ich.h
index d2e4b85..1419b23 100644
--- a/drivers/spi/ich.h
+++ b/drivers/spi/ich.h
@@ -37,18 +37,19 @@ struct ich9_spi_regs {
uint8_t opmenu[8]; /* 0x98 */
uint32_t bbar;
uint8_t _reserved3[12];
- uint32_t fdoc;
+ uint32_t fdoc; /* 0xb0 */
uint32_t fdod;
uint8_t _reserved4[8];
- uint32_t afc;
+ uint32_t afc; /* 0xc0 */
uint32_t lvscc;
uint32_t uvscc;
uint8_t _reserved5[4];
- uint32_t fpb;
+ uint32_t fpb; /* 0xd0 */
uint8_t _reserved6[28];
- uint32_t srdl;
+ uint32_t srdl; /* 0xf0 */
uint32_t srdc;
- uint32_t srd;
+ uint32_t scs;
+ uint32_t bcr;
} __packed;
enum {
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index c11b551..66d6e9a 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -47,6 +47,7 @@ obj-$(CONFIG_USB_XHCI) += xhci.o xhci-mem.o xhci-ring.o
obj-$(CONFIG_USB_XHCI_KEYSTONE) += xhci-keystone.o
obj-$(CONFIG_USB_XHCI_EXYNOS) += xhci-exynos5.o
obj-$(CONFIG_USB_XHCI_OMAP) += xhci-omap.o
+obj-$(CONFIG_USB_XHCI_PCI) += xhci-pci.o
# designware
obj-$(CONFIG_USB_DWC2) += dwc2.o
diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c
index 991b199..b9eabc5 100644
--- a/drivers/usb/host/ehci-pci.c
+++ b/drivers/usb/host/ehci-pci.c
@@ -34,57 +34,6 @@ static struct pci_device_id ehci_pci_ids[] = {
{0, 0}
};
#else
-static pci_dev_t ehci_find_class(int index)
-{
- int bus;
- int devnum;
- pci_dev_t bdf;
- uint32_t class;
-
- for (bus = 0; bus <= pci_last_busno(); bus++) {
- for (devnum = 0; devnum < PCI_MAX_PCI_DEVICES-1; devnum++) {
- pci_read_config_dword(PCI_BDF(bus, devnum, 0),
- PCI_CLASS_REVISION, &class);
- if (class >> 16 == 0xffff)
- continue;
-
- for (bdf = PCI_BDF(bus, devnum, 0);
- bdf <= PCI_BDF(bus, devnum,
- PCI_MAX_PCI_FUNCTIONS - 1);
- bdf += PCI_BDF(0, 0, 1)) {
- pci_read_config_dword(bdf, PCI_CLASS_REVISION,
- &class);
- class >>= 8;
- /*
- * Here be dragons! In case we have multiple
- * PCI EHCI controllers, this function will
- * be called multiple times as well. This
- * function will scan the PCI busses, always
- * starting from bus 0, device 0, function 0,
- * until it finds an USB controller. The USB
- * stack gives us an 'index' of a controller
- * that is currently being registered, which
- * is a number, starting from 0 and growing
- * in ascending order as controllers are added.
- * To avoid probing the same controller in tne
- * subsequent runs of this function, we will
- * skip 'index - 1' detected controllers and
- * report the index'th controller.
- */
- if (class != PCI_CLASS_SERIAL_USB_EHCI)
- continue;
- if (index) {
- index--;
- continue;
- }
- /* Return index'th controller. */
- return bdf;
- }
- }
- }
-
- return -ENODEV;
-}
#endif
/*
@@ -102,7 +51,7 @@ int ehci_hcd_init(int index, enum usb_init_type init,
#ifdef CONFIG_PCI_EHCI_DEVICE
pdev = pci_find_devices(ehci_pci_ids, CONFIG_PCI_EHCI_DEVICE);
#else
- pdev = ehci_find_class(index);
+ pdev = pci_find_class(PCI_CLASS_SERIAL_USB_EHCI, index);
#endif
if (pdev < 0) {
printf("EHCI host controller not found\n");
diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c
new file mode 100644
index 0000000..361fcce
--- /dev/null
+++ b/drivers/usb/host/xhci-pci.c
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2015, Google, Inc
+ * Written by Simon Glass <sjg@chromium.org>
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#include <common.h>
+#include <errno.h>
+#include <pci.h>
+#include <usb.h>
+
+#include "xhci.h"
+
+/*
+ * Create the appropriate control structures to manage a new XHCI host
+ * controller.
+ */
+int xhci_hcd_init(int index, struct xhci_hccr **ret_hccr,
+ struct xhci_hcor **ret_hcor)
+{
+ struct xhci_hccr *hccr;
+ struct xhci_hcor *hcor;
+ pci_dev_t pdev;
+ uint32_t cmd;
+ int len;
+
+ pdev = pci_find_class(PCI_CLASS_SERIAL_USB_XHCI, index);
+ if (pdev < 0) {
+ printf("XHCI host controller not found\n");
+ return -1;
+ }
+
+ hccr = (struct xhci_hccr *)pci_map_bar(pdev,
+ PCI_BASE_ADDRESS_0, PCI_REGION_MEM);
+ len = HC_LENGTH(xhci_readl(&hccr->cr_capbase));
+ hcor = (struct xhci_hcor *)((uint32_t)hccr + len);
+
+ debug("XHCI-PCI init hccr 0x%x and hcor 0x%x hc_length %d\n",
+ (uint32_t)hccr, (uint32_t)hcor, len);
+
+ *ret_hccr = hccr;
+ *ret_hcor = hcor;
+
+ /* enable busmaster */
+ pci_read_config_dword(pdev, PCI_COMMAND, &cmd);
+ cmd |= PCI_COMMAND_MASTER;
+ pci_write_config_dword(pdev, PCI_COMMAND, cmd);
+
+ return 0;
+}
+
+/*
+ * Destroy the appropriate control structures corresponding * to the XHCI host
+ * controller
+ */
+void xhci_hcd_stop(int index)
+{
+}
diff --git a/drivers/video/vesa_fb.c b/drivers/video/vesa_fb.c
index 3dacafd..47f824a 100644
--- a/drivers/video/vesa_fb.c
+++ b/drivers/video/vesa_fb.c
@@ -23,6 +23,7 @@ struct pci_device_id vesa_video_ids[] = {
{ .vendor = 0x1002, .device = 0x5159 },
{ .vendor = 0x1002, .device = 0x4752 },
{ .vendor = 0x1002, .device = 0x5452 },
+ { .vendor = 0x8086, .device = 0x0f31 },
{},
};
@@ -41,8 +42,10 @@ void *video_hw_init(void)
printf("no card detected\n");
return NULL;
}
- printf("bdf %x\n", dev);
- ret = pci_run_vga_bios(dev, NULL, true);
+ bootstage_start(BOOTSTAGE_ID_ACCUM_LCD, "vesa display");
+ ret = pci_run_vga_bios(dev, NULL, PCI_ROM_USE_NATIVE |
+ PCI_ROM_ALLOW_FALLBACK);
+ bootstage_accum(BOOTSTAGE_ID_ACCUM_LCD);
if (ret) {
printf("failed to run video BIOS: %d\n", ret);
return NULL;
@@ -58,7 +61,7 @@ void *video_hw_init(void)
sprintf(gdev->modeIdent, "%dx%dx%d", gdev->winSizeX, gdev->winSizeY,
bits_per_pixel);
printf("%s\n", gdev->modeIdent);
- debug("Framex buffer at %x\n", gdev->pciBase);
+ debug("Frame buffer at %x\n", gdev->pciBase);
return (void *)gdev;
}
generated by cgit v1.1 at 2024-11-22 17:58:46 +0000