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-rw-r--r--drivers/qe/uec.c56
-rw-r--r--drivers/qe/uec.h3
-rw-r--r--drivers/qe/uec_phy.c36
3 files changed, 49 insertions, 46 deletions
diff --git a/drivers/qe/uec.c b/drivers/qe/uec.c
index cd80f83..1ecb137 100644
--- a/drivers/qe/uec.c
+++ b/drivers/qe/uec.c
@@ -30,6 +30,7 @@
#include "uec.h"
#include "uec_phy.h"
#include "miiphy.h"
+#include <phy.h>
/* Default UTBIPAR SMI address */
#ifndef CONFIG_UTBIPAR_INIT_TBIPA
@@ -321,9 +322,9 @@ static int uec_set_mac_duplex(uec_private_t *uec, int duplex)
}
static int uec_set_mac_if_mode(uec_private_t *uec,
- enum fsl_phy_enet_if if_mode, int speed)
+ phy_interface_t if_mode, int speed)
{
- enum fsl_phy_enet_if enet_if_mode;
+ phy_interface_t enet_if_mode;
uec_info_t *uec_info;
uec_t *uec_regs;
u32 upsmr;
@@ -345,15 +346,15 @@ static int uec_set_mac_if_mode(uec_private_t *uec,
upsmr &= ~(UPSMR_RPM | UPSMR_TBIM | UPSMR_R10M | UPSMR_RMM);
switch (speed) {
- case 10:
+ case SPEED_10:
maccfg2 |= MACCFG2_INTERFACE_MODE_NIBBLE;
switch (enet_if_mode) {
- case MII:
+ case PHY_INTERFACE_MODE_MII:
break;
- case RGMII:
+ case PHY_INTERFACE_MODE_RGMII:
upsmr |= (UPSMR_RPM | UPSMR_R10M);
break;
- case RMII:
+ case PHY_INTERFACE_MODE_RMII:
upsmr |= (UPSMR_R10M | UPSMR_RMM);
break;
default:
@@ -361,15 +362,15 @@ static int uec_set_mac_if_mode(uec_private_t *uec,
break;
}
break;
- case 100:
+ case SPEED_100:
maccfg2 |= MACCFG2_INTERFACE_MODE_NIBBLE;
switch (enet_if_mode) {
- case MII:
+ case PHY_INTERFACE_MODE_MII:
break;
- case RGMII:
+ case PHY_INTERFACE_MODE_RGMII:
upsmr |= UPSMR_RPM;
break;
- case RMII:
+ case PHY_INTERFACE_MODE_RMII:
upsmr |= UPSMR_RMM;
break;
default:
@@ -377,23 +378,24 @@ static int uec_set_mac_if_mode(uec_private_t *uec,
break;
}
break;
- case 1000:
+ case SPEED_1000:
maccfg2 |= MACCFG2_INTERFACE_MODE_BYTE;
switch (enet_if_mode) {
- case GMII:
+ case PHY_INTERFACE_MODE_GMII:
break;
- case TBI:
+ case PHY_INTERFACE_MODE_TBI:
upsmr |= UPSMR_TBIM;
break;
- case RTBI:
+ case PHY_INTERFACE_MODE_RTBI:
upsmr |= (UPSMR_RPM | UPSMR_TBIM);
break;
- case RGMII_RXID:
- case RGMII_ID:
- case RGMII:
+ case PHY_INTERFACE_MODE_RGMII_RXID:
+ case PHY_INTERFACE_MODE_RGMII_TXID:
+ case PHY_INTERFACE_MODE_RGMII_ID:
+ case PHY_INTERFACE_MODE_RGMII:
upsmr |= UPSMR_RPM;
break;
- case SGMII:
+ case PHY_INTERFACE_MODE_SGMII:
upsmr |= UPSMR_SGMM;
break;
default:
@@ -518,7 +520,7 @@ static void adjust_link(struct eth_device *dev)
struct uec_mii_info *mii_info = uec->mii_info;
extern void change_phy_interface_mode(struct eth_device *dev,
- enum fsl_phy_enet_if mode, int speed);
+ phy_interface_t mode, int speed);
uec_regs = uec->uec_regs;
if (mii_info->link) {
@@ -536,19 +538,19 @@ static void adjust_link(struct eth_device *dev)
}
if (mii_info->speed != uec->oldspeed) {
- enum fsl_phy_enet_if mode = \
+ phy_interface_t mode =
uec->uec_info->enet_interface_type;
if (uec->uec_info->uf_info.eth_type == GIGA_ETH) {
switch (mii_info->speed) {
- case 1000:
+ case SPEED_1000:
break;
- case 100:
+ case SPEED_100:
printf ("switching to rgmii 100\n");
- mode = RGMII;
+ mode = PHY_INTERFACE_MODE_RGMII;
break;
- case 10:
+ case SPEED_10:
printf ("switching to rgmii 10\n");
- mode = RGMII;
+ mode = PHY_INTERFACE_MODE_RGMII;
break;
default:
printf("%s: Ack,Speed(%d)is illegal\n",
@@ -1112,8 +1114,8 @@ static int uec_startup(uec_private_t *uec)
out_be32(&uec_regs->utbipar, utbipar);
/* Configure the TBI for SGMII operation */
- if ((uec->uec_info->enet_interface_type == SGMII) &&
- (uec->uec_info->speed == 1000)) {
+ if ((uec->uec_info->enet_interface_type == PHY_INTERFACE_MODE_SGMII) &&
+ (uec->uec_info->speed == SPEED_1000)) {
uec_write_phy_reg(uec->dev, uec_regs->utbipar,
ENET_TBI_MII_ANA, TBIANA_SETTINGS);
diff --git a/drivers/qe/uec.h b/drivers/qe/uec.h
index 94eb9a2..e63bf3a 100644
--- a/drivers/qe/uec.h
+++ b/drivers/qe/uec.h
@@ -25,6 +25,7 @@
#include "qe.h"
#include "uccf.h"
+#include <phy.h>
#include <asm/fsl_enet.h>
#define MAX_TX_THREADS 8
@@ -691,7 +692,7 @@ typedef struct uec_info {
u16 rx_bd_ring_len;
u16 tx_bd_ring_len;
u8 phy_address;
- enum fsl_phy_enet_if enet_interface_type;
+ phy_interface_t enet_interface_type;
int speed;
} uec_info_t;
diff --git a/drivers/qe/uec_phy.c b/drivers/qe/uec_phy.c
index c83ca4b..e26218b 100644
--- a/drivers/qe/uec_phy.c
+++ b/drivers/qe/uec_phy.c
@@ -25,6 +25,7 @@
#include "uec.h"
#include "uec_phy.h"
#include "miiphy.h"
+#include <phy.h>
#define ugphy_printk(format, arg...) \
printf(format "\n", ## arg)
@@ -456,8 +457,9 @@ static int bcm_init(struct uec_mii_info *mii_info)
gbit_config_aneg(mii_info);
- if ((uec->uec_info->enet_interface_type == RGMII_RXID) &&
- (uec->uec_info->speed == 1000)) {
+ if ((uec->uec_info->enet_interface_type ==
+ PHY_INTERFACE_MODE_RGMII_RXID) &&
+ (uec->uec_info->speed == SPEED_1000)) {
u16 val;
int cnt = 50;
@@ -485,22 +487,22 @@ static int uec_marvell_init(struct uec_mii_info *mii_info)
{
struct eth_device *edev = mii_info->dev;
uec_private_t *uec = edev->priv;
- enum fsl_phy_enet_if iface = uec->uec_info->enet_interface_type;
+ phy_interface_t iface = uec->uec_info->enet_interface_type;
int speed = uec->uec_info->speed;
- if ((speed == 1000) &&
- (iface == RGMII_ID ||
- iface == RGMII_RXID ||
- iface == RGMII_TXID)) {
+ if ((speed == SPEED_1000) &&
+ (iface == PHY_INTERFACE_MODE_RGMII_ID ||
+ iface == PHY_INTERFACE_MODE_RGMII_RXID ||
+ iface == PHY_INTERFACE_MODE_RGMII_TXID)) {
int temp;
temp = uec_phy_read(mii_info, MII_M1111_PHY_EXT_CR);
- if (iface == RGMII_ID) {
+ if (iface == PHY_INTERFACE_MODE_RGMII_ID) {
temp |= MII_M1111_RX_DELAY | MII_M1111_TX_DELAY;
- } else if (iface == RGMII_RXID) {
+ } else if (iface == PHY_INTERFACE_MODE_RGMII_RXID) {
temp &= ~MII_M1111_TX_DELAY;
temp |= MII_M1111_RX_DELAY;
- } else if (iface == RGMII_TXID) {
+ } else if (iface == PHY_INTERFACE_MODE_RGMII_TXID) {
temp &= ~MII_M1111_RX_DELAY;
temp |= MII_M1111_TX_DELAY;
}
@@ -853,10 +855,8 @@ struct phy_info *uec_get_phy_info (struct uec_mii_info *mii_info)
return theInfo;
}
-void marvell_phy_interface_mode (struct eth_device *dev,
- enum fsl_phy_enet_if type,
- int speed
- )
+void marvell_phy_interface_mode(struct eth_device *dev, phy_interface_t type,
+ int speed)
{
uec_private_t *uec = (uec_private_t *) dev->priv;
struct uec_mii_info *mii_info;
@@ -868,8 +868,8 @@ void marvell_phy_interface_mode (struct eth_device *dev,
}
mii_info = uec->mii_info;
- if (type == RGMII) {
- if (speed == 100) {
+ if (type == PHY_INTERFACE_MODE_RGMII) {
+ if (speed == SPEED_100) {
uec_phy_write(mii_info, 0x00, 0x9140);
uec_phy_write(mii_info, 0x1d, 0x001f);
uec_phy_write(mii_info, 0x1e, 0x200c);
@@ -890,7 +890,7 @@ void marvell_phy_interface_mode (struct eth_device *dev,
uec_phy_write(mii_info, 0x00, 0xa100);
uec_phy_write(mii_info, 0x00, 0x2100);
udelay (1000000);
- } else if (speed == 10) {
+ } else if (speed == SPEED_10) {
uec_phy_write(mii_info, 0x14, 0x8e40);
uec_phy_write(mii_info, 0x1b, 0x800b);
uec_phy_write(mii_info, 0x14, 0x0c82);
@@ -908,7 +908,7 @@ void marvell_phy_interface_mode (struct eth_device *dev,
}
void change_phy_interface_mode (struct eth_device *dev,
- enum fsl_phy_enet_if type, int speed)
+ phy_interface_t type, int speed)
{
#ifdef CONFIG_PHY_MODE_NEED_CHANGE
marvell_phy_interface_mode (dev, type, speed);
generated by cgit v1.1 at 2024-07-07 15:30:24 +0000