diff options
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/i2c/i2c_core.c | 8 | ||||
| -rw-r--r-- | drivers/power/twl4030.c | 6 | ||||
| -rw-r--r-- | drivers/serial/serial.c | 140 | ||||
| -rw-r--r-- | drivers/serial/serial_uniphier.c | 17 | ||||
| -rw-r--r-- | drivers/spi/altera_spi.c | 132 | ||||
| -rw-r--r-- | drivers/spi/mxc_spi.c | 40 | ||||
| -rw-r--r-- | drivers/usb/host/ehci-hcd.c | 56 | ||||
| -rw-r--r-- | drivers/usb/host/ehci-rmobile.c | 8 |
8 files changed, 221 insertions, 186 deletions
diff --git a/drivers/i2c/i2c_core.c b/drivers/i2c/i2c_core.c index 18d6736..d34b749 100644 --- a/drivers/i2c/i2c_core.c +++ b/drivers/i2c/i2c_core.c @@ -229,11 +229,9 @@ static void i2c_init_bus(unsigned int bus_no, int speed, int slaveaddr) } /* implement possible board specific board init */ -static void __def_i2c_init_board(void) +__weak void i2c_init_board(void) { } -void i2c_init_board(void) - __attribute__((weak, alias("__def_i2c_init_board"))); /* * i2c_init_all(): @@ -395,9 +393,7 @@ void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val) i2c_write(addr, reg, 1, &val, 1); } -void __i2c_init(int speed, int slaveaddr) +__weak void i2c_init(int speed, int slaveaddr) { i2c_init_bus(i2c_get_bus_num(), speed, slaveaddr); } -void i2c_init(int speed, int slaveaddr) - __attribute__((weak, alias("__i2c_init"))); diff --git a/drivers/power/twl4030.c b/drivers/power/twl4030.c index 3e50310..e578ae6 100644 --- a/drivers/power/twl4030.c +++ b/drivers/power/twl4030.c @@ -98,4 +98,10 @@ void twl4030_power_mmc_init(void) TWL4030_PM_RECEIVER_VMMC1_VSEL_32, TWL4030_PM_RECEIVER_VMMC1_DEV_GRP, TWL4030_PM_RECEIVER_DEV_GRP_P1); + + /* Set VMMC2 to 3.15 Volts */ + twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VMMC2_DEDICATED, + TWL4030_PM_RECEIVER_VMMC2_VSEL_32, + TWL4030_PM_RECEIVER_VMMC2_DEV_GRP, + TWL4030_PM_RECEIVER_DEV_GRP_P1); } diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c index 18e41b2..95c992a 100644 --- a/drivers/serial/serial.c +++ b/drivers/serial/serial.c @@ -109,54 +109,54 @@ U_BOOT_ENV_CALLBACK(baudrate, on_baudrate); void name(void) \ __attribute__((weak, alias("serial_null"))); -serial_initfunc(mpc8xx_serial_initialize); -serial_initfunc(ns16550_serial_initialize); -serial_initfunc(pxa_serial_initialize); -serial_initfunc(s3c24xx_serial_initialize); -serial_initfunc(s5p_serial_initialize); -serial_initfunc(zynq_serial_initialize); -serial_initfunc(bfin_serial_initialize); -serial_initfunc(bfin_jtag_initialize); -serial_initfunc(mpc512x_serial_initialize); -serial_initfunc(uartlite_serial_initialize); -serial_initfunc(au1x00_serial_initialize); -serial_initfunc(asc_serial_initialize); -serial_initfunc(jz_serial_initialize); -serial_initfunc(mpc5xx_serial_initialize); -serial_initfunc(mpc8260_scc_serial_initialize); -serial_initfunc(mpc8260_smc_serial_initialize); -serial_initfunc(mpc85xx_serial_initialize); -serial_initfunc(iop480_serial_initialize); -serial_initfunc(leon2_serial_initialize); -serial_initfunc(leon3_serial_initialize); -serial_initfunc(marvell_serial_initialize); +serial_initfunc(altera_jtag_serial_initialize); +serial_initfunc(altera_serial_initialize); serial_initfunc(amirix_serial_initialize); +serial_initfunc(arc_serial_initialize); +serial_initfunc(arm_dcc_initialize); +serial_initfunc(asc_serial_initialize); +serial_initfunc(atmel_serial_initialize); +serial_initfunc(au1x00_serial_initialize); +serial_initfunc(bfin_jtag_initialize); +serial_initfunc(bfin_serial_initialize); serial_initfunc(bmw_serial_initialize); +serial_initfunc(clps7111_serial_initialize); serial_initfunc(cogent_serial_initialize); serial_initfunc(cpci750_serial_initialize); serial_initfunc(evb64260_serial_initialize); -serial_initfunc(ml2_serial_initialize); -serial_initfunc(sconsole_serial_initialize); -serial_initfunc(p3mx_serial_initialize); -serial_initfunc(altera_jtag_serial_initialize); -serial_initfunc(altera_serial_initialize); -serial_initfunc(atmel_serial_initialize); -serial_initfunc(lpc32xx_serial_initialize); -serial_initfunc(mcf_serial_initialize); -serial_initfunc(oc_serial_initialize); -serial_initfunc(sandbox_serial_initialize); -serial_initfunc(clps7111_serial_initialize); serial_initfunc(imx_serial_initialize); +serial_initfunc(iop480_serial_initialize); +serial_initfunc(jz_serial_initialize); serial_initfunc(ks8695_serial_initialize); +serial_initfunc(leon2_serial_initialize); +serial_initfunc(leon3_serial_initialize); serial_initfunc(lh7a40x_serial_initialize); +serial_initfunc(lpc32xx_serial_initialize); +serial_initfunc(marvell_serial_initialize); serial_initfunc(max3100_serial_initialize); +serial_initfunc(mcf_serial_initialize); +serial_initfunc(ml2_serial_initialize); +serial_initfunc(mpc512x_serial_initialize); +serial_initfunc(mpc5xx_serial_initialize); +serial_initfunc(mpc8260_scc_serial_initialize); +serial_initfunc(mpc8260_smc_serial_initialize); +serial_initfunc(mpc85xx_serial_initialize); +serial_initfunc(mpc8xx_serial_initialize); serial_initfunc(mxc_serial_initialize); +serial_initfunc(mxs_auart_initialize); +serial_initfunc(ns16550_serial_initialize); +serial_initfunc(oc_serial_initialize); +serial_initfunc(p3mx_serial_initialize); serial_initfunc(pl01x_serial_initialize); +serial_initfunc(pxa_serial_initialize); +serial_initfunc(s3c24xx_serial_initialize); +serial_initfunc(s5p_serial_initialize); serial_initfunc(sa1100_serial_initialize); +serial_initfunc(sandbox_serial_initialize); +serial_initfunc(sconsole_serial_initialize); serial_initfunc(sh_serial_initialize); -serial_initfunc(arm_dcc_initialize); -serial_initfunc(mxs_auart_initialize); -serial_initfunc(arc_serial_initialize); +serial_initfunc(uartlite_serial_initialize); +serial_initfunc(zynq_serial_initialize); /** * serial_register() - Register serial driver with serial driver core @@ -202,54 +202,54 @@ void serial_register(struct serial_device *dev) */ void serial_initialize(void) { - mpc8xx_serial_initialize(); - ns16550_serial_initialize(); - pxa_serial_initialize(); - s3c24xx_serial_initialize(); - s5p_serial_initialize(); - mpc512x_serial_initialize(); - bfin_serial_initialize(); - bfin_jtag_initialize(); - uartlite_serial_initialize(); - zynq_serial_initialize(); - au1x00_serial_initialize(); - asc_serial_initialize(); - jz_serial_initialize(); - mpc5xx_serial_initialize(); - mpc8260_scc_serial_initialize(); - mpc8260_smc_serial_initialize(); - mpc85xx_serial_initialize(); - iop480_serial_initialize(); - leon2_serial_initialize(); - leon3_serial_initialize(); - marvell_serial_initialize(); + altera_jtag_serial_initialize(); + altera_serial_initialize(); amirix_serial_initialize(); + arc_serial_initialize(); + arm_dcc_initialize(); + asc_serial_initialize(); + atmel_serial_initialize(); + au1x00_serial_initialize(); + bfin_jtag_initialize(); + bfin_serial_initialize(); bmw_serial_initialize(); + clps7111_serial_initialize(); cogent_serial_initialize(); cpci750_serial_initialize(); evb64260_serial_initialize(); - ml2_serial_initialize(); - sconsole_serial_initialize(); - p3mx_serial_initialize(); - altera_jtag_serial_initialize(); - altera_serial_initialize(); - atmel_serial_initialize(); - lpc32xx_serial_initialize(); - mcf_serial_initialize(); - oc_serial_initialize(); - sandbox_serial_initialize(); - clps7111_serial_initialize(); imx_serial_initialize(); + iop480_serial_initialize(); + jz_serial_initialize(); ks8695_serial_initialize(); + leon2_serial_initialize(); + leon3_serial_initialize(); lh7a40x_serial_initialize(); + lpc32xx_serial_initialize(); + marvell_serial_initialize(); max3100_serial_initialize(); + mcf_serial_initialize(); + ml2_serial_initialize(); + mpc512x_serial_initialize(); + mpc5xx_serial_initialize(); + mpc8260_scc_serial_initialize(); + mpc8260_smc_serial_initialize(); + mpc85xx_serial_initialize(); + mpc8xx_serial_initialize(); mxc_serial_initialize(); + mxs_auart_initialize(); + ns16550_serial_initialize(); + oc_serial_initialize(); + p3mx_serial_initialize(); pl01x_serial_initialize(); + pxa_serial_initialize(); + s3c24xx_serial_initialize(); + s5p_serial_initialize(); sa1100_serial_initialize(); + sandbox_serial_initialize(); + sconsole_serial_initialize(); sh_serial_initialize(); - arm_dcc_initialize(); - mxs_auart_initialize(); - arc_serial_initialize(); + uartlite_serial_initialize(); + zynq_serial_initialize(); serial_assign(default_serial_console()->name); } diff --git a/drivers/serial/serial_uniphier.c b/drivers/serial/serial_uniphier.c index 9114b3e..3f3d415 100644 --- a/drivers/serial/serial_uniphier.c +++ b/drivers/serial/serial_uniphier.c @@ -55,7 +55,7 @@ struct uniphier_serial_private_data { #define uniphier_serial_port(dev) \ ((struct uniphier_serial_private_data *)dev_get_priv(dev))->membase -int uniphier_serial_setbrg(struct udevice *dev, int baudrate) +static int uniphier_serial_setbrg(struct udevice *dev, int baudrate) { struct uniphier_serial_platform_data *plat = dev_get_platdata(dev); struct uniphier_serial __iomem *port = uniphier_serial_port(dev); @@ -93,7 +93,17 @@ static int uniphier_serial_putc(struct udevice *dev, const char c) return 0; } -int uniphier_serial_probe(struct udevice *dev) +static int uniphier_serial_pending(struct udevice *dev, bool input) +{ + struct uniphier_serial __iomem *port = uniphier_serial_port(dev); + + if (input) + return readb(&port->lsr) & UART_LSR_DR; + else + return !(readb(&port->lsr) & UART_LSR_THRE); +} + +static int uniphier_serial_probe(struct udevice *dev) { struct uniphier_serial_private_data *priv = dev_get_priv(dev); struct uniphier_serial_platform_data *plat = dev_get_platdata(dev); @@ -106,7 +116,7 @@ int uniphier_serial_probe(struct udevice *dev) return 0; } -int uniphier_serial_remove(struct udevice *dev) +static int uniphier_serial_remove(struct udevice *dev) { unmap_sysmem(uniphier_serial_port(dev)); @@ -134,6 +144,7 @@ static const struct dm_serial_ops uniphier_serial_ops = { .setbrg = uniphier_serial_setbrg, .getc = uniphier_serial_getc, .putc = uniphier_serial_putc, + .pending = uniphier_serial_pending, }; U_BOOT_DRIVER(uniphier_serial) = { diff --git a/drivers/spi/altera_spi.c b/drivers/spi/altera_spi.c index 5accbb5..a4d03d9 100644 --- a/drivers/spi/altera_spi.c +++ b/drivers/spi/altera_spi.c @@ -12,58 +12,62 @@ #include <malloc.h> #include <spi.h> -#define ALTERA_SPI_RXDATA 0 -#define ALTERA_SPI_TXDATA 4 -#define ALTERA_SPI_STATUS 8 -#define ALTERA_SPI_CONTROL 12 -#define ALTERA_SPI_SLAVE_SEL 20 - -#define ALTERA_SPI_STATUS_ROE_MSK (0x8) -#define ALTERA_SPI_STATUS_TOE_MSK (0x10) -#define ALTERA_SPI_STATUS_TMT_MSK (0x20) -#define ALTERA_SPI_STATUS_TRDY_MSK (0x40) -#define ALTERA_SPI_STATUS_RRDY_MSK (0x80) -#define ALTERA_SPI_STATUS_E_MSK (0x100) - -#define ALTERA_SPI_CONTROL_IROE_MSK (0x8) -#define ALTERA_SPI_CONTROL_ITOE_MSK (0x10) -#define ALTERA_SPI_CONTROL_ITRDY_MSK (0x40) -#define ALTERA_SPI_CONTROL_IRRDY_MSK (0x80) -#define ALTERA_SPI_CONTROL_IE_MSK (0x100) -#define ALTERA_SPI_CONTROL_SSO_MSK (0x400) +#ifndef CONFIG_ALTERA_SPI_IDLE_VAL +#define CONFIG_ALTERA_SPI_IDLE_VAL 0xff +#endif #ifndef CONFIG_SYS_ALTERA_SPI_LIST #define CONFIG_SYS_ALTERA_SPI_LIST { CONFIG_SYS_SPI_BASE } #endif +struct altera_spi_regs { + u32 rxdata; + u32 txdata; + u32 status; + u32 control; + u32 _reserved; + u32 slave_sel; +}; + +#define ALTERA_SPI_STATUS_ROE_MSK (1 << 3) +#define ALTERA_SPI_STATUS_TOE_MSK (1 << 4) +#define ALTERA_SPI_STATUS_TMT_MSK (1 << 5) +#define ALTERA_SPI_STATUS_TRDY_MSK (1 << 6) +#define ALTERA_SPI_STATUS_RRDY_MSK (1 << 7) +#define ALTERA_SPI_STATUS_E_MSK (1 << 8) + +#define ALTERA_SPI_CONTROL_IROE_MSK (1 << 3) +#define ALTERA_SPI_CONTROL_ITOE_MSK (1 << 4) +#define ALTERA_SPI_CONTROL_ITRDY_MSK (1 << 6) +#define ALTERA_SPI_CONTROL_IRRDY_MSK (1 << 7) +#define ALTERA_SPI_CONTROL_IE_MSK (1 << 8) +#define ALTERA_SPI_CONTROL_SSO_MSK (1 << 10) + static ulong altera_spi_base_list[] = CONFIG_SYS_ALTERA_SPI_LIST; struct altera_spi_slave { - struct spi_slave slave; - ulong base; + struct spi_slave slave; + struct altera_spi_regs *regs; }; #define to_altera_spi_slave(s) container_of(s, struct altera_spi_slave, slave) -__attribute__((weak)) -int spi_cs_is_valid(unsigned int bus, unsigned int cs) +__weak int spi_cs_is_valid(unsigned int bus, unsigned int cs) { return bus < ARRAY_SIZE(altera_spi_base_list) && cs < 32; } -__attribute__((weak)) -void spi_cs_activate(struct spi_slave *slave) +__weak void spi_cs_activate(struct spi_slave *slave) { struct altera_spi_slave *altspi = to_altera_spi_slave(slave); - writel(1 << slave->cs, altspi->base + ALTERA_SPI_SLAVE_SEL); - writel(ALTERA_SPI_CONTROL_SSO_MSK, altspi->base + ALTERA_SPI_CONTROL); + writel(1 << slave->cs, &altspi->regs->slave_sel); + writel(ALTERA_SPI_CONTROL_SSO_MSK, &altspi->regs->control); } -__attribute__((weak)) -void spi_cs_deactivate(struct spi_slave *slave) +__weak void spi_cs_deactivate(struct spi_slave *slave) { struct altera_spi_slave *altspi = to_altera_spi_slave(slave); - writel(0, altspi->base + ALTERA_SPI_CONTROL); - writel(0, altspi->base + ALTERA_SPI_SLAVE_SEL); + writel(0, &altspi->regs->control); + writel(0, &altspi->regs->slave_sel); } void spi_init(void) @@ -87,9 +91,8 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, if (!altspi) return NULL; - altspi->base = altera_spi_base_list[bus]; - debug("%s: bus:%i cs:%i base:%lx\n", __func__, - bus, cs, altspi->base); + altspi->regs = (struct altera_spi_regs *)altera_spi_base_list[bus]; + debug("%s: bus:%i cs:%i base:%p\n", __func__, bus, cs, altspi->regs); return &altspi->slave; } @@ -105,8 +108,8 @@ int spi_claim_bus(struct spi_slave *slave) struct altera_spi_slave *altspi = to_altera_spi_slave(slave); debug("%s: bus:%i cs:%i\n", __func__, slave->bus, slave->cs); - writel(0, altspi->base + ALTERA_SPI_CONTROL); - writel(0, altspi->base + ALTERA_SPI_SLAVE_SEL); + writel(0, &altspi->regs->control); + writel(0, &altspi->regs->slave_sel); return 0; } @@ -115,24 +118,22 @@ void spi_release_bus(struct spi_slave *slave) struct altera_spi_slave *altspi = to_altera_spi_slave(slave); debug("%s: bus:%i cs:%i\n", __func__, slave->bus, slave->cs); - writel(0, altspi->base + ALTERA_SPI_SLAVE_SEL); + writel(0, &altspi->regs->slave_sel); } -#ifndef CONFIG_ALTERA_SPI_IDLE_VAL -# define CONFIG_ALTERA_SPI_IDLE_VAL 0xff -#endif - int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, void *din, unsigned long flags) { struct altera_spi_slave *altspi = to_altera_spi_slave(slave); /* assume spi core configured to do 8 bit transfers */ - uint bytes = bitlen / 8; - const uchar *txp = dout; - uchar *rxp = din; + unsigned int bytes = bitlen / 8; + const unsigned char *txp = dout; + unsigned char *rxp = din; + uint32_t reg, data, start; debug("%s: bus:%i cs:%i bitlen:%i bytes:%i flags:%lx\n", __func__, - slave->bus, slave->cs, bitlen, bytes, flags); + slave->bus, slave->cs, bitlen, bytes, flags); + if (bitlen == 0) goto done; @@ -142,25 +143,40 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, } /* empty read buffer */ - if (readl(altspi->base + ALTERA_SPI_STATUS) & - ALTERA_SPI_STATUS_RRDY_MSK) - readl(altspi->base + ALTERA_SPI_RXDATA); + if (readl(&altspi->regs->status) & ALTERA_SPI_STATUS_RRDY_MSK) + readl(&altspi->regs->rxdata); + if (flags & SPI_XFER_BEGIN) spi_cs_activate(slave); while (bytes--) { - uchar d = txp ? *txp++ : CONFIG_ALTERA_SPI_IDLE_VAL; - debug("%s: tx:%x ", __func__, d); - writel(d, altspi->base + ALTERA_SPI_TXDATA); - while (!(readl(altspi->base + ALTERA_SPI_STATUS) & - ALTERA_SPI_STATUS_RRDY_MSK)) - ; - d = readl(altspi->base + ALTERA_SPI_RXDATA); + if (txp) + data = *txp++; + else + data = CONFIG_ALTERA_SPI_IDLE_VAL; + + debug("%s: tx:%x ", __func__, data); + writel(data, &altspi->regs->txdata); + + start = get_timer(0); + while (1) { + reg = readl(&altspi->regs->status); + if (reg & ALTERA_SPI_STATUS_RRDY_MSK) + break; + if (get_timer(start) > (CONFIG_SYS_HZ / 1000)) { + printf("%s: Transmission timed out!\n", __func__); + goto done; + } + } + + data = readl(&altspi->regs->rxdata); if (rxp) - *rxp++ = d; - debug("rx:%x\n", d); + *rxp++ = data & 0xff; + + debug("rx:%x\n", data); } - done: + +done: if (flags & SPI_XFER_END) spi_cs_deactivate(slave); diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c index be10269..23f2ba6 100644 --- a/drivers/spi/mxc_spi.c +++ b/drivers/spi/mxc_spi.c @@ -49,6 +49,8 @@ struct mxc_spi_slave { #endif int gpio; int ss_pol; + unsigned int max_hz; + unsigned int mode; }; static inline struct mxc_spi_slave *to_mxc_spi_slave(struct spi_slave *slave) @@ -83,12 +85,13 @@ u32 get_cspi_div(u32 div) } #ifdef MXC_CSPI -static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs, - unsigned int max_hz, unsigned int mode) +static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs) { unsigned int ctrl_reg; u32 clk_src; u32 div; + unsigned int max_hz = mxcs->max_hz; + unsigned int mode = mxcs->mode; clk_src = mxc_get_clock(MXC_CSPI_CLK); @@ -120,19 +123,15 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs, #endif #ifdef MXC_ECSPI -static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs, - unsigned int max_hz, unsigned int mode) +static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs) { u32 clk_src = mxc_get_clock(MXC_CSPI_CLK); s32 reg_ctrl, reg_config; u32 ss_pol = 0, sclkpol = 0, sclkpha = 0, sclkctl = 0; u32 pre_div = 0, post_div = 0; struct cspi_regs *regs = (struct cspi_regs *)mxcs->base; - - if (max_hz == 0) { - printf("Error: desired clock is 0\n"); - return -1; - } + unsigned int max_hz = mxcs->max_hz; + unsigned int mode = mxcs->mode; /* * Reset SPI and set all CSs to master mode, if toggling @@ -169,9 +168,6 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs, reg_ctrl = (reg_ctrl & ~MXC_CSPICTRL_POSTDIV(0x0F)) | MXC_CSPICTRL_POSTDIV(post_div); - /* We need to disable SPI before changing registers */ - reg_ctrl &= ~MXC_CSPICTRL_EN; - if (mode & SPI_CS_HIGH) ss_pol = 1; @@ -412,6 +408,11 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, if (bus >= ARRAY_SIZE(spi_bases)) return NULL; + if (max_hz == 0) { + printf("Error: desired clock is 0\n"); + return NULL; + } + mxcs = spi_alloc_slave(struct mxc_spi_slave, bus, cs); if (!mxcs) { puts("mxc_spi: SPI Slave not allocated !\n"); @@ -427,13 +428,9 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, } mxcs->base = spi_bases[bus]; + mxcs->max_hz = max_hz; + mxcs->mode = mode; - ret = spi_cfg_mxc(mxcs, cs, max_hz, mode); - if (ret) { - printf("mxc_spi: cannot setup SPI controller\n"); - free(mxcs); - return NULL; - } return &mxcs->slave; } @@ -446,12 +443,17 @@ void spi_free_slave(struct spi_slave *slave) int spi_claim_bus(struct spi_slave *slave) { + int ret; struct mxc_spi_slave *mxcs = to_mxc_spi_slave(slave); struct cspi_regs *regs = (struct cspi_regs *)mxcs->base; reg_write(®s->rxdata, 1); udelay(1); - reg_write(®s->ctrl, mxcs->ctrl_reg); + ret = spi_cfg_mxc(mxcs, slave->cs); + if (ret) { + printf("mxc_spi: cannot setup SPI controller\n"); + return ret; + } reg_write(®s->period, MXC_CSPIPERIOD_32KHZ); reg_write(®s->intr, 0); diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c index 936d006..c671c72 100644 --- a/drivers/usb/host/ehci-hcd.c +++ b/drivers/usb/host/ehci-hcd.c @@ -1097,6 +1097,7 @@ submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer, } struct int_queue { + int elementsize; struct QH *first; struct QH *current; struct QH *last; @@ -1154,6 +1155,23 @@ create_int_queue(struct usb_device *dev, unsigned long pipe, int queuesize, struct int_queue *result = NULL; int i; + /* + * Interrupt transfers requiring several transactions are not supported + * because bInterval is ignored. + * + * Also, ehci_submit_async() relies on wMaxPacketSize being a power of 2 + * <= PKT_ALIGN if several qTDs are required, while the USB + * specification does not constrain this for interrupt transfers. That + * means that ehci_submit_async() would support interrupt transfers + * requiring several transactions only as long as the transfer size does + * not require more than a single qTD. + */ + if (elementsize > usb_maxpacket(dev, pipe)) { + printf("%s: xfers requiring several transactions are not supported.\n", + __func__); + return NULL; + } + debug("Enter create_int_queue\n"); if (usb_pipetype(pipe) != PIPE_INTERRUPT) { debug("non-interrupt pipe (type=%lu)", usb_pipetype(pipe)); @@ -1174,6 +1192,7 @@ create_int_queue(struct usb_device *dev, unsigned long pipe, int queuesize, debug("ehci intr queue: out of memory\n"); goto fail1; } + result->elementsize = elementsize; result->first = memalign(USB_DMA_MINALIGN, sizeof(struct QH) * queuesize); if (!result->first) { @@ -1249,9 +1268,11 @@ create_int_queue(struct usb_device *dev, unsigned long pipe, int queuesize, ALIGN_END_ADDR(struct qTD, result->tds, queuesize)); - if (disable_periodic(ctrl) < 0) { - debug("FATAL: periodic should never fail, but did"); - goto fail3; + if (ctrl->periodic_schedules > 0) { + if (disable_periodic(ctrl) < 0) { + debug("FATAL: periodic should never fail, but did"); + goto fail3; + } } /* hook up to periodic list */ @@ -1308,13 +1329,18 @@ void *poll_int_queue(struct usb_device *dev, struct int_queue *queue) queue->current++; else queue->current = NULL; + + invalidate_dcache_range((uint32_t)cur->buffer, + ALIGN_END_ADDR(char, cur->buffer, + queue->elementsize)); + debug("Exit poll_int_queue with completed intr transfer. token is %x at %p (first at %p)\n", hc32_to_cpu(cur_td->qt_token), cur, queue->first); return cur->buffer; } /* Do not free buffers associated with QHs, they're owned by someone else */ -static int +int destroy_int_queue(struct usb_device *dev, struct int_queue *queue) { struct ehci_ctrl *ctrl = dev->controller; @@ -1373,24 +1399,9 @@ submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer, debug("dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d", dev, pipe, buffer, length, interval); - /* - * Interrupt transfers requiring several transactions are not supported - * because bInterval is ignored. - * - * Also, ehci_submit_async() relies on wMaxPacketSize being a power of 2 - * <= PKT_ALIGN if several qTDs are required, while the USB - * specification does not constrain this for interrupt transfers. That - * means that ehci_submit_async() would support interrupt transfers - * requiring several transactions only as long as the transfer size does - * not require more than a single qTD. - */ - if (length > usb_maxpacket(dev, pipe)) { - printf("%s: Interrupt transfers requiring several " - "transactions are not supported.\n", __func__); - return -1; - } - queue = create_int_queue(dev, pipe, 1, length, buffer); + if (!queue) + return -1; timeout = get_timer(0) + USB_TIMEOUT_MS(pipe); while ((backbuffer = poll_int_queue(dev, queue)) == NULL) @@ -1406,9 +1417,6 @@ submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer, return -EINVAL; } - invalidate_dcache_range((uint32_t)buffer, - ALIGN_END_ADDR(char, buffer, length)); - ret = destroy_int_queue(dev, queue); if (ret < 0) return ret; diff --git a/drivers/usb/host/ehci-rmobile.c b/drivers/usb/host/ehci-rmobile.c index 0d1a726..b433087 100644 --- a/drivers/usb/host/ehci-rmobile.c +++ b/drivers/usb/host/ehci-rmobile.c @@ -22,12 +22,8 @@ static u32 usb_base_address[CONFIG_USB_MAX_CONTROLLER_COUNT] = { 0xEE0A0000, /* USB1 */ 0xEE0C0000, /* USB2 */ }; -#elif defined(CONFIG_R8A7791) -static u32 usb_base_address[CONFIG_USB_MAX_CONTROLLER_COUNT] = { - 0xEE080000, /* USB0 (EHCI) */ - 0xEE0C0000, /* USB1 */ -}; -#elif defined(CONFIG_R8A7794) +#elif defined(CONFIG_R8A7791) || defined(CONFIG_R8A7793) || \ + defined(CONFIG_R8A7794) static u32 usb_base_address[CONFIG_USB_MAX_CONTROLLER_COUNT] = { 0xEE080000, /* USB0 (EHCI) */ 0xEE0C0000, /* USB1 */ |