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-rw-r--r--drivers/pci/pcie_imx.c9
-rw-r--r--drivers/usb/host/ehci-mx6.c18
2 files changed, 14 insertions, 13 deletions
diff --git a/drivers/pci/pcie_imx.c b/drivers/pci/pcie_imx.c
index 0b5b886..9f3e604 100644
--- a/drivers/pci/pcie_imx.c
+++ b/drivers/pci/pcie_imx.c
@@ -103,6 +103,7 @@ static void print_regs(int contain_pcie_reg)
#else
struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_GPR_BASE_ADDR;
#endif
+ struct mxc_ccm_reg *ccm_regs = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
val = readl(&iomuxc_regs->gpr[1]);
DBGF("GPR01 a:0x%08x v:0x%08x\n", (u32)&iomuxc_regs->gpr[1], val);
val = readl(&iomuxc_regs->gpr[5]);
@@ -111,10 +112,10 @@ static void print_regs(int contain_pcie_reg)
DBGF("GPR08 a:0x%08x v:0x%08x\n", (u32)&iomuxc_regs->gpr[8], val);
val = readl(&iomuxc_regs->gpr[12]);
DBGF("GPR12 a:0x%08x v:0x%08x\n", (u32)&iomuxc_regs->gpr[12], val);
- val = readl(ANATOP_BASE_ADDR + 0xe0);
- DBGF("PLL06 a:0x%08x v:0x%08x\n", ANATOP_BASE_ADDR + 0xe0, val);
- val = readl(ANATOP_BASE_ADDR + 0x160);
- DBGF("MISC1 a:0x%08x v:0x%08x\n", ANATOP_BASE_ADDR + 0x160, val);
+ val = readl(&ccm_regs->analog_pll_enet);
+ DBGF("PLL06 a:0x%08x v:0x%08x\n", (u32)&ccm_regs->analog_pll_enet, val);
+ val = readl(&ccm_regs->ana_misc1);
+ DBGF("MISC1 a:0x%08x v:0x%08x\n", (u32)&ccm_regs->ana_misc1, val);
if (contain_pcie_reg) {
val = readl(MX6_DBI_ADDR + 0x728);
DBGF("dbr0 offset 0x728 %08x\n", val);
diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c
index a316d92..005cf36 100644
--- a/drivers/usb/host/ehci-mx6.c
+++ b/drivers/usb/host/ehci-mx6.c
@@ -11,7 +11,7 @@
#include <linux/compiler.h>
#include <usb/ehci-fsl.h>
#include <asm/io.h>
-#include <asm/arch/imx-regs.h>
+#include <asm/arch/crm_regs.h>
#include <asm/arch/clock.h>
#include <asm/imx-common/iomux-v3.h>
@@ -72,22 +72,22 @@ static void usb_internal_phy_clock_gate(int index, int on)
static void usb_power_config(int index)
{
- struct anatop_regs __iomem *anatop =
- (struct anatop_regs __iomem *)ANATOP_BASE_ADDR;
+ struct mxc_ccm_reg __iomem *ccm_regs =
+ (struct mxc_ccm_reg __iomem *)CCM_BASE_ADDR;
void __iomem *chrg_detect;
void __iomem *pll_480_ctrl_clr;
void __iomem *pll_480_ctrl_set;
switch (index) {
case 0:
- chrg_detect = &anatop->usb1_chrg_detect;
- pll_480_ctrl_clr = &anatop->usb1_pll_480_ctrl_clr;
- pll_480_ctrl_set = &anatop->usb1_pll_480_ctrl_set;
+ chrg_detect = &ccm_regs->usb1_chrg_detect;
+ pll_480_ctrl_clr = &ccm_regs->analog_usb1_pll_480_ctrl_clr;
+ pll_480_ctrl_set = &ccm_regs->analog_usb1_pll_480_ctrl_set;
break;
case 1:
- chrg_detect = &anatop->usb2_chrg_detect;
- pll_480_ctrl_clr = &anatop->usb2_pll_480_ctrl_clr;
- pll_480_ctrl_set = &anatop->usb2_pll_480_ctrl_set;
+ chrg_detect = &ccm_regs->usb2_chrg_detect;
+ pll_480_ctrl_clr = &ccm_regs->analog_usb2_pll_480_ctrl_clr;
+ pll_480_ctrl_set = &ccm_regs->analog_usb2_pll_480_ctrl_set;
break;
default:
return;