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-rw-r--r--drivers/input/ps2ser.c31
-rw-r--r--drivers/misc/fsl_law.c65
-rw-r--r--drivers/mtd/cfi_flash.c41
-rw-r--r--drivers/mtd/nand/fsl_upm.c128
-rw-r--r--drivers/mtd/nand/nand_base.c46
-rw-r--r--drivers/net/3c589.c5
-rw-r--r--drivers/net/Makefile66
-rw-r--r--drivers/net/bcm570x.c5
-rw-r--r--drivers/net/cs8900.c8
-rw-r--r--drivers/net/dc2114x.c6
-rw-r--r--drivers/net/dm9000x.c396
-rw-r--r--drivers/net/e1000.c7
-rw-r--r--drivers/net/e1000.h3
-rw-r--r--drivers/net/eepro100.c5
-rw-r--r--drivers/net/enc28j60.c3
-rw-r--r--drivers/net/fsl_mcdmafec.c5
-rw-r--r--drivers/net/inca-ip_sw.c33
-rw-r--r--drivers/net/ks8695eth.c4
-rw-r--r--drivers/net/lan91c96.c9
-rw-r--r--drivers/net/macb.c5
-rw-r--r--drivers/net/mcffec.c13
-rw-r--r--drivers/net/natsemi.c5
-rw-r--r--drivers/net/netarm_eth.c8
-rw-r--r--drivers/net/netconsole.c5
-rw-r--r--drivers/net/ns7520_eth.c5
-rw-r--r--drivers/net/ns8382x.c5
-rw-r--r--drivers/net/ns9750_eth.c4
-rw-r--r--drivers/net/pcnet.c4
-rw-r--r--drivers/net/plb2800_eth.c6
-rw-r--r--drivers/net/rtl8019.c8
-rw-r--r--drivers/net/rtl8139.c4
-rw-r--r--drivers/net/rtl8169.c5
-rw-r--r--drivers/net/s3c4510b_eth.c5
-rw-r--r--drivers/net/smc91111.c3
-rw-r--r--drivers/net/smc911x.c26
-rw-r--r--drivers/net/tigon3.c5
-rw-r--r--drivers/net/tsec.c34
-rw-r--r--drivers/net/tsi108_eth.c5
-rw-r--r--drivers/net/uli526x.c4
-rw-r--r--drivers/net/vsc7385.c5
-rw-r--r--drivers/pci/tsi108_pci.c33
41 files changed, 586 insertions, 477 deletions
diff --git a/drivers/input/ps2ser.c b/drivers/input/ps2ser.c
index 4e304f7..c1741ea 100644
--- a/drivers/input/ps2ser.c
+++ b/drivers/input/ps2ser.c
@@ -49,7 +49,8 @@ DECLARE_GLOBAL_DATA_PTR;
#error CONFIG_PS2SERIAL must be in 1 ... 6
#endif
-#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || defined(CONFIG_MPC8555)
+#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
+ defined(CONFIG_MPC8548) || defined(CONFIG_MPC8555)
#if CONFIG_PS2SERIAL == 1
#define COM_BASE (CFG_CCSRBAR+0x4500)
@@ -65,7 +66,9 @@ static int ps2ser_getc_hw(void);
static void ps2ser_interrupt(void *dev_id);
extern struct serial_state rs_table[]; /* in serial.c */
-#if !defined(CONFIG_MPC5xxx) && !defined(CONFIG_MPC8540) && !defined(CONFIG_MPC8541) && !defined(CONFIG_MPC8555)
+#if !defined(CONFIG_MPC5xxx) && !defined(CONFIG_MPC8540) && \
+ !defined(CONFIG_MPC8541) && !defined(CONFIG_MPC8548) && \
+ !defined(CONFIG_MPC8555)
static struct serial_state *state;
#endif
@@ -120,7 +123,8 @@ int ps2ser_init(void)
return (0);
}
-#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || defined(CONFIG_MPC8555)
+#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
+ defined(CONFIG_MPC8548) || defined(CONFIG_MPC8555)
int ps2ser_init(void)
{
NS16550_t com_port = (NS16550_t)COM_BASE;
@@ -186,7 +190,8 @@ void ps2ser_putc(int chr)
{
#ifdef CONFIG_MPC5xxx
volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE;
-#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || defined(CONFIG_MPC8555)
+#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
+ defined(CONFIG_MPC8548) || defined(CONFIG_MPC8555)
NS16550_t com_port = (NS16550_t)COM_BASE;
#endif
#ifdef DEBUG
@@ -197,7 +202,8 @@ void ps2ser_putc(int chr)
while (!(psc->psc_status & PSC_SR_TXRDY));
psc->psc_buffer_8 = chr;
-#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || defined(CONFIG_MPC8555)
+#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
+ defined(CONFIG_MPC8548) || defined(CONFIG_MPC8555)
while ((com_port->lsr & LSR_THRE) == 0);
com_port->thr = chr;
#else
@@ -211,7 +217,8 @@ static int ps2ser_getc_hw(void)
{
#ifdef CONFIG_MPC5xxx
volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE;
-#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || defined(CONFIG_MPC8555)
+#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
+ defined(CONFIG_MPC8548) || defined(CONFIG_MPC8555)
NS16550_t com_port = (NS16550_t)COM_BASE;
#endif
int res = -1;
@@ -220,7 +227,8 @@ static int ps2ser_getc_hw(void)
if (psc->psc_status & PSC_SR_RXRDY) {
res = (psc->psc_buffer_8);
}
-#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || defined(CONFIG_MPC8555)
+#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
+ defined(CONFIG_MPC8548) || defined(CONFIG_MPC8555)
if (com_port->lsr & LSR_DR) {
res = com_port->rbr;
}
@@ -279,7 +287,8 @@ static void ps2ser_interrupt(void *dev_id)
{
#ifdef CONFIG_MPC5xxx
volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE;
-#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || defined(CONFIG_MPC8555)
+#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
+ defined(CONFIG_MPC8548) || defined(CONFIG_MPC8555)
NS16550_t com_port = (NS16550_t)COM_BASE;
#endif
int chr;
@@ -289,7 +298,8 @@ static void ps2ser_interrupt(void *dev_id)
chr = ps2ser_getc_hw();
#ifdef CONFIG_MPC5xxx
status = psc->psc_status;
-#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || defined(CONFIG_MPC8555)
+#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
+ defined(CONFIG_MPC8548) || defined(CONFIG_MPC8555)
status = com_port->lsr;
#else
status = ps2ser_in(UART_IIR);
@@ -305,7 +315,8 @@ static void ps2ser_interrupt(void *dev_id)
}
#ifdef CONFIG_MPC5xxx
} while (status & PSC_SR_RXRDY);
-#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || defined(CONFIG_MPC8555)
+#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
+ defined(CONFIG_MPC8548) || defined(CONFIG_MPC8555)
} while (status & LSR_DR);
#else
} while (status & UART_IIR_RDI);
diff --git a/drivers/misc/fsl_law.c b/drivers/misc/fsl_law.c
index dca6a4d..48ece4f 100644
--- a/drivers/misc/fsl_law.c
+++ b/drivers/misc/fsl_law.c
@@ -27,8 +27,22 @@
#include <asm/fsl_law.h>
#include <asm/io.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#define LAWAR_EN 0x80000000
-#define FSL_HW_NUM_LAWS 10 /* number of LAWs in the hw implementation */
+/* number of LAWs in the hw implementation */
+#if defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
+ defined(CONFIG_MPC8560) || defined(CONFIG_MPC8555)
+#define FSL_HW_NUM_LAWS 8
+#elif defined(CONFIG_MPC8548) || defined(CONFIG_MPC8544) || \
+ defined(CONFIG_MPC8568) || \
+ defined(CONFIG_MPC8641) || defined(CONFIG_MPC8610)
+#define FSL_HW_NUM_LAWS 10
+#elif defined(CONFIG_MPC8572)
+#define FSL_HW_NUM_LAWS 12
+#else
+#error FSL_HW_NUM_LAWS not defined for this platform
+#endif
void set_law(u8 idx, phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
{
@@ -36,18 +50,53 @@ void set_law(u8 idx, phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
volatile u32 *lawbar = base + 8 * idx;
volatile u32 *lawar = base + 8 * idx + 2;
+ gd->used_laws |= (1 << idx);
+
out_be32(lawbar, addr >> 12);
out_be32(lawar, LAWAR_EN | ((u32)id << 20) | (u32)sz);
return ;
}
+int set_next_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
+{
+ u32 idx = ffz(gd->used_laws);
+
+ if (idx >= FSL_HW_NUM_LAWS)
+ return -1;
+
+ set_law(idx, addr, sz, id);
+
+ return idx;
+}
+
+int set_last_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
+{
+ u32 idx;
+
+ /* we have no LAWs free */
+ if (gd->used_laws == -1)
+ return -1;
+
+ /* grab the last free law */
+ idx = __ilog2(~(gd->used_laws));
+
+ if (idx >= FSL_HW_NUM_LAWS)
+ return -1;
+
+ set_law(idx, addr, sz, id);
+
+ return idx;
+}
+
void disable_law(u8 idx)
{
volatile u32 *base = (volatile u32 *)(CFG_IMMR + 0xc08);
volatile u32 *lawbar = base + 8 * idx;
volatile u32 *lawar = base + 8 * idx + 2;
+ gd->used_laws &= ~(1 << idx);
+
out_be32(lawar, 0);
out_be32(lawbar, 0);
@@ -75,14 +124,16 @@ void print_laws(void)
void init_laws(void)
{
int i;
- u8 law_idx = 0;
- for (i = 0; i < num_law_entries; i++) {
- if (law_table[i].index != -1)
- law_idx = law_table[i].index;
+ gd->used_laws = ~((1 << FSL_HW_NUM_LAWS) - 1);
- set_law(law_idx++, law_table[i].addr,
- law_table[i].size, law_table[i].trgt_id);
+ for (i = 0; i < num_law_entries; i++) {
+ if (law_table[i].index == -1)
+ set_next_law(law_table[i].addr, law_table[i].size,
+ law_table[i].trgt_id);
+ else
+ set_law(law_table[i].index, law_table[i].addr,
+ law_table[i].size, law_table[i].trgt_id);
}
return ;
diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index d84f0fc..d505bc8 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -76,7 +76,9 @@
#define FLASH_CMD_PROTECT_SET 0x01
#define FLASH_CMD_PROTECT_CLEAR 0xD0
#define FLASH_CMD_CLEAR_STATUS 0x50
+#define FLASH_CMD_READ_STATUS 0x70
#define FLASH_CMD_WRITE_TO_BUFFER 0xE8
+#define FLASH_CMD_WRITE_BUFFER_PROG 0xE9
#define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
#define FLASH_STATUS_DONE 0x80
@@ -136,6 +138,7 @@
#define CFI_CMDSET_MITSU_STANDARD 256
#define CFI_CMDSET_MITSU_EXTENDED 257
#define CFI_CMDSET_SST 258
+#define CFI_CMDSET_INTEL_PROG_REGIONS 512
#ifdef CFG_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
# undef FLASH_CMD_RESET
@@ -298,17 +301,25 @@ static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
/*-----------------------------------------------------------------------
* make a proper sized command based on the port and chip widths
*/
-static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf)
+static void flash_make_cmd (flash_info_t * info, ulong cmd, void *cmdbuf)
{
int i;
+ int cword_offset;
+ int cp_offset;
+ uchar val;
uchar *cp = (uchar *) cmdbuf;
+ for (i = info->portwidth; i > 0; i--){
+ cword_offset = (info->portwidth-i)%info->chipwidth;
#if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
- for (i = info->portwidth; i > 0; i--)
+ cp_offset = info->portwidth - i;
+ val = *((uchar*)&cmd + cword_offset);
#else
- for (i = 1; i <= info->portwidth; i++)
+ cp_offset = i - 1;
+ val = *((uchar*)&cmd + sizeof(ulong) - cword_offset - 1);
#endif
- *cp++ = (i & (info->chipwidth - 1)) ? '\0' : cmd;
+ cp[cp_offset] = (cword_offset >= sizeof(ulong)) ? 0x00 : val;
+ }
}
#ifdef DEBUG
@@ -422,7 +433,7 @@ static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
* Write a proper sized command to the correct address
*/
static void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
- uint offset, uchar cmd)
+ uint offset, ulong cmd)
{
void *addr;
@@ -605,6 +616,7 @@ static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
int retval;
switch (info->vendor) {
+ case CFI_CMDSET_INTEL_PROG_REGIONS:
case CFI_CMDSET_INTEL_STANDARD:
case CFI_CMDSET_INTEL_EXTENDED:
retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
@@ -664,6 +676,7 @@ static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
retcode = flash_status_check (info, sector, tout, prompt);
switch (info->vendor) {
+ case CFI_CMDSET_INTEL_PROG_REGIONS:
case CFI_CMDSET_INTEL_EXTENDED:
case CFI_CMDSET_INTEL_STANDARD:
if ((retcode == ERR_OK)
@@ -792,6 +805,7 @@ static int flash_write_cfiword (flash_info_t * info, ulong dest,
flag = disable_interrupts ();
switch (info->vendor) {
+ case CFI_CMDSET_INTEL_PROG_REGIONS:
case CFI_CMDSET_INTEL_EXTENDED:
case CFI_CMDSET_INTEL_STANDARD:
flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
@@ -846,6 +860,7 @@ static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
int flag = 0;
uint offset = 0;
unsigned int shift;
+ uchar write_cmd;
switch (info->portwidth) {
case FLASH_CFI_8BIT:
@@ -900,10 +915,14 @@ static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
sector = find_sector (info, dest);
switch (info->vendor) {
+ case CFI_CMDSET_INTEL_PROG_REGIONS:
case CFI_CMDSET_INTEL_STANDARD:
case CFI_CMDSET_INTEL_EXTENDED:
+ write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
+ FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER;
flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
- flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
+ flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS);
+ flash_write_cmd (info, sector, 0, write_cmd);
retcode = flash_status_check (info, sector,
info->buffer_write_tout,
"write to buffer");
@@ -911,7 +930,7 @@ static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
/* reduce the number of loops by the width of
* the port */
cnt = len >> shift;
- flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
+ flash_write_cmd (info, sector, 0, cnt - 1);
while (cnt-- > 0) {
switch (info->portwidth) {
case FLASH_CFI_8BIT:
@@ -1038,6 +1057,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
for (sect = s_first; sect <= s_last; sect++) {
if (info->protect[sect] == 0) { /* not protected */
switch (info->vendor) {
+ case CFI_CMDSET_INTEL_PROG_REGIONS:
case CFI_CMDSET_INTEL_STANDARD:
case CFI_CMDSET_INTEL_EXTENDED:
flash_write_cmd (info, sect, 0,
@@ -1106,6 +1126,9 @@ void flash_print_info (flash_info_t * info)
info->size >> 20, info->sector_count);
printf (" ");
switch (info->vendor) {
+ case CFI_CMDSET_INTEL_PROG_REGIONS:
+ printf ("Intel Prog Regions");
+ break;
case CFI_CMDSET_INTEL_STANDARD:
printf ("Intel Standard");
break;
@@ -1496,6 +1519,7 @@ static void flash_read_jedec_ids (flash_info_t * info)
info->device_id2 = 0;
switch (info->vendor) {
+ case CFI_CMDSET_INTEL_PROG_REGIONS:
case CFI_CMDSET_INTEL_STANDARD:
case CFI_CMDSET_INTEL_EXTENDED:
cmdset_intel_read_jedec_ids(info);
@@ -1550,6 +1574,7 @@ static int flash_detect_legacy(ulong base, int banknum)
}
switch(info->vendor) {
+ case CFI_CMDSET_INTEL_PROG_REGIONS:
case CFI_CMDSET_INTEL_STANDARD:
case CFI_CMDSET_INTEL_EXTENDED:
info->cmd_reset = FLASH_CMD_RESET;
@@ -1747,6 +1772,7 @@ ulong flash_get_size (ulong base, int banknum)
#endif
switch (info->vendor) {
+ case CFI_CMDSET_INTEL_PROG_REGIONS:
case CFI_CMDSET_INTEL_STANDARD:
case CFI_CMDSET_INTEL_EXTENDED:
cmdset_intel_init(info, &qry);
@@ -1824,6 +1850,7 @@ ulong flash_get_size (ulong base, int banknum)
* supported devices (intel...)
*/
switch (info->vendor) {
+ case CFI_CMDSET_INTEL_PROG_REGIONS:
case CFI_CMDSET_INTEL_EXTENDED:
case CFI_CMDSET_INTEL_STANDARD:
info->protect[sect_cnt] =
diff --git a/drivers/mtd/nand/fsl_upm.c b/drivers/mtd/nand/fsl_upm.c
index 5cc410a..67ae9c8 100644
--- a/drivers/mtd/nand/fsl_upm.c
+++ b/drivers/mtd/nand/fsl_upm.c
@@ -20,112 +20,83 @@
#include <linux/mtd/fsl_upm.h>
#include <nand.h>
-#define FSL_UPM_MxMR_OP_NO (0 << 28) /* normal operation */
-#define FSL_UPM_MxMR_OP_WA (1 << 28) /* write array */
-#define FSL_UPM_MxMR_OP_RA (2 << 28) /* read array */
-#define FSL_UPM_MxMR_OP_RP (3 << 28) /* run pattern */
+static int fsl_upm_in_pattern;
static void fsl_upm_start_pattern(struct fsl_upm *upm, u32 pat_offset)
{
- out_be32(upm->mxmr, FSL_UPM_MxMR_OP_RP | pat_offset);
+ clrsetbits_be32(upm->mxmr, MxMR_MAD_MSK, MxMR_OP_RUNP | pat_offset);
}
static void fsl_upm_end_pattern(struct fsl_upm *upm)
{
- out_be32(upm->mxmr, FSL_UPM_MxMR_OP_NO);
- while (in_be32(upm->mxmr) != FSL_UPM_MxMR_OP_NO)
+ clrbits_be32(upm->mxmr, MxMR_OP_RUNP);
+
+ while (in_be32(upm->mxmr) & MxMR_OP_RUNP)
eieio();
}
static void fsl_upm_run_pattern(struct fsl_upm *upm, int width, u32 cmd)
{
- out_be32(upm->mar, cmd << (32 - width * 8));
- out_8(upm->io_addr, 0x0);
-}
-
-static void fsl_upm_setup(struct fsl_upm *upm)
-{
- int i;
-
- /* write upm array */
- out_be32(upm->mxmr, FSL_UPM_MxMR_OP_WA);
-
- for (i = 0; i < 64; i++) {
- out_be32(upm->mdr, upm->array[i]);
+ out_be32(upm->mar, cmd << (32 - width));
+ switch (width) {
+ case 8:
out_8(upm->io_addr, 0x0);
+ break;
+ case 16:
+ out_be16(upm->io_addr, 0x0);
+ break;
+ case 32:
+ out_be32(upm->io_addr, 0x0);
+ break;
}
-
- /* normal operation */
- out_be32(upm->mxmr, FSL_UPM_MxMR_OP_NO);
- while (in_be32(upm->mxmr) != FSL_UPM_MxMR_OP_NO)
- eieio();
}
-static void fun_cmdfunc(struct mtd_info *mtd, unsigned command, int column,
- int page_addr)
+static void nand_hwcontrol (struct mtd_info *mtd, int cmd)
{
struct nand_chip *chip = mtd->priv;
struct fsl_upm_nand *fun = chip->priv;
- fsl_upm_start_pattern(&fun->upm, fun->upm_cmd_offset);
-
- if (command == NAND_CMD_SEQIN) {
- int readcmd;
-
- if (column >= mtd->oobblock) {
- /* OOB area */
- column -= mtd->oobblock;
- readcmd = NAND_CMD_READOOB;
- } else if (column < 256) {
- /* First 256 bytes --> READ0 */
- readcmd = NAND_CMD_READ0;
- } else {
- column -= 256;
- readcmd = NAND_CMD_READ1;
- }
- fsl_upm_run_pattern(&fun->upm, fun->width, readcmd);
+ switch (cmd) {
+ case NAND_CTL_SETCLE:
+ fsl_upm_start_pattern(&fun->upm, fun->upm_cmd_offset);
+ fsl_upm_in_pattern++;
+ break;
+ case NAND_CTL_SETALE:
+ fsl_upm_start_pattern(&fun->upm, fun->upm_addr_offset);
+ fsl_upm_in_pattern++;
+ break;
+ case NAND_CTL_CLRCLE:
+ case NAND_CTL_CLRALE:
+ fsl_upm_end_pattern(&fun->upm);
+ fsl_upm_in_pattern--;
+ break;
}
+}
- fsl_upm_run_pattern(&fun->upm, fun->width, command);
-
- fsl_upm_end_pattern(&fun->upm);
-
- fsl_upm_start_pattern(&fun->upm, fun->upm_addr_offset);
-
- if (column != -1)
- fsl_upm_run_pattern(&fun->upm, fun->width, column);
+static void nand_write_byte(struct mtd_info *mtd, u_char byte)
+{
+ struct nand_chip *chip = mtd->priv;
- if (page_addr != -1) {
- fsl_upm_run_pattern(&fun->upm, fun->width, page_addr);
- fsl_upm_run_pattern(&fun->upm, fun->width,
- (page_addr >> 8) & 0xFF);
- if (chip->chipsize > (32 << 20)) {
- fsl_upm_run_pattern(&fun->upm, fun->width,
- (page_addr >> 16) & 0x0f);
- }
- }
+ if (fsl_upm_in_pattern) {
+ struct fsl_upm_nand *fun = chip->priv;
- fsl_upm_end_pattern(&fun->upm);
+ fsl_upm_run_pattern(&fun->upm, fun->width, byte);
- if (fun->wait_pattern) {
/*
* Some boards/chips needs this. At least on MPC8360E-RDK we
* need it. Probably weird chip, because I don't see any need
* for this on MPC8555E + Samsung K9F1G08U0A. Usually here are
* 0-2 unexpected busy states per block read.
*/
- while (!fun->dev_ready())
- debug("unexpected busy state\n");
+ if (fun->wait_pattern) {
+ while (!fun->dev_ready())
+ debug("unexpected busy state\n");
+ }
+ } else {
+ out_8(chip->IO_ADDR_W, byte);
}
}
-static void nand_write_byte(struct mtd_info *mtd, u_char byte)
-{
- struct nand_chip *chip = mtd->priv;
-
- out_8(chip->IO_ADDR_W, byte);
-}
-
static u8 nand_read_byte(struct mtd_info *mtd)
{
struct nand_chip *chip = mtd->priv;
@@ -164,10 +135,6 @@ static int nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
return 0;
}
-static void nand_hwcontrol(struct mtd_info *mtd, int cmd)
-{
-}
-
static int nand_dev_ready(struct mtd_info *mtd)
{
struct nand_chip *chip = mtd->priv;
@@ -178,23 +145,20 @@ static int nand_dev_ready(struct mtd_info *mtd)
int fsl_upm_nand_init(struct nand_chip *chip, struct fsl_upm_nand *fun)
{
- /* yet only 8 bit accessors implemented */
- if (fun->width != 1)
+ if (fun->width != 8 && fun->width != 16 && fun->width != 32)
return -ENOSYS;
- fsl_upm_setup(&fun->upm);
-
chip->priv = fun;
chip->chip_delay = fun->chip_delay;
chip->eccmode = NAND_ECC_SOFT;
- chip->cmdfunc = fun_cmdfunc;
chip->hwcontrol = nand_hwcontrol;
chip->read_byte = nand_read_byte;
chip->read_buf = nand_read_buf;
chip->write_byte = nand_write_byte;
chip->write_buf = nand_write_buf;
chip->verify_buf = nand_verify_buf;
- chip->dev_ready = nand_dev_ready;
+ if (fun->dev_ready)
+ chip->dev_ready = nand_dev_ready;
return 0;
}
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 5aef31c..740d3fc 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -113,18 +113,22 @@ static struct nand_oobinfo nand_oob_64 = {
.oobfree = { {2, 38} }
};
-/* This is used for padding purposes in nand_write_oob */
-static u_char ffchars[] = {
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+static struct nand_oobinfo nand_oob_128 = {
+ .useecc = MTD_NANDECC_AUTOPLACE,
+ .eccbytes = 48,
+ .eccpos = {
+ 80, 81, 82, 83, 84, 85, 86, 87,
+ 88, 89, 90, 91, 92, 93, 94, 95,
+ 96, 97, 98, 99, 100, 101, 102, 103,
+ 104, 105, 106, 107, 108, 109, 110, 111,
+ 112, 113, 114, 115, 116, 117, 118, 119,
+ 120, 121, 122, 123, 124, 125, 126, 127},
+ .oobfree = { {2, 78} }
};
+/* This is used for padding purposes in nand_write_oob */
+static u_char *ffchars;
+
/*
* NAND low-level MTD interface functions
*/
@@ -193,6 +197,10 @@ static void nand_release_device (struct mtd_info *mtd)
{
struct nand_chip *this = mtd->priv;
this->select_chip(mtd, -1); /* De-select the NAND device */
+ if (ffchars) {
+ kfree(ffchars);
+ ffchars = NULL;
+ }
}
#endif
@@ -891,7 +899,7 @@ static int nand_write_page (struct mtd_info *mtd, struct nand_chip *this, int pa
u_char *oob_buf, struct nand_oobinfo *oobsel, int cached)
{
int i, status;
- u_char ecc_code[32];
+ u_char ecc_code[NAND_MAX_OOBSIZE];
int eccmode = oobsel->useecc ? this->eccmode : NAND_ECC_NONE;
uint *oob_config = oobsel->eccpos;
int datidx = 0, eccidx = 0, eccsteps = this->eccsteps;
@@ -1112,8 +1120,8 @@ static int nand_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
int read = 0, oob = 0, ecc_status = 0, ecc_failed = 0;
struct nand_chip *this = mtd->priv;
u_char *data_poi, *oob_data = oob_buf;
- u_char ecc_calc[32];
- u_char ecc_code[32];
+ u_char ecc_calc[NAND_MAX_OOBSIZE];
+ u_char ecc_code[NAND_MAX_OOBSIZE];
int eccmode, eccsteps;
unsigned *oob_config;
int datidx;
@@ -1811,6 +1819,15 @@ static int nand_write_oob (struct mtd_info *mtd, loff_t to, size_t len, size_t *
if (NAND_MUST_PAD(this)) {
/* Write out desired data */
this->cmdfunc (mtd, NAND_CMD_SEQIN, mtd->oobblock, page & this->pagemask);
+ if (!ffchars) {
+ if (!(ffchars = kmalloc (mtd->oobsize, GFP_KERNEL))) {
+ DEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: "
+ "No memory for padding array, need %d bytes", mtd->oobsize);
+ ret = -ENOMEM;
+ goto out;
+ }
+ memset(ffchars, 0xff, mtd->oobsize);
+ }
/* prepad 0xff for partial programming */
this->write_buf(mtd, ffchars, column);
/* write data */
@@ -2479,6 +2496,9 @@ int nand_scan (struct mtd_info *mtd, int maxchips)
case 64:
this->autooob = &nand_oob_64;
break;
+ case 128:
+ this->autooob = &nand_oob_128;
+ break;
default:
printk (KERN_WARNING "No oob scheme defined for oobsize %d\n",
mtd->oobsize);
diff --git a/drivers/net/3c589.c b/drivers/net/3c589.c
index 3f1e770..0cf8dff 100644
--- a/drivers/net/3c589.c
+++ b/drivers/net/3c589.c
@@ -26,8 +26,6 @@
#include <command.h>
#include <net.h>
-#ifdef CONFIG_DRIVER_3C589
-
#include "3c589.h"
@@ -514,6 +512,3 @@ int eth_send(volatile void *packet, int length) {
return length;
}
-
-
-#endif /* CONFIG_DRIVER_3C589 */
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 5b031c9..84be288 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -25,45 +25,45 @@ include $(TOPDIR)/config.mk
LIB := $(obj)libnet.a
-COBJS-y += 3c589.o
-COBJS-y += bcm570x.o bcm570x_autoneg.o 5701rls.o
+COBJS-$(CONFIG_DRIVER_3C589) += 3c589.o
+COBJS-$(CONFIG_BCM570x) += bcm570x.o bcm570x_autoneg.o 5701rls.o
COBJS-$(CONFIG_BFIN_MAC) += bfin_mac.o
-COBJS-y += cs8900.o
-COBJS-y += dc2114x.o
-COBJS-y += dm9000x.o
-COBJS-y += e1000.o
-COBJS-y += eepro100.o
-COBJS-y += enc28j60.o
-COBJS-y += fsl_mcdmafec.o
+COBJS-$(CONFIG_DRIVER_CS8900) += cs8900.o
+COBJS-$(CONFIG_TULIP) += dc2114x.o
+COBJS-$(CONFIG_DRIVER_DM9000) += dm9000x.o
+COBJS-$(CONFIG_E1000) += e1000.o
+COBJS-$(CONFIG_EEPRO100) += eepro100.o
+COBJS-$(CONFIG_ENC28J60) += enc28j60.o
+COBJS-$(CONFIG_FSLDMAFEC) += fsl_mcdmafec.o
COBJS-$(CONFIG_GRETH) += greth.o
-COBJS-y += inca-ip_sw.o
-COBJS-y += ks8695eth.o
-COBJS-y += lan91c96.o
-COBJS-y += macb.o
-COBJS-y += mcffec.o
-COBJS-y += natsemi.o
+COBJS-$(CONFIG_INCA_IP_SWITCH) += inca-ip_sw.o
+COBJS-$(CONFIG_DRIVER_KS8695ETH) += ks8695eth.o
+COBJS-$(CONFIG_DRIVER_LAN91C96) += lan91c96.o
+COBJS-$(CONFIG_MACB) += macb.o
+COBJS-$(CONFIG_MCFFEC) += mcffec.o
+COBJS-$(CONFIG_NATSEMI) += natsemi.o
ifeq ($(CONFIG_DRIVER_NE2000),y)
COBJS-y += ne2000.o
COBJS-$(CONFIG_DRIVER_AX88796L) += ax88796.o
endif
-COBJS-y += netarm_eth.o
-COBJS-y += netconsole.o
-COBJS-y += ns7520_eth.o
-COBJS-y += ns8382x.o
-COBJS-y += ns9750_eth.o
-COBJS-y += pcnet.o
-COBJS-y += plb2800_eth.o
-COBJS-y += rtl8019.o
-COBJS-y += rtl8139.o
-COBJS-y += rtl8169.o
-COBJS-y += s3c4510b_eth.o
-COBJS-y += smc91111.o
-COBJS-y += smc911x.o
-COBJS-y += tigon3.o
-COBJS-y += tsec.o
-COBJS-y += tsi108_eth.o
-COBJS-y += uli526x.o
-COBJS-y += vsc7385.o
+COBJS-$(CONFIG_DRIVER_NETARMETH) += netarm_eth.o
+COBJS-$(CONFIG_NETCONSOLE) += netconsole.o
+COBJS-$(CONFIG_DRIVER_NS7520_ETHERNET) += ns7520_eth.o
+COBJS-$(CONFIG_NS8382X) += ns8382x.o
+COBJS-$(CONFIG_DRIVER_NS9750_ETHERNET) += ns9750_eth.o
+COBJS-$(CONFIG_PCNET) += pcnet.o
+COBJS-$(CONFIG_PLB2800_ETHER) += plb2800_eth.o
+COBJS-$(CONFIG_DRIVER_RTL8019) += rtl8019.o
+COBJS-$(CONFIG_RTL8139) += rtl8139.o
+COBJS-$(CONFIG_RTL8169) += rtl8169.o
+COBJS-$(CONFIG_DRIVER_S3C4510_ETH) += s3c4510b_eth.o
+COBJS-$(CONFIG_DRIVER_SMC91111) += smc91111.o
+COBJS-$(CONFIG_DRIVER_SMC911X) += smc911x.o
+COBJS-$(CONFIG_TIGON3) += tigon3.o bcm570x_autoneg.o 5701rls.o
+COBJS-$(CONFIG_TSEC_ENET) += tsec.o
+COBJS-$(CONFIG_TSI108_ETH) += tsi108_eth.o
+COBJS-$(CONFIG_ULI526X) += uli526x.o
+COBJS-$(CONFIG_VSC7385_ENET) += vsc7385.o
COBJS-$(CONFIG_XILINX_EMAC) += xilinx_emac.o
COBJS-$(CONFIG_XILINX_EMACLITE) += xilinx_emaclite.o
diff --git a/drivers/net/bcm570x.c b/drivers/net/bcm570x.c
index 5ad31d1..6b28b95 100644
--- a/drivers/net/bcm570x.c
+++ b/drivers/net/bcm570x.c
@@ -6,9 +6,6 @@
#include <common.h>
-#if defined(CONFIG_CMD_NET) \
- && (!defined(CONFIG_NET_MULTI)) && defined(CONFIG_BCM570x)
-
#ifdef CONFIG_BMW
#include <mpc824x.h>
#endif
@@ -1599,5 +1596,3 @@ PQQ_ENTRY QQ_GetTail (PQQ_CONTAINER pQueue, unsigned int Idx)
return pQueue->Array[Idx];
}
-
-#endif
diff --git a/drivers/net/cs8900.c b/drivers/net/cs8900.c
index 458b517..ae1983a 100644
--- a/drivers/net/cs8900.c
+++ b/drivers/net/cs8900.c
@@ -41,10 +41,6 @@
#include "cs8900.h"
#include <net.h>
-#ifdef CONFIG_DRIVER_CS8900
-
-#if defined(CONFIG_CMD_NET)
-
#undef DEBUG
/* packet page register access functions */
@@ -315,7 +311,3 @@ int cs8900_e2prom_write(unsigned char addr, unsigned short value)
return 0;
}
-
-#endif /* CONFIG_CMD_NET */
-
-#endif /* CONFIG_DRIVER_CS8900 */
diff --git a/drivers/net/dc2114x.c b/drivers/net/dc2114x.c
index 1d728d8..8117239 100644
--- a/drivers/net/dc2114x.c
+++ b/drivers/net/dc2114x.c
@@ -19,10 +19,6 @@
*/
#include <common.h>
-
-#if defined(CONFIG_CMD_NET) \
- && defined(CONFIG_NET_MULTI) && defined(CONFIG_TULIP)
-
#include <malloc.h>
#include <net.h>
#include <pci.h>
@@ -766,5 +762,3 @@ static void update_srom(struct eth_device *dev, bd_t *bis)
}
}
#endif /* UPDATE_SROM */
-
-#endif
diff --git a/drivers/net/dm9000x.c b/drivers/net/dm9000x.c
index 68901cd..844fb76 100644
--- a/drivers/net/dm9000x.c
+++ b/drivers/net/dm9000x.c
@@ -36,7 +36,24 @@ v1.2 03/18/2003 Weilun Huang <weilun_huang@davicom.com.tw>:
--------------------------------------
- 12/15/2003 Initial port to u-boot by Sascha Hauer <saschahauer@web.de>
+ 12/15/2003 Initial port to u-boot by
+ Sascha Hauer <saschahauer@web.de>
+
+ 06/03/2008 Remy Bohmer <linux@bohmer.net>
+ - Fixed the driver to work with DM9000A.
+ (check on ISR receive status bit before reading the
+ FIFO as described in DM9000 programming guide and
+ application notes)
+ - Added autodetect of databus width.
+ - Made debug code compile again.
+ - Adapt eth_send such that it matches the DM9000*
+ application notes. Needed to make it work properly
+ for DM9000A.
+ - Adapted reset procedure to match DM9000 application
+ notes (i.e. double reset)
+ - some minor code cleanups
+ These changes are tested with DM9000{A,EP,E} together
+ with a 200MHz Atmel AT91SAM92161 core
TODO: Homerun NIC and longrun NIC are not functional, only internal at the
moment.
@@ -47,8 +64,6 @@ TODO: Homerun NIC and longrun NIC are not functional, only internal at the
#include <net.h>
#include <asm/io.h>
-#ifdef CONFIG_DRIVER_DM9000
-
#include "dm9000x.h"
/* Board/System/Debug information/definition ---------------- */
@@ -59,10 +74,22 @@ TODO: Homerun NIC and longrun NIC are not functional, only internal at the
/* #define CONFIG_DM9000_DEBUG */
#ifdef CONFIG_DM9000_DEBUG
-#define DM9000_DBG(fmt,args...) printf(fmt ,##args)
-#else /* */
+#define DM9000_DBG(fmt,args...) printf(fmt, ##args)
+#define DM9000_DMP_PACKET(func,packet,length) \
+ do { \
+ int i; \
+ printf(func ": length: %d\n", length); \
+ for (i = 0; i < length; i++) { \
+ if (i % 8 == 0) \
+ printf("\n%s: %02x: ", func, i); \
+ printf("%02x ", ((unsigned char *) packet)[i]); \
+ } printf("\n"); \
+ } while(0)
+#else
#define DM9000_DBG(fmt,args...)
-#endif /* */
+#define DM9000_DMP_PACKET(func,packet,length)
+#endif
+
enum DM9000_PHY_mode { DM9000_10MHD = 0, DM9000_100MHD =
1, DM9000_10MFD = 4, DM9000_100MFD = 5, DM9000_AUTO =
8, DM9000_1M_HPNA = 0x10
@@ -84,8 +111,11 @@ typedef struct board_info {
u8 device_wait_reset; /* device state */
u8 nic_type; /* NIC type */
unsigned char srom[128];
+ void (*outblk)(volatile void *data_ptr, int count);
+ void (*inblk)(void *data_ptr, int count);
+ void (*rx_status)(u16 *RxStatus, u16 *RxLen);
} board_info_t;
-board_info_t dmfe_info;
+static board_info_t dm9000_info;
/* For module input parameter */
static int media_mode = DM9000_AUTO;
@@ -124,10 +154,85 @@ dump_regs(void)
DM9000_DBG("TSRII (0x04): %02x\n", DM9000_ior(4));
DM9000_DBG("RCR (0x05): %02x\n", DM9000_ior(5));
DM9000_DBG("RSR (0x06): %02x\n", DM9000_ior(6));
- DM9000_DBG("ISR (0xFE): %02x\n", DM9000_ior(ISR));
+ DM9000_DBG("ISR (0xFE): %02x\n", DM9000_ior(DM9000_ISR));
DM9000_DBG("\n");
}
-#endif /* */
+#endif
+
+static void dm9000_outblk_8bit(volatile void *data_ptr, int count)
+{
+ int i;
+ for (i = 0; i < count; i++)
+ DM9000_outb((((u8 *) data_ptr)[i] & 0xff), DM9000_DATA);
+}
+
+static void dm9000_outblk_16bit(volatile void *data_ptr, int count)
+{
+ int i;
+ u32 tmplen = (count + 1) / 2;
+
+ for (i = 0; i < tmplen; i++)
+ DM9000_outw(((u16 *) data_ptr)[i], DM9000_DATA);
+}
+static void dm9000_outblk_32bit(volatile void *data_ptr, int count)
+{
+ int i;
+ u32 tmplen = (count + 3) / 4;
+
+ for (i = 0; i < tmplen; i++)
+ DM9000_outl(((u32 *) data_ptr)[i], DM9000_DATA);
+}
+
+static void dm9000_inblk_8bit(void *data_ptr, int count)
+{
+ int i;
+ for (i = 0; i < count; i++)
+ ((u8 *) data_ptr)[i] = DM9000_inb(DM9000_DATA);
+}
+
+static void dm9000_inblk_16bit(void *data_ptr, int count)
+{
+ int i;
+ u32 tmplen = (count + 1) / 2;
+
+ for (i = 0; i < tmplen; i++)
+ ((u16 *) data_ptr)[i] = DM9000_inw(DM9000_DATA);
+}
+static void dm9000_inblk_32bit(void *data_ptr, int count)
+{
+ int i;
+ u32 tmplen = (count + 3) / 4;
+
+ for (i = 0; i < tmplen; i++)
+ ((u32 *) data_ptr)[i] = DM9000_inl(DM9000_DATA);
+}
+
+static void dm9000_rx_status_32bit(u16 *RxStatus, u16 *RxLen)
+{
+ u32 tmpdata;
+
+ DM9000_outb(DM9000_MRCMD, DM9000_IO);
+
+ tmpdata = DM9000_inl(DM9000_DATA);
+ *RxStatus = tmpdata;
+ *RxLen = tmpdata >> 16;
+}
+
+static void dm9000_rx_status_16bit(u16 *RxStatus, u16 *RxLen)
+{
+ DM9000_outb(DM9000_MRCMD, DM9000_IO);
+
+ *RxStatus = DM9000_inw(DM9000_DATA);
+ *RxLen = DM9000_inw(DM9000_DATA);
+}
+
+static void dm9000_rx_status_8bit(u16 *RxStatus, u16 *RxLen)
+{
+ DM9000_outb(DM9000_MRCMD, DM9000_IO);
+
+ *RxStatus = DM9000_inb(DM9000_DATA) + (DM9000_inb(DM9000_DATA) << 8);
+ *RxLen = DM9000_inb(DM9000_DATA) + (DM9000_inb(DM9000_DATA) << 8);
+}
/*
Search DM9000 board, allocate space and register it
@@ -236,7 +341,7 @@ program_dm9802(void)
static void
identify_nic(void)
{
- struct board_info *db = &dmfe_info; /* Point a board information structure */
+ struct board_info *db = &dm9000_info;
u16 phy_reg3;
DM9000_iow(DM9000_NCR, NCR_EXT_PHY);
phy_reg3 = phy_read(3);
@@ -263,9 +368,35 @@ identify_nic(void)
static void
dm9000_reset(void)
{
- DM9000_DBG("resetting\n");
- DM9000_iow(DM9000_NCR, NCR_RST);
- udelay(1000); /* delay 1ms */
+ DM9000_DBG("resetting DM9000\n");
+
+ /* Reset DM9000,
+ see DM9000 Application Notes V1.22 Jun 11, 2004 page 29 */
+
+ /* DEBUG: Make all GPIO pins outputs */
+ DM9000_iow(DM9000_GPCR, 0x0F);
+ /* Step 1: Power internal PHY by writing 0 to GPIO0 pin */
+ DM9000_iow(DM9000_GPR, 0);
+ /* Step 2: Software reset */
+ DM9000_iow(DM9000_NCR, 3);
+
+ do {
+ DM9000_DBG("resetting the DM9000, 1st reset\n");
+ udelay(25); /* Wait at least 20 us */
+ } while (DM9000_ior(DM9000_NCR) & 1);
+
+ DM9000_iow(DM9000_NCR, 0);
+ DM9000_iow(DM9000_NCR, 3); /* Issue a second reset */
+
+ do {
+ DM9000_DBG("resetting the DM9000, 2nd reset\n");
+ udelay(25); /* Wait at least 20 us */
+ } while (DM9000_ior(DM9000_NCR) & 1);
+
+ /* Check whether the ethernet controller is present */
+ if ((DM9000_ior(DM9000_PIDL) != 0x0) ||
+ (DM9000_ior(DM9000_PIDH) != 0x90))
+ printf("ERROR: resetting DM9000 -> not responding\n");
}
/* Initilize dm9000 board
@@ -274,12 +405,46 @@ int
eth_init(bd_t * bd)
{
int i, oft, lnk;
+ u8 io_mode;
+ struct board_info *db = &dm9000_info;
+
DM9000_DBG("eth_init()\n");
/* RESET device */
dm9000_reset();
dm9000_probe();
+ /* Auto-detect 8/16/32 bit mode, ISR Bit 6+7 indicate bus width */
+ io_mode = DM9000_ior(DM9000_ISR) >> 6;
+
+ switch (io_mode) {
+ case 0x0: /* 16-bit mode */
+ printf("DM9000: running in 16 bit mode\n");
+ db->outblk = dm9000_outblk_16bit;
+ db->inblk = dm9000_inblk_16bit;
+ db->rx_status = dm9000_rx_status_16bit;
+ break;
+ case 0x01: /* 32-bit mode */
+ printf("DM9000: running in 32 bit mode\n");
+ db->outblk = dm9000_outblk_32bit;
+ db->inblk = dm9000_inblk_32bit;
+ db->rx_status = dm9000_rx_status_32bit;
+ break;
+ case 0x02: /* 8 bit mode */
+ printf("DM9000: running in 8 bit mode\n");
+ db->outblk = dm9000_outblk_8bit;
+ db->inblk = dm9000_inblk_8bit;
+ db->rx_status = dm9000_rx_status_8bit;
+ break;
+ default:
+ /* Assume 8 bit mode, will probably not work anyway */
+ printf("DM9000: Undefined IO-mode:0x%x\n", io_mode);
+ db->outblk = dm9000_outblk_8bit;
+ db->inblk = dm9000_inblk_8bit;
+ db->rx_status = dm9000_rx_status_8bit;
+ break;
+ }
+
/* NIC Type: FASTETHER, HOMERUN, LONGRUN */
identify_nic();
@@ -289,15 +454,22 @@ eth_init(bd_t * bd)
/* Set PHY */
set_PHY_mode();
- /* Program operating register */
- DM9000_iow(DM9000_NCR, 0x0); /* only intern phy supported by now */
- DM9000_iow(DM9000_TCR, 0); /* TX Polling clear */
- DM9000_iow(DM9000_BPTR, 0x3f); /* Less 3Kb, 200us */
- DM9000_iow(DM9000_FCTR, FCTR_HWOT(3) | FCTR_LWOT(8)); /* Flow Control : High/Low Water */
- DM9000_iow(DM9000_FCR, 0x0); /* SH FIXME: This looks strange! Flow Control */
- DM9000_iow(DM9000_SMCR, 0); /* Special Mode */
- DM9000_iow(DM9000_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END); /* clear TX status */
- DM9000_iow(DM9000_ISR, 0x0f); /* Clear interrupt status */
+ /* Program operating register, only intern phy supported by now */
+ DM9000_iow(DM9000_NCR, 0x0);
+ /* TX Polling clear */
+ DM9000_iow(DM9000_TCR, 0);
+ /* Less 3Kb, 200us */
+ DM9000_iow(DM9000_BPTR, 0x3f);
+ /* Flow Control : High/Low Water */
+ DM9000_iow(DM9000_FCTR, FCTR_HWOT(3) | FCTR_LWOT(8));
+ /* SH FIXME: This looks strange! Flow Control */
+ DM9000_iow(DM9000_FCR, 0x0);
+ /* Special Mode */
+ DM9000_iow(DM9000_SMCR, 0);
+ /* clear TX status */
+ DM9000_iow(DM9000_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END);
+ /* Clear interrupt status */
+ DM9000_iow(DM9000_ISR, 0x0f);
/* Set Node address */
#ifndef CONFIG_AT91SAM9261EK
@@ -333,8 +505,11 @@ eth_init(bd_t * bd)
DM9000_DBG("\n");
/* Activate DM9000 */
- DM9000_iow(DM9000_RCR, RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN); /* RX enable */
- DM9000_iow(DM9000_IMR, IMR_PAR); /* Enable TX/RX interrupt mask */
+ /* RX enable */
+ DM9000_iow(DM9000_RCR, RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN);
+ /* Enable TX/RX interrupt mask */
+ DM9000_iow(DM9000_IMR, IMR_PAR);
+
i = 0;
while (!(phy_read(1) & 0x20)) { /* autonegation complete bit */
udelay(1000);
@@ -376,54 +551,37 @@ eth_init(bd_t * bd)
int
eth_send(volatile void *packet, int length)
{
- char *data_ptr;
- u32 tmplen, i;
int tmo;
- DM9000_DBG("eth_send: length: %d\n", length);
- for (i = 0; i < length; i++) {
- if (i % 8 == 0)
- DM9000_DBG("\nSend: 02x: ", i);
- DM9000_DBG("%02x ", ((unsigned char *) packet)[i]);
- } DM9000_DBG("\n");
-
- /* Move data to DM9000 TX RAM */
- data_ptr = (char *) packet;
- DM9000_outb(DM9000_MWCMD, DM9000_IO);
+ struct board_info *db = &dm9000_info;
-#ifdef CONFIG_DM9000_USE_8BIT
- /* Byte mode */
- for (i = 0; i < length; i++)
- DM9000_outb((data_ptr[i] & 0xff), DM9000_DATA);
+ DM9000_DMP_PACKET("eth_send", packet, length);
-#endif /* */
-#ifdef CONFIG_DM9000_USE_16BIT
- tmplen = (length + 1) / 2;
- for (i = 0; i < tmplen; i++)
- DM9000_outw(((u16 *) data_ptr)[i], DM9000_DATA);
+ DM9000_iow(DM9000_ISR, IMR_PTM); /* Clear Tx bit in ISR */
-#endif /* */
-#ifdef CONFIG_DM9000_USE_32BIT
- tmplen = (length + 3) / 4;
- for (i = 0; i < tmplen; i++)
- DM9000_outl(((u32 *) data_ptr)[i], DM9000_DATA);
+ /* Move data to DM9000 TX RAM */
+ DM9000_outb(DM9000_MWCMD, DM9000_IO); /* Prepare for TX-data */
-#endif /* */
+ /* push the data to the TX-fifo */
+ (db->outblk)(packet, length);
/* Set TX length to DM9000 */
DM9000_iow(DM9000_TXPLL, length & 0xff);
DM9000_iow(DM9000_TXPLH, (length >> 8) & 0xff);
/* Issue TX polling command */
- DM9000_iow(DM9000_TCR, TCR_TXREQ); /* Cleared after TX complete */
+ DM9000_iow(DM9000_TCR, TCR_TXREQ); /* Cleared after TX complete */
/* wait for end of transmission */
tmo = get_timer(0) + 5 * CFG_HZ;
- while (DM9000_ior(DM9000_TCR) & TCR_TXREQ) {
+ while ( !(DM9000_ior(DM9000_NSR) & (NSR_TX1END | NSR_TX2END)) ||
+ !(DM9000_ior(DM9000_ISR) & IMR_PTM) ) {
if (get_timer(0) >= tmo) {
printf("transmission timeout\n");
break;
}
}
+ DM9000_iow(DM9000_ISR, IMR_PTM); /* Clear Tx bit in ISR */
+
DM9000_DBG("transmit done\n\n");
return 0;
}
@@ -452,86 +610,67 @@ eth_rx(void)
{
u8 rxbyte, *rdptr = (u8 *) NetRxPackets[0];
u16 RxStatus, RxLen = 0;
- u32 tmplen, i;
-#ifdef CONFIG_DM9000_USE_32BIT
- u32 tmpdata;
-#endif
+ struct board_info *db = &dm9000_info;
- /* Check packet ready or not */
- DM9000_ior(DM9000_MRCMDX); /* Dummy read */
- rxbyte = DM9000_inb(DM9000_DATA); /* Got most updated data */
- if (rxbyte == 0)
+ /* Check packet ready or not, we must check
+ the ISR status first for DM9000A */
+ if (!(DM9000_ior(DM9000_ISR) & 0x01)) /* Rx-ISR bit must be set. */
return 0;
- /* Status check: this byte must be 0 or 1 */
- if (rxbyte > 1) {
- DM9000_iow(DM9000_RCR, 0x00); /* Stop Device */
- DM9000_iow(DM9000_ISR, 0x80); /* Stop INT request */
- DM9000_DBG("rx status check: %d\n", rxbyte);
- }
- DM9000_DBG("receiving packet\n");
-
- /* A packet ready now & Get status/length */
- DM9000_outb(DM9000_MRCMD, DM9000_IO);
+ DM9000_iow(DM9000_ISR, 0x01); /* clear PR status latched in bit 0 */
-#ifdef CONFIG_DM9000_USE_8BIT
- RxStatus = DM9000_inb(DM9000_DATA) + (DM9000_inb(DM9000_DATA) << 8);
- RxLen = DM9000_inb(DM9000_DATA) + (DM9000_inb(DM9000_DATA) << 8);
-
-#endif /* */
-#ifdef CONFIG_DM9000_USE_16BIT
- RxStatus = DM9000_inw(DM9000_DATA);
- RxLen = DM9000_inw(DM9000_DATA);
-
-#endif /* */
-#ifdef CONFIG_DM9000_USE_32BIT
- tmpdata = DM9000_inl(DM9000_DATA);
- RxStatus = tmpdata;
- RxLen = tmpdata >> 16;
+ /* There is _at least_ 1 package in the fifo, read them all */
+ for (;;) {
+ DM9000_ior(DM9000_MRCMDX); /* Dummy read */
-#endif /* */
- DM9000_DBG("rx status: 0x%04x rx len: %d\n", RxStatus, RxLen);
+ /* Get most updated data,
+ only look at bits 0:1, See application notes DM9000 */
+ rxbyte = DM9000_inb(DM9000_DATA) & 0x03;
- /* Move data from DM9000 */
- /* Read received packet from RX SRAM */
-#ifdef CONFIG_DM9000_USE_8BIT
- for (i = 0; i < RxLen; i++)
- rdptr[i] = DM9000_inb(DM9000_DATA);
-
-#endif /* */
-#ifdef CONFIG_DM9000_USE_16BIT
- tmplen = (RxLen + 1) / 2;
- for (i = 0; i < tmplen; i++)
- ((u16 *) rdptr)[i] = DM9000_inw(DM9000_DATA);
+ /* Status check: this byte must be 0 or 1 */
+ if (rxbyte > DM9000_PKT_RDY) {
+ DM9000_iow(DM9000_RCR, 0x00); /* Stop Device */
+ DM9000_iow(DM9000_ISR, 0x80); /* Stop INT request */
+ printf("DM9000 error: status check fail: 0x%x\n",
+ rxbyte);
+ return 0;
+ }
-#endif /* */
-#ifdef CONFIG_DM9000_USE_32BIT
- tmplen = (RxLen + 3) / 4;
- for (i = 0; i < tmplen; i++)
- ((u32 *) rdptr)[i] = DM9000_inl(DM9000_DATA);
+ if (rxbyte != DM9000_PKT_RDY)
+ return 0; /* No packet received, ignore */
+
+ DM9000_DBG("receiving packet\n");
+
+ /* A packet ready now & Get status/length */
+ (db->rx_status)(&RxStatus, &RxLen);
+
+ DM9000_DBG("rx status: 0x%04x rx len: %d\n", RxStatus, RxLen);
+
+ /* Move data from DM9000 */
+ /* Read received packet from RX SRAM */
+ (db->inblk)(rdptr, RxLen);
+
+ if ((RxStatus & 0xbf00) || (RxLen < 0x40)
+ || (RxLen > DM9000_PKT_MAX)) {
+ if (RxStatus & 0x100) {
+ printf("rx fifo error\n");
+ }
+ if (RxStatus & 0x200) {
+ printf("rx crc error\n");
+ }
+ if (RxStatus & 0x8000) {
+ printf("rx length error\n");
+ }
+ if (RxLen > DM9000_PKT_MAX) {
+ printf("rx length too big\n");
+ dm9000_reset();
+ }
+ } else {
+ DM9000_DMP_PACKET("eth_rx", rdptr, RxLen);
-#endif /* */
- if ((RxStatus & 0xbf00) || (RxLen < 0x40)
- || (RxLen > DM9000_PKT_MAX)) {
- if (RxStatus & 0x100) {
- printf("rx fifo error\n");
+ DM9000_DBG("passing packet to upper layer\n");
+ NetReceive(NetRxPackets[0], RxLen);
}
- if (RxStatus & 0x200) {
- printf("rx crc error\n");
- }
- if (RxStatus & 0x8000) {
- printf("rx length error\n");
- }
- if (RxLen > DM9000_PKT_MAX) {
- printf("rx length too big\n");
- dm9000_reset();
- }
- } else {
-
- /* Pass to upper layer */
- DM9000_DBG("passing packet to upper layer\n");
- NetReceive(NetRxPackets[0], RxLen);
- return RxLen;
}
return 0;
}
@@ -592,12 +731,12 @@ phy_read(int reg)
/* Fill the phyxcer register into REG_0C */
DM9000_iow(DM9000_EPAR, DM9000_PHY | reg);
DM9000_iow(DM9000_EPCR, 0xc); /* Issue phyxcer read command */
- udelay(100); /* Wait read complete */
+ udelay(100); /* Wait read complete */
DM9000_iow(DM9000_EPCR, 0x0); /* Clear phyxcer read command */
val = (DM9000_ior(DM9000_EPDRH) << 8) | DM9000_ior(DM9000_EPDRL);
/* The read data keeps on REG_0D & REG_0E */
- DM9000_DBG("phy_read(%d): %d\n", reg, val);
+ DM9000_DBG("phy_read(0x%x): 0x%x\n", reg, val);
return val;
}
@@ -615,8 +754,7 @@ phy_write(int reg, u16 value)
DM9000_iow(DM9000_EPDRL, (value & 0xff));
DM9000_iow(DM9000_EPDRH, ((value >> 8) & 0xff));
DM9000_iow(DM9000_EPCR, 0xa); /* Issue phyxcer write command */
- udelay(500); /* Wait write complete */
+ udelay(500); /* Wait write complete */
DM9000_iow(DM9000_EPCR, 0x0); /* Clear phyxcer write command */
- DM9000_DBG("phy_write(reg:%d, value:%d)\n", reg, value);
+ DM9000_DBG("phy_write(reg:0x%x, value:0x%x)\n", reg, value);
}
-#endif /* CONFIG_DRIVER_DM9000 */
diff --git a/drivers/net/e1000.c b/drivers/net/e1000.c
index c53c226..c31029a 100644
--- a/drivers/net/e1000.c
+++ b/drivers/net/e1000.c
@@ -44,9 +44,6 @@ tested on both gig copper and gig fiber boards
#include "e1000.h"
-#if defined(CONFIG_CMD_NET) \
- && defined(CONFIG_NET_MULTI) && defined(CONFIG_E1000)
-
#define TOUT_LOOP 100000
#undef virt_to_bus
@@ -83,6 +80,7 @@ static struct pci_device_id supported[] = {
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82546EB_FIBER},
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82540EM_LOM},
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82541ER},
+ {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82541GI_LF},
};
/* Function forward declarations */
@@ -646,6 +644,7 @@ e1000_set_mac_type(struct e1000_hw *hw)
hw->mac_type = e1000_82546;
break;
case E1000_DEV_ID_82541ER:
+ case E1000_DEV_ID_82541GI_LF:
hw->mac_type = e1000_82541_rev_2;
break;
default:
@@ -3059,5 +3058,3 @@ e1000_initialize(bd_t * bis)
}
return 1;
}
-
-#endif
diff --git a/drivers/net/e1000.h b/drivers/net/e1000.h
index 851467d..23b2eb9 100644
--- a/drivers/net/e1000.h
+++ b/drivers/net/e1000.h
@@ -222,7 +222,8 @@ struct e1000_phy_stats {
#define E1000_DEV_ID_82546EB_COPPER 0x1010
#define E1000_DEV_ID_82546EB_FIBER 0x1012
#define E1000_DEV_ID_82541ER 0x1078
-#define NUM_DEV_IDS 14
+#define E1000_DEV_ID_82541GI_LF 0x107C
+#define NUM_DEV_IDS 15
#define NODE_ADDRESS_SIZE 6
#define ETH_LENGTH_OF_ADDRESS 6
diff --git a/drivers/net/eepro100.c b/drivers/net/eepro100.c
index 96ed271..9de0fb5 100644
--- a/drivers/net/eepro100.c
+++ b/drivers/net/eepro100.c
@@ -30,9 +30,6 @@
#undef DEBUG
-#if defined(CONFIG_CMD_NET) \
- && defined(CONFIG_NET_MULTI) && defined(CONFIG_EEPRO100)
-
/* Ethernet chip registers.
*/
#define SCBStatus 0 /* Rx/Command Unit Status *Word* */
@@ -944,5 +941,3 @@ static void read_hw_addr (struct eth_device *dev, bd_t * bis)
#endif
}
}
-
-#endif
diff --git a/drivers/net/enc28j60.c b/drivers/net/enc28j60.c
index 98303ac..5c24b0d 100644
--- a/drivers/net/enc28j60.c
+++ b/drivers/net/enc28j60.c
@@ -17,7 +17,6 @@
#include <config.h>
#include <common.h>
-#ifdef CONFIG_ENC28J60
#include <net.h>
#include <asm/arch/hardware.h>
#include <asm/arch/spi.h>
@@ -979,5 +978,3 @@ static void phyWrite(unsigned char addr, unsigned short data)
}
}
}
-
-#endif /* CONFIG_ENC28J60 */
diff --git a/drivers/net/fsl_mcdmafec.c b/drivers/net/fsl_mcdmafec.c
index 2ef91f2..f2bdba6 100644
--- a/drivers/net/fsl_mcdmafec.c
+++ b/drivers/net/fsl_mcdmafec.c
@@ -31,7 +31,6 @@
#include <net.h>
#include <miiphy.h>
-#ifdef CONFIG_FSLDMAFEC
#undef ET_DEBUG
#undef MII_DEBUG
@@ -49,7 +48,6 @@
#define BD_ENET_RX_ERR (BD_ENET_RX_LG | BD_ENET_RX_NO | BD_ENET_RX_CR | \
BD_ENET_RX_OV | BD_ENET_RX_TR)
-#if defined(CONFIG_CMD_NET) && defined(CONFIG_NET_MULTI)
#include <asm/immap.h>
#include <asm/fsl_mcdmafec.h>
@@ -586,6 +584,3 @@ int mcdmafec_initialize(bd_t * bis)
return 1;
}
-
-#endif /* CONFIG_CMD_NET && CONFIG_NET_MULTI */
-#endif /* CONFIG_FSLDMAFEC */
diff --git a/drivers/net/inca-ip_sw.c b/drivers/net/inca-ip_sw.c
index e4aaed6..d852a15 100644
--- a/drivers/net/inca-ip_sw.c
+++ b/drivers/net/inca-ip_sw.c
@@ -26,9 +26,6 @@
#include <common.h>
-#if defined(CONFIG_CMD_NET) \
- && defined(CONFIG_NET_MULTI) && defined(CONFIG_INCA_IP_SWITCH)
-
#include <malloc.h>
#include <net.h>
#include <asm/inca-ip.h>
@@ -234,7 +231,7 @@ static int inca_switch_init(struct eth_device *dev, bd_t * bis)
/* Initialize the descriptor rings.
*/
for (i = 0; i < NUM_RX_DESC; i++) {
- inca_rx_descriptor_t * rx_desc = KSEG1ADDR(&rx_ring[i]);
+ inca_rx_descriptor_t * rx_desc = (inca_rx_descriptor_t *)CKSEG1ADDR(&rx_ring[i]);
memset(rx_desc, 0, sizeof(rx_ring[i]));
/* Set maximum size of receive buffer.
@@ -252,14 +249,14 @@ static int inca_switch_init(struct eth_device *dev, bd_t * bis)
/* Let the last descriptor point to the first
* one.
*/
- rx_desc->nextRxDescPtr = KSEG1ADDR((u32)rx_ring);
+ rx_desc->nextRxDescPtr = (u32)CKSEG1ADDR(rx_ring);
} else {
/* Set the address of the next descriptor.
*/
- rx_desc->nextRxDescPtr = (u32)KSEG1ADDR(&rx_ring[i+1]);
+ rx_desc->nextRxDescPtr = (u32)CKSEG1ADDR(&rx_ring[i+1]);
}
- rx_desc->RxDataPtr = (u32)KSEG1ADDR(NetRxPackets[i]);
+ rx_desc->RxDataPtr = (u32)CKSEG1ADDR(NetRxPackets[i]);
}
#if 0
@@ -268,7 +265,7 @@ static int inca_switch_init(struct eth_device *dev, bd_t * bis)
#endif
for (i = 0; i < NUM_TX_DESC; i++) {
- inca_tx_descriptor_t * tx_desc = KSEG1ADDR(&tx_ring[i]);
+ inca_tx_descriptor_t * tx_desc = (inca_tx_descriptor_t *)CKSEG1ADDR(&tx_ring[i]);
memset(tx_desc, 0, sizeof(tx_ring[i]));
@@ -282,11 +279,11 @@ static int inca_switch_init(struct eth_device *dev, bd_t * bis)
/* Let the last descriptor point to the
* first one.
*/
- tx_desc->nextTxDescPtr = KSEG1ADDR((u32)tx_ring);
+ tx_desc->nextTxDescPtr = (u32)CKSEG1ADDR(tx_ring);
} else {
/* Set the address of the next descriptor.
*/
- tx_desc->nextTxDescPtr = (u32)KSEG1ADDR(&tx_ring[i+1]);
+ tx_desc->nextTxDescPtr = (u32)CKSEG1ADDR(&tx_ring[i+1]);
}
}
@@ -346,7 +343,7 @@ static int inca_switch_send(struct eth_device *dev, volatile void *packet, int l
int res = -1;
u32 command;
u32 regValue;
- inca_tx_descriptor_t * tx_desc = KSEG1ADDR(&tx_ring[tx_new]);
+ inca_tx_descriptor_t * tx_desc = (inca_tx_descriptor_t *)CKSEG1ADDR(&tx_ring[tx_new]);
#if 0
printf("Entered inca_switch_send()\n");
@@ -365,7 +362,7 @@ static int inca_switch_send(struct eth_device *dev, volatile void *packet, int l
}
if (tx_old_hold >= 0) {
- KSEG1ADDR(&tx_ring[tx_old_hold])->params.field.HOLD = 1;
+ ((inca_tx_descriptor_t *)CKSEG1ADDR(&tx_ring[tx_old_hold]))->params.field.HOLD = 1;
}
tx_old_hold = tx_hold;
@@ -376,7 +373,7 @@ static int inca_switch_send(struct eth_device *dev, volatile void *packet, int l
tx_desc->TxDataPtr = (u32)packet;
tx_desc->params.field.NBA = length;
- KSEG1ADDR(&tx_ring[tx_hold])->params.field.HOLD = 0;
+ ((inca_tx_descriptor_t *)CKSEG1ADDR(&tx_ring[tx_hold]))->params.field.HOLD = 0;
tx_hold = tx_new;
tx_new = (tx_new + 1) % NUM_TX_DESC;
@@ -397,7 +394,7 @@ static int inca_switch_send(struct eth_device *dev, volatile void *packet, int l
DMA_WRITE_REG(INCA_IP_DMA_DMA_TXCCR0, regValue);
#if 1
- for(i = 0; KSEG1ADDR(&tx_ring[tx_hold])->C == 0; i++) {
+ for(i = 0; ((inca_tx_descriptor_t *)CKSEG1ADDR(&tx_ring[tx_hold]))->C == 0; i++) {
if (i >= TOUT_LOOP) {
printf("%s: tx buffer not ready\n", dev->name);
goto Done;
@@ -423,7 +420,7 @@ static int inca_switch_recv(struct eth_device *dev)
#endif
for (;;) {
- rx_desc = KSEG1ADDR(&rx_ring[rx_new]);
+ rx_desc = (inca_rx_descriptor_t *)CKSEG1ADDR(&rx_ring[rx_new]);
if (rx_desc->status.field.C == 0) {
break;
@@ -456,7 +453,7 @@ static int inca_switch_recv(struct eth_device *dev)
#if 0
printf("Received %d bytes\n", length);
#endif
- NetReceive((void*)KSEG1ADDR(NetRxPackets[rx_new]), length - 4);
+ NetReceive((void*)CKSEG1ADDR(NetRxPackets[rx_new]), length - 4);
} else {
#if 1
printf("Zero length!!!\n");
@@ -464,7 +461,7 @@ static int inca_switch_recv(struct eth_device *dev)
}
- KSEG1ADDR(&rx_ring[rx_hold])->params.field.HOLD = 0;
+ ((inca_rx_descriptor_t *)CKSEG1ADDR(&rx_ring[rx_hold]))->params.field.HOLD = 0;
rx_hold = rx_new;
@@ -813,5 +810,3 @@ Fail:
return -1;
}
#endif /* CONFIG_INCA_IP_SWITCH_AMDIX */
-
-#endif
diff --git a/drivers/net/ks8695eth.c b/drivers/net/ks8695eth.c
index b598dd7..7f3e0c2 100644
--- a/drivers/net/ks8695eth.c
+++ b/drivers/net/ks8695eth.c
@@ -21,8 +21,6 @@
/****************************************************************************/
#include <common.h>
-
-#ifdef CONFIG_DRIVER_KS8695ETH
#include <malloc.h>
#include <net.h>
#include <asm/io.h>
@@ -234,5 +232,3 @@ int eth_send(volatile void *packet, int len)
return len;
}
-
-#endif /* CONFIG_DRIVER_KS8695ETH */
diff --git a/drivers/net/lan91c96.c b/drivers/net/lan91c96.c
index 51cfb7e..c23a400 100644
--- a/drivers/net/lan91c96.c
+++ b/drivers/net/lan91c96.c
@@ -63,10 +63,6 @@
#include "lan91c96.h"
#include <net.h>
-#ifdef CONFIG_DRIVER_LAN91C96
-
-#if defined(CONFIG_CMD_NET)
-
/*------------------------------------------------------------------------
*
* Configuration options, for the experienced user to change.
@@ -865,9 +861,6 @@ static int smc_hw_init ()
}
#endif /* 0 */
-#endif /* CONFIG_CMD_NET */
-
-
/* smc_get_ethaddr (bd_t * bd)
*
* This checks both the environment and the ROM for an ethernet address. If
@@ -963,5 +956,3 @@ int get_rom_mac (unsigned char *v_rom_mac)
return (1);
#endif
}
-
-#endif /* CONFIG_DRIVER_LAN91C96 */
diff --git a/drivers/net/macb.c b/drivers/net/macb.c
index e5733f6..aa39284 100644
--- a/drivers/net/macb.c
+++ b/drivers/net/macb.c
@@ -17,9 +17,6 @@
*/
#include <common.h>
-#if defined(CONFIG_MACB) \
- && (defined(CONFIG_CMD_NET) || defined(CONFIG_CMD_MII))
-
/*
* The u-boot networking stack is a little weird. It seems like the
* networking core allocates receive buffers up front without any
@@ -593,5 +590,3 @@ int miiphy_write(unsigned char addr, unsigned char reg, unsigned short value)
}
#endif
-
-#endif /* CONFIG_MACB */
diff --git a/drivers/net/mcffec.c b/drivers/net/mcffec.c
index 5ab4726..58ed5e3 100644
--- a/drivers/net/mcffec.c
+++ b/drivers/net/mcffec.c
@@ -27,8 +27,6 @@
#include <common.h>
#include <malloc.h>
-#ifdef CONFIG_MCFFEC
-
#include <asm/fec.h>
#include <asm/immap.h>
@@ -51,8 +49,6 @@
DECLARE_GLOBAL_DATA_PTR;
-#if defined(CONFIG_CMD_NET) && defined(CONFIG_NET_MULTI)
-
struct fec_info_s fec_info[] = {
#ifdef CFG_FEC0_IOBASE
{
@@ -125,11 +121,17 @@ void setFecDuplexSpeed(volatile fec_t * fecp, bd_t * bd, int dup_spd)
}
if ((dup_spd & 0xFFFF) == _100BASET) {
+#ifdef CONFIG_MCF5445x
+ fecp->rcr &= ~0x200; /* disabled 10T base */
+#endif
#ifdef MII_DEBUG
printf("100Mbps\n");
#endif
bd->bi_ethspeed = 100;
} else {
+#ifdef CONFIG_MCF5445x
+ fecp->rcr |= 0x200; /* enabled 10T base */
+#endif
#ifdef MII_DEBUG
printf("10Mbps\n");
#endif
@@ -599,6 +601,3 @@ int mcffec_initialize(bd_t * bis)
return 1;
}
-
-#endif /* CONFIG_CMD_NET, FEC_ENET & NET_MULTI */
-#endif /* CONFIG_MCFFEC */
diff --git a/drivers/net/natsemi.c b/drivers/net/natsemi.c
index a523959..4aee048 100644
--- a/drivers/net/natsemi.c
+++ b/drivers/net/natsemi.c
@@ -56,9 +56,6 @@
#include <asm/io.h>
#include <pci.h>
-#if defined(CONFIG_CMD_NET) \
- && defined(CONFIG_NET_MULTI) && defined(CONFIG_NATSEMI)
-
/* defines */
#define EEPROM_SIZE 0xb /*12 16-bit chunks, or 24 bytes*/
@@ -878,5 +875,3 @@ natsemi_disable(struct eth_device *dev)
/* Restore PME enable bit */
OUTL(dev, SavedClkRun, ClkRun);
}
-
-#endif
diff --git a/drivers/net/netarm_eth.c b/drivers/net/netarm_eth.c
index ecf45dc..c011809 100644
--- a/drivers/net/netarm_eth.c
+++ b/drivers/net/netarm_eth.c
@@ -22,15 +22,11 @@
#include <common.h>
-
-#ifdef CONFIG_DRIVER_NETARMETH
#include <command.h>
#include <net.h>
#include "netarm_eth.h"
#include <asm/arch/netarm_registers.h>
-#if defined(CONFIG_CMD_NET)
-
static int na_mii_poll_busy (void);
static void na_get_mac_addr (void)
@@ -352,7 +348,3 @@ extern int eth_send (volatile void *packet, int length)
printf ("eth_send timeout\n");
return 1;
}
-
-#endif /* CONFIG_CMD_NET */
-
-#endif /* CONFIG_DRIVER_NETARMETH */
diff --git a/drivers/net/netconsole.c b/drivers/net/netconsole.c
index 69089f9..b2ee5ea 100644
--- a/drivers/net/netconsole.c
+++ b/drivers/net/netconsole.c
@@ -22,9 +22,6 @@
*/
#include <common.h>
-
-#ifdef CONFIG_NETCONSOLE
-
#include <command.h>
#include <devices.h>
#include <net.h>
@@ -263,5 +260,3 @@ int drv_nc_init (void)
return (rc == 0) ? 1 : rc;
}
-
-#endif /* CONFIG_NETCONSOLE */
diff --git a/drivers/net/ns7520_eth.c b/drivers/net/ns7520_eth.c
index a5a20df..37411df 100644
--- a/drivers/net/ns7520_eth.c
+++ b/drivers/net/ns7520_eth.c
@@ -15,8 +15,6 @@
#include <common.h>
-#if defined(CONFIG_DRIVER_NS7520_ETHERNET)
-
#include <net.h> /* NetSendPacket */
#include <asm/arch/netarm_registers.h>
#include <asm/arch/netarm_dma_module.h>
@@ -846,14 +844,11 @@ extern int ns7520_miiphy_write(char *devname, unsigned char const addr,
return (ret);
}
#endif /* defined(CONFIG_MII) */
-#endif /* CONFIG_DRIVER_NS7520_ETHERNET */
int ns7520_miiphy_initialize(bd_t *bis)
{
-#if defined(CONFIG_DRIVER_NS7520_ETHERNET)
#if defined(CONFIG_MII)
miiphy_register("ns7520phy", ns7520_miiphy_read, ns7520_miiphy_write);
#endif
-#endif
return 0;
}
diff --git a/drivers/net/ns8382x.c b/drivers/net/ns8382x.c
index c807dd4..0b9a3ae 100644
--- a/drivers/net/ns8382x.c
+++ b/drivers/net/ns8382x.c
@@ -56,9 +56,6 @@
#include <asm/io.h>
#include <pci.h>
-#if defined(CONFIG_CMD_NET) \
- && defined(CONFIG_NET_MULTI) && defined(CONFIG_NS8382X)
-
/* defines */
#define DSIZE 0x00000FFF
#define ETH_ALEN 6
@@ -859,5 +856,3 @@ ns8382x_disable(struct eth_device *dev)
/* Restore PME enable bit */
OUTL(dev, SavedClkRun, ClkRun);
}
-
-#endif
diff --git a/drivers/net/ns9750_eth.c b/drivers/net/ns9750_eth.c
index 067ff8e..0559710 100644
--- a/drivers/net/ns9750_eth.c
+++ b/drivers/net/ns9750_eth.c
@@ -37,8 +37,6 @@
#include "ns9750_eth.h" /* for Ethernet and PHY */
-#ifdef CONFIG_DRIVER_NS9750_ETHERNET
-
/* some definition to make transistion to linux easier */
#define NS9750_DRIVER_NAME "eth"
@@ -793,5 +791,3 @@ static unsigned int ns9750_mii_poll_busy (void)
return unTimeout;
}
-
-#endif /* CONFIG_DRIVER_NS9750_ETHERNET */
diff --git a/drivers/net/pcnet.c b/drivers/net/pcnet.c
index aa04e8f..a4f0214 100644
--- a/drivers/net/pcnet.c
+++ b/drivers/net/pcnet.c
@@ -45,9 +45,6 @@
#define PCNET_DEBUG2(fmt,args...)
#endif
-#if defined(CONFIG_CMD_NET) \
- && defined(CONFIG_NET_MULTI) && defined(CONFIG_PCNET)
-
#if !defined(CONF_PCNET_79C973) && defined(CONF_PCNET_79C975)
#error "Macro for PCnet chip version is not defined!"
#endif
@@ -537,4 +534,3 @@ static void pcnet_halt (struct eth_device *dev)
printf ("%s: TIMEOUT: controller reset failed\n", dev->name);
}
}
-#endif
diff --git a/drivers/net/plb2800_eth.c b/drivers/net/plb2800_eth.c
index b8cc57a..dad842c 100644
--- a/drivers/net/plb2800_eth.c
+++ b/drivers/net/plb2800_eth.c
@@ -24,10 +24,6 @@
*/
#include <common.h>
-
-#if defined(CONFIG_CMD_NET) \
- && defined(CONFIG_NET_MULTI) && defined(CONFIG_PLB2800_ETHER)
-
#include <malloc.h>
#include <net.h>
#include <asm/addrspace.h>
@@ -392,5 +388,3 @@ static unsigned char * plb2800_get_mac_addr(void)
return addr;
}
-
-#endif /* CONFIG_PLB2800_ETHER */
diff --git a/drivers/net/rtl8019.c b/drivers/net/rtl8019.c
index 9d62cab..3ddf917 100644
--- a/drivers/net/rtl8019.c
+++ b/drivers/net/rtl8019.c
@@ -32,10 +32,6 @@
#include "rtl8019.h"
#include <net.h>
-#ifdef CONFIG_DRIVER_RTL8019
-
-#if defined(CONFIG_CMD_NET)
-
/* packet page register access functions */
static unsigned char get_reg (unsigned int regno)
@@ -271,7 +267,3 @@ extern int eth_send (volatile void *packet, int length)
return 0;
}
-
-#endif /* CONFIG_CMD_NET */
-
-#endif /* CONFIG_DRIVER_RTL8019 */
diff --git a/drivers/net/rtl8139.c b/drivers/net/rtl8139.c
index 097f684..4fd20ac 100644
--- a/drivers/net/rtl8139.c
+++ b/drivers/net/rtl8139.c
@@ -77,9 +77,6 @@
#include <asm/io.h>
#include <pci.h>
-#if defined(CONFIG_CMD_NET) && defined(CONFIG_NET_MULTI) && \
- defined(CONFIG_RTL8139)
-
#define RTL_TIMEOUT 100000
#define ETH_FRAME_LEN 1514
@@ -545,4 +542,3 @@ static void rtl_disable(struct eth_device *dev)
udelay (100); /* wait 100us */
}
}
-#endif
diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c
index 6c4c9ff..7423bc0 100644
--- a/drivers/net/rtl8169.c
+++ b/drivers/net/rtl8169.c
@@ -58,9 +58,6 @@
#include <asm/io.h>
#include <pci.h>
-#if defined(CONFIG_CMD_NET) && defined(CONFIG_NET_MULTI) && \
- defined(CONFIG_RTL8169)
-
#undef DEBUG_RTL8169
#undef DEBUG_RTL8169_TX
#undef DEBUG_RTL8169_RX
@@ -887,5 +884,3 @@ int rtl8169_initialize(bd_t *bis)
}
return card_number;
}
-
-#endif
diff --git a/drivers/net/s3c4510b_eth.c b/drivers/net/s3c4510b_eth.c
index 3d9066a..6dcb244 100644
--- a/drivers/net/s3c4510b_eth.c
+++ b/drivers/net/s3c4510b_eth.c
@@ -25,9 +25,6 @@
*/
#include <common.h>
-
-#ifdef CONFIG_DRIVER_S3C4510_ETH
-
#include <command.h>
#include <net.h>
#include <asm/hardware.h>
@@ -242,5 +239,3 @@ void eth_halt(void)
/* disable MAC */
PUT_REG( REG_MACCON, ETH_HaltReg);
}
-
-#endif
diff --git a/drivers/net/smc91111.c b/drivers/net/smc91111.c
index 8061f12..e8b235b 100644
--- a/drivers/net/smc91111.c
+++ b/drivers/net/smc91111.c
@@ -65,8 +65,6 @@
#include "smc91111.h"
#include <net.h>
-#ifdef CONFIG_DRIVER_SMC91111
-
/* Use power-down feature of the chip */
#define POWER_DOWN 0
@@ -1620,4 +1618,3 @@ int get_rom_mac (uchar *v_rom_mac)
return (valid_mac ? 1 : 0);
#endif
}
-#endif /* CONFIG_DRIVER_SMC91111 */
diff --git a/drivers/net/smc911x.c b/drivers/net/smc911x.c
index 5302cb5..7555cb9 100644
--- a/drivers/net/smc911x.c
+++ b/drivers/net/smc911x.c
@@ -23,13 +23,16 @@
*/
#include <common.h>
-
-#ifdef CONFIG_DRIVER_SMC911X
-
#include <command.h>
#include <net.h>
#include <miiphy.h>
+#if defined (CONFIG_DRIVER_SMC911X_32_BIT) && \
+ defined (CONFIG_DRIVER_SMC911X_16_BIT)
+#error "SMC911X: Only one of CONFIG_DRIVER_SMC911X_32_BIT and \
+ CONFIG_DRIVER_SMC911X_16_BIT shall be set"
+#endif
+
#ifdef CONFIG_DRIVER_SMC911X_32_BIT
static inline u32 reg_read(u32 addr)
{
@@ -39,9 +42,20 @@ static inline void reg_write(u32 addr, u32 val)
{
*(volatile u32*)addr = val;
}
+#elif CONFIG_DRIVER_SMC911X_16_BIT
+static inline u32 reg_read(u32 addr)
+{
+ volatile u16 *addr_16 = (u16 *)addr;
+ return ((*addr_16 & 0x0000ffff) | (*(addr_16 + 1) << 16));
+}
+static inline void reg_write(u32 addr, u32 val)
+{
+ *(volatile u16*)addr = (u16)val;
+ *(volatile u16*)(addr + 2) = (u16)(val >> 16);
+}
#else
-#error "SMC911X: Only 32-bit bus is supported"
-#endif
+#error "SMC911X: undefined bus width"
+#endif /* CONFIG_DRIVER_SMC911X_16_BIT */
#define mdelay(n) udelay((n)*1000)
@@ -682,5 +696,3 @@ int eth_rx(void)
return 0;
}
-
-#endif /* CONFIG_DRIVER_SMC911X */
diff --git a/drivers/net/tigon3.c b/drivers/net/tigon3.c
index 5f6a4ec..ab448b0 100644
--- a/drivers/net/tigon3.c
+++ b/drivers/net/tigon3.c
@@ -12,8 +12,7 @@
/******************************************************************************/
#include <common.h>
#include <asm/types.h>
-#if defined(CONFIG_CMD_NET) && !defined(CONFIG_NET_MULTI) && \
- defined(CONFIG_TIGON3)
+
#ifdef CONFIG_BMW
#include <mpc824x.h>
#endif
@@ -5695,5 +5694,3 @@ LM_DmaTest (PLM_DEVICE_BLOCK pDevice, PLM_UINT8 pBufferVirt,
}
return LM_STATUS_SUCCESS;
}
-
-#endif
diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index c7af930..6e0f2c6 100644
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
@@ -17,7 +17,6 @@
#include <net.h>
#include <command.h>
-#if defined(CONFIG_TSEC_ENET)
#include "tsec.h"
#include "miiphy.h"
@@ -1128,6 +1127,36 @@ struct phy_info phy_info_M88E1111S = {
},
};
+struct phy_info phy_info_M88E1118 = {
+ 0x01410e1,
+ "Marvell 88E1118",
+ 4,
+ (struct phy_cmd[]){ /* config */
+ /* Reset and configure the PHY */
+ {MIIM_CONTROL, MIIM_CONTROL_RESET, NULL},
+ {0x16, 0x0002, NULL}, /* Change Page Number */
+ {0x15, 0x1070, NULL}, /* Delay RGMII TX and RX */
+ {MIIM_GBIT_CONTROL, MIIM_GBIT_CONTROL_INIT, NULL},
+ {MIIM_ANAR, MIIM_ANAR_INIT, NULL},
+ {MIIM_CONTROL, MIIM_CONTROL_RESET, NULL},
+ {MIIM_CONTROL, MIIM_CONTROL_INIT, &mii_cr_init},
+ {miim_end,}
+ },
+ (struct phy_cmd[]){ /* startup */
+ {0x16, 0x0000, NULL}, /* Change Page Number */
+ /* Status is read once to clear old link state */
+ {MIIM_STATUS, miim_read, NULL},
+ /* Auto-negotiate */
+ /* Read the status */
+ {MIIM_88E1011_PHY_STATUS, miim_read,
+ &mii_parse_88E1011_psr},
+ {miim_end,}
+ },
+ (struct phy_cmd[]){ /* shutdown */
+ {miim_end,}
+ },
+};
+
static unsigned int m88e1145_setmode(uint mii_reg, struct tsec_private *priv)
{
uint mii_data = read_phy_reg(priv, mii_reg);
@@ -1492,6 +1521,7 @@ struct phy_info *phy_info[] = {
&phy_info_BCM5464S,
&phy_info_M88E1011S,
&phy_info_M88E1111S,
+ &phy_info_M88E1118,
&phy_info_M88E1145,
&phy_info_M88E1149S,
&phy_info_dm9161,
@@ -1710,5 +1740,3 @@ tsec_mcast_addr (struct eth_device *dev, u8 mcast_mac, u8 set)
return 0;
}
#endif /* Multicast TFTP ? */
-
-#endif /* CONFIG_TSEC_ENET */
diff --git a/drivers/net/tsi108_eth.c b/drivers/net/tsi108_eth.c
index a09115e..57c0dc3 100644
--- a/drivers/net/tsi108_eth.c
+++ b/drivers/net/tsi108_eth.c
@@ -27,9 +27,6 @@
#include <config.h>
-#if defined(CONFIG_CMD_NET) && defined(CONFIG_NET_MULTI) \
- && defined(CONFIG_TSI108_ETH)
-
#if !defined(CONFIG_TSI108_ETH_NUM_PORTS) || (CONFIG_TSI108_ETH_NUM_PORTS > 2)
#error "CONFIG_TSI108_ETH_NUM_PORTS must be defined as 1 or 2"
#endif
@@ -1032,5 +1029,3 @@ static void tsi108_eth_halt (struct eth_device *dev)
/* Put MAC into reset state. */
reg_MAC_CONFIG_1(base) = MAC_CONFIG_1_SOFT_RESET;
}
-
-#endif
diff --git a/drivers/net/uli526x.c b/drivers/net/uli526x.c
index 79d29ae..7145b72 100644
--- a/drivers/net/uli526x.c
+++ b/drivers/net/uli526x.c
@@ -22,9 +22,6 @@
/* some kernel function compatible define */
-#if defined(CONFIG_CMD_NET) && defined(CONFIG_NET_MULTI) && \
- defined(CONFIG_ULI526X)
-
#undef DEBUG
/* Board/System/Debug information/definition */
@@ -993,4 +990,3 @@ static void set_mac_addr(struct eth_device *dev)
udelay(10);
return;
}
-#endif
diff --git a/drivers/net/vsc7385.c b/drivers/net/vsc7385.c
index 4095bce..4e7259f 100644
--- a/drivers/net/vsc7385.c
+++ b/drivers/net/vsc7385.c
@@ -13,9 +13,6 @@
*/
#include <config.h>
-
-#ifdef CONFIG_VSC7385_ENET
-
#include <common.h>
#include <asm/io.h>
#include <asm/errno.h>
@@ -97,5 +94,3 @@ int vsc7385_upload_firmware(void *firmware, unsigned int size)
return 0;
}
-
-#endif
diff --git a/drivers/pci/tsi108_pci.c b/drivers/pci/tsi108_pci.c
index d5f11e4..4f02cb8 100644
--- a/drivers/pci/tsi108_pci.c
+++ b/drivers/pci/tsi108_pci.c
@@ -33,8 +33,9 @@
#include <pci.h>
#include <asm/io.h>
#include <tsi108.h>
-#ifdef CONFIG_OF_FLAT_TREE
-#include <ft_build.h>
+#if defined(CONFIG_OF_LIBFDT)
+#include <libfdt.h>
+#include <fdt_support.h>
#endif
struct pci_controller local_hose;
@@ -162,20 +163,24 @@ void pci_init_board (void)
return;
}
-#ifdef CONFIG_OF_FLAT_TREE
-void
-ft_pci_setup (void *blob, bd_t *bd)
+#if defined(CONFIG_OF_LIBFDT)
+void ft_pci_setup(void *blob, bd_t *bd)
{
- u32 *p;
- int len;
-
- p = (u32 *)ft_get_prop (blob, "/" OF_TSI "/pci@1000/bus-range", &len);
- if (p != NULL) {
- p[0] = local_hose.first_busno;
- p[1] = local_hose.last_busno;
+ int nodeoffset;
+ int tmp[2];
+ const char *path;
+
+ nodeoffset = fdt_path_offset(blob, "/aliases");
+ if (nodeoffset >= 0) {
+ path = fdt_getprop(blob, nodeoffset, "pci", NULL);
+ if (path) {
+ tmp[0] = cpu_to_be32(local_hose.first_busno);
+ tmp[1] = cpu_to_be32(local_hose.last_busno);
+ do_fixup_by_path(blob, path, "bus-range",
+ &tmp, sizeof(tmp), 1);
+ }
}
-
}
-#endif
+#endif /* CONFIG_OF_LIBFDT */
#endif /* CONFIG_TSI108_PCI */