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-rw-r--r--drivers/i2c/soft_i2c.c6
-rw-r--r--drivers/misc/fsl_law.c2
-rw-r--r--drivers/qe/qe.c9
-rw-r--r--drivers/qe/qe.h1
-rw-r--r--drivers/rtc/Makefile1
-rw-r--r--drivers/rtc/rtc4543.c118
-rw-r--r--drivers/twserial/Makefile46
-rw-r--r--drivers/twserial/soft_tws.c111
8 files changed, 288 insertions, 6 deletions
diff --git a/drivers/i2c/soft_i2c.c b/drivers/i2c/soft_i2c.c
index ed5f5b2..185634d 100644
--- a/drivers/i2c/soft_i2c.c
+++ b/drivers/i2c/soft_i2c.c
@@ -51,14 +51,12 @@
DECLARE_GLOBAL_DATA_PTR;
#endif
-
/*-----------------------------------------------------------------------
* Definitions
*/
#define RETRIES 0
-
#define I2C_ACK 0 /* PD_SDA level to ack a byte */
#define I2C_NOACK 1 /* PD_SDA level to noack a byte */
@@ -154,7 +152,6 @@ static void send_stop(void)
I2C_TRISTATE;
}
-
/*-----------------------------------------------------------------------
* ack should be I2C_ACK or I2C_NOACK
*/
@@ -174,7 +171,6 @@ static void send_ack(int ack)
I2C_DELAY;
}
-
/*-----------------------------------------------------------------------
* Send 8 bits and look for an acknowledgement.
*/
@@ -246,6 +242,7 @@ int i2c_set_bus_num(unsigned int bus)
#endif
return 0;
}
+#endif
/* TODO: add 100/400k switching */
unsigned int i2c_get_bus_speed(void)
@@ -260,7 +257,6 @@ int i2c_set_bus_speed(unsigned int speed)
return 0;
}
-#endif
/*-----------------------------------------------------------------------
* if ack == I2C_ACK, ACK the byte so can continue reading, else
diff --git a/drivers/misc/fsl_law.c b/drivers/misc/fsl_law.c
index 58340c1..be43a3e 100644
--- a/drivers/misc/fsl_law.c
+++ b/drivers/misc/fsl_law.c
@@ -35,7 +35,7 @@ DECLARE_GLOBAL_DATA_PTR;
defined(CONFIG_MPC8560) || defined(CONFIG_MPC8555)
#define FSL_HW_NUM_LAWS 8
#elif defined(CONFIG_MPC8548) || defined(CONFIG_MPC8544) || \
- defined(CONFIG_MPC8568) || \
+ defined(CONFIG_MPC8568) || defined(CONFIG_MPC8569) || \
defined(CONFIG_MPC8641) || defined(CONFIG_MPC8610)
#define FSL_HW_NUM_LAWS 10
#elif defined(CONFIG_MPC8536) || defined(CONFIG_MPC8572) || \
diff --git a/drivers/qe/qe.c b/drivers/qe/qe.c
index e90a4a5..ea5a14b 100644
--- a/drivers/qe/qe.c
+++ b/drivers/qe/qe.c
@@ -161,6 +161,15 @@ void qe_init(uint qe_base)
/* Init the QE IMMR base */
qe_immr = (qe_map_t *)qe_base;
+#ifdef CONFIG_SYS_QE_FW_ADDR
+ /* Upload microcode to IRAM for those SOCs which do not have ROM in QE.
+ */
+ qe_upload_firmware((const struct qe_firmware *) CONFIG_SYS_QE_FW_ADDR);
+
+ /* enable the microcode in IRAM */
+ out_be32(&qe_immr->iram.iready,QE_IRAM_READY);
+#endif
+
gd->mp_alloc_base = QE_DATAONLY_BASE;
gd->mp_alloc_top = gd->mp_alloc_base + QE_DATAONLY_SIZE;
diff --git a/drivers/qe/qe.h b/drivers/qe/qe.h
index a55555f..d78edba 100644
--- a/drivers/qe/qe.h
+++ b/drivers/qe/qe.h
@@ -230,6 +230,7 @@ typedef enum qe_clock {
/* I-RAM */
#define QE_IRAM_IADD_AIE 0x80000000 /* Auto Increment Enable */
#define QE_IRAM_IADD_BADDR 0x00080000 /* Base Address */
+#define QE_IRAM_READY 0x80000000
/* Structure that defines QE firmware binary files.
*
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 3831dd9..822dc1a 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -55,6 +55,7 @@ COBJS-$(CONFIG_RTC_MPC8xx) += mpc8xx.o
COBJS-$(CONFIG_RTC_PCF8563) += pcf8563.o
COBJS-$(CONFIG_RTC_PL031) += pl031.o
COBJS-$(CONFIG_RTC_RS5C372A) += rs5c372.o
+COBJS-$(CONFIG_RTC_RTC4543) += rtc4543.o
COBJS-$(CONFIG_RTC_RX8025) += rx8025.o
COBJS-$(CONFIG_RTC_S3C24X0) += s3c24x0_rtc.o
COBJS-$(CONFIG_RTC_S3C44B0) += s3c44b0_rtc.o
diff --git a/drivers/rtc/rtc4543.c b/drivers/rtc/rtc4543.c
new file mode 100644
index 0000000..242d9bc
--- /dev/null
+++ b/drivers/rtc/rtc4543.c
@@ -0,0 +1,118 @@
+/*
+ * (C) Copyright 2008, 2009
+ * Andreas Pfefferle, DENX Software Engineering, ap@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <asm/io.h>
+#include <common.h>
+#include <command.h>
+#include <config.h>
+#include <bcd.h>
+#include <rtc.h>
+#include <tws.h>
+
+#if defined(CONFIG_CMD_DATE)
+
+/*
+ * Note: The acrobatics below is due to the hideously ingenius idea of
+ * the chip designers. As the chip does not allow register
+ * addressing, all values need to be read and written in one go. Sure
+ * enough, the 'wday' field (0-6) is transferred using the economic
+ * number of 4 bits right in the middle of the packet.....
+ */
+
+int rtc_get(struct rtc_time *tm)
+{
+ int rel = 0;
+ uchar buffer[7];
+
+ memset(buffer, 0, 7);
+
+ /* Read 52 bits into our buffer */
+ tws_read(buffer, 52);
+
+ tm->tm_sec = BCD2BIN( buffer[0] & 0x7F);
+ tm->tm_min = BCD2BIN( buffer[1] & 0x7F);
+ tm->tm_hour = BCD2BIN( buffer[2] & 0x3F);
+ tm->tm_wday = BCD2BIN( buffer[3] & 0x07);
+ tm->tm_mday = BCD2BIN((buffer[3] & 0xF0) >> 4 | (buffer[4] & 0x0F) << 4);
+ tm->tm_mon = BCD2BIN((buffer[4] & 0x30) >> 4 | (buffer[5] & 0x0F) << 4);
+ tm->tm_year = BCD2BIN((buffer[5] & 0xF0) >> 4 | (buffer[6] & 0x0F) << 4) + 2000;
+ tm->tm_yday = 0;
+ tm->tm_isdst = 0;
+
+ if (tm->tm_sec & 0x80) {
+ puts("### Warning: RTC Low Voltage - date/time not reliable\n");
+ rel = -1;
+ }
+
+ debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
+ tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
+ tm->tm_hour, tm->tm_min, tm->tm_sec);
+
+ return rel;
+}
+
+int rtc_set(struct rtc_time *tm)
+{
+ uchar buffer[7];
+ uchar tmp;
+
+ debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
+ tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
+ tm->tm_hour, tm->tm_min, tm->tm_sec);
+
+ memset(buffer, 0, 7);
+ buffer[0] = BIN2BCD(tm->tm_sec);
+ buffer[1] = BIN2BCD(tm->tm_min);
+ buffer[2] = BIN2BCD(tm->tm_hour);
+ buffer[3] = BIN2BCD(tm->tm_wday);
+ tmp = BIN2BCD(tm->tm_mday);
+ buffer[3] |= (tmp & 0x0F) << 4;
+ buffer[4] = (tmp & 0xF0) >> 4;
+ tmp = BIN2BCD(tm->tm_mon);
+ buffer[4] |= (tmp & 0x0F) << 4;
+ buffer[5] = (tmp & 0xF0) >> 4;
+ tmp = BIN2BCD(tm->tm_year % 100);
+ buffer[5] |= (tmp & 0x0F) << 4;
+ buffer[6] = (tmp & 0xF0) >> 4;
+
+ /* Write the resulting 52 bits to device */
+ tws_write(buffer, 52);
+
+ return 0;
+}
+
+void rtc_reset(void)
+{
+ struct rtc_time tmp;
+
+ tmp.tm_sec = 0;
+ tmp.tm_min = 0;
+ tmp.tm_hour = 0;
+ tmp.tm_wday = 4;
+ tmp.tm_mday = 1;
+ tmp.tm_mon = 1;
+ tmp.tm_year = 2000;
+ rtc_set(&tmp);
+}
+
+#endif
diff --git a/drivers/twserial/Makefile b/drivers/twserial/Makefile
new file mode 100644
index 0000000..0b059f3
--- /dev/null
+++ b/drivers/twserial/Makefile
@@ -0,0 +1,46 @@
+#
+# (C) Copyright 2009
+# Detlev Zundel, DENX Software Engineering, dzu@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB := $(obj)libtws.a
+
+COBJS-$(CONFIG_SOFT_TWS) += soft_tws.o
+
+COBJS := $(COBJS-y)
+SRCS := $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+
+all: $(LIB)
+
+$(LIB): $(obj).depend $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/drivers/twserial/soft_tws.c b/drivers/twserial/soft_tws.c
new file mode 100644
index 0000000..0b50e1d
--- /dev/null
+++ b/drivers/twserial/soft_tws.c
@@ -0,0 +1,111 @@
+/*
+ * (C) Copyright 2009
+ * Detlev Zundel, DENX Software Engineering, dzu@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#define TWS_IMPLEMENTATION
+#include <common.h>
+
+/*=====================================================================*/
+/* Public Functions */
+/*=====================================================================*/
+
+/*-----------------------------------------------------------------------
+ * Read bits
+ */
+int tws_read(uchar *buffer, int len)
+{
+ int rem = len;
+ uchar accu, shift;
+
+ debug("tws_read: buffer %p len %d\n", buffer, len);
+
+ /* Configure the data pin for input */
+ tws_data_config_output(0);
+
+ /* Disable WR, i.e. setup a read */
+ tws_wr(0);
+ udelay(1);
+
+ /* Rise CE */
+ tws_ce(1);
+ udelay(1);
+
+ for (; rem > 0; ) {
+ for (shift = 0, accu = 0;
+ (rem > 0) && (shift < 8);
+ rem--, shift++) {
+ tws_clk(1);
+ udelay(10);
+ accu |= (tws_data_read() << shift); /* LSB first */
+ tws_clk(0);
+ udelay(10);
+ }
+ *buffer++ = accu;
+ }
+
+ /* Lower CE */
+ tws_ce(0);
+
+ return len - rem;
+}
+
+
+/*-----------------------------------------------------------------------
+ * Write bits
+ */
+int tws_write(uchar *buffer, int len)
+{
+ int rem = len;
+ uchar accu, shift;
+
+ debug("tws_write: buffer %p len %d\n", buffer, len);
+
+ /* Configure the data pin for output */
+ tws_data_config_output(1);
+
+ /* Enable WR, i.e. setup a write */
+ tws_wr(1);
+ udelay(1);
+
+ /* Rise CE */
+ tws_ce(1);
+ udelay(1);
+
+ for (; rem > 0; ) {
+ for (shift = 0, accu = *buffer++;
+ (rem > 0) && (shift < 8);
+ rem--, shift++) {
+ tws_data(accu & 0x01); /* LSB first */
+ tws_clk(1);
+ udelay(10);
+ tws_clk(0);
+ udelay(10);
+ accu >>= 1;
+ }
+ }
+
+ /* Lower CE */
+ tws_ce(0);
+
+ return len - rem;
+}