diff options
Diffstat (limited to 'drivers/video/s6e8ax0.c')
| -rw-r--r-- | drivers/video/s6e8ax0.c | 25 |
1 files changed, 20 insertions, 5 deletions
diff --git a/drivers/video/s6e8ax0.c b/drivers/video/s6e8ax0.c index 1ec7fd6..176c518 100644 --- a/drivers/video/s6e8ax0.c +++ b/drivers/video/s6e8ax0.c @@ -28,6 +28,7 @@ static void s6e8ax0_panel_cond(struct mipi_dsim_device *dsim_dev) { struct mipi_dsim_master_ops *ops = dsim_dev->master_ops; + int reverse = dsim_dev->dsim_lcd_dev->reverse_panel; const unsigned char data_to_send[] = { 0xf8, 0x3d, 0x35, 0x00, 0x00, 0x00, 0x8d, 0x00, 0x4c, 0x6e, 0x10, 0x27, 0x7d, 0x3f, 0x10, 0x00, 0x00, 0x20, @@ -36,8 +37,22 @@ static void s6e8ax0_panel_cond(struct mipi_dsim_device *dsim_dev) 0xff, 0xff, 0xc8 }; - ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE, + const unsigned char data_to_send_reverse[] = { + 0xf8, 0x19, 0x35, 0x00, 0x00, 0x00, 0x93, 0x00, 0x3c, + 0x7d, 0x08, 0x27, 0x7d, 0x3f, 0x00, 0x00, 0x00, 0x20, + 0x04, 0x08, 0x6e, 0x00, 0x00, 0x00, 0x02, 0x08, 0x08, + 0x23, 0x23, 0xc0, 0xc1, 0x01, 0x41, 0xc1, 0x00, 0xc1, + 0xf6, 0xf6, 0xc1 + }; + + if (reverse) { + ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE, + (unsigned int)data_to_send_reverse, + ARRAY_SIZE(data_to_send_reverse)); + } else { + ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE, (unsigned int)data_to_send, ARRAY_SIZE(data_to_send)); + } } static void s6e8ax0_display_cond(struct mipi_dsim_device *dsim_dev) @@ -55,11 +70,11 @@ static void s6e8ax0_display_cond(struct mipi_dsim_device *dsim_dev) static void s6e8ax0_gamma_cond(struct mipi_dsim_device *dsim_dev) { struct mipi_dsim_master_ops *ops = dsim_dev->master_ops; - /* 7500K 2.2 Set (M3, 300cd) */ + /* 7500K 2.2 Set : 30cd */ const unsigned char data_to_send[] = { - 0xfa, 0x01, 0x0f, 0x00, 0x0f, 0xda, 0xc0, 0xe4, 0xc8, - 0xc8, 0xc6, 0xd3, 0xd6, 0xd0, 0xab, 0xb2, 0xa6, 0xbf, - 0xc2, 0xb9, 0x00, 0x93, 0x00, 0x86, 0x00, 0xd1 + 0xfa, 0x01, 0x60, 0x10, 0x60, 0xf5, 0x00, 0xff, 0xad, + 0xaf, 0xba, 0xc3, 0xd8, 0xc5, 0x9f, 0xc6, 0x9e, 0xc1, + 0xdc, 0xc0, 0x00, 0x61, 0x00, 0x5a, 0x00, 0x74, }; ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE, |