summaryrefslogtreecommitdiff
path: root/drivers/usb
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/usb')
-rw-r--r--drivers/usb/dwc3/gadget.c1
-rw-r--r--drivers/usb/dwc3/linux-compat.h2
-rw-r--r--drivers/usb/host/dwc2.c41
-rw-r--r--drivers/usb/host/ehci-mx6.c32
-rw-r--r--drivers/usb/host/ehci-pci.c6
-rw-r--r--drivers/usb/host/ohci-lpc32xx.c34
6 files changed, 31 insertions, 85 deletions
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index 8ff949d..25ccc01 100644
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -18,6 +18,7 @@
#include <malloc.h>
#include <asm/dma-mapping.h>
#include <usb/lin_gadget_compat.h>
+#include <linux/bug.h>
#include <linux/list.h>
#include <linux/usb/ch9.h>
diff --git a/drivers/usb/dwc3/linux-compat.h b/drivers/usb/dwc3/linux-compat.h
index 6c9c279..9e944a3 100644
--- a/drivers/usb/dwc3/linux-compat.h
+++ b/drivers/usb/dwc3/linux-compat.h
@@ -17,8 +17,6 @@
#define dev_WARN(dev, format, arg...) debug(format, ##arg)
#define WARN_ON_ONCE(val) debug("Error %d\n", val)
-#define BUILD_BUG_ON_NOT_POWER_OF_2(n)
-
static inline size_t strlcat(char *dest, const char *src, size_t n)
{
strcat(dest, src);
diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
index b272c57..c6727c3 100644
--- a/drivers/usb/host/dwc2.c
+++ b/drivers/usb/host/dwc2.c
@@ -13,6 +13,7 @@
#include <memalign.h>
#include <phys2bus.h>
#include <usbroothubdes.h>
+#include <wait_bit.h>
#include <asm/io.h>
#include "dwc2.h"
@@ -53,27 +54,6 @@ static struct dwc2_priv local;
/*
* DWC2 IP interface
*/
-static int wait_for_bit(void *reg, const uint32_t mask, bool set)
-{
- unsigned int timeout = 1000000;
- uint32_t val;
-
- while (--timeout) {
- val = readl(reg);
- if (!set)
- val = ~val;
-
- if ((val & mask) == mask)
- return 0;
-
- udelay(1);
- }
-
- debug("%s: Timeout (reg=%p mask=%08x wait_set=%i)\n",
- __func__, reg, mask, set);
-
- return -ETIMEDOUT;
-}
/*
* Initializes the FSLSPClkSel field of the HCFG register
@@ -118,7 +98,8 @@ static void dwc_otg_flush_tx_fifo(struct dwc2_core_regs *regs, const int num)
writel(DWC2_GRSTCTL_TXFFLSH | (num << DWC2_GRSTCTL_TXFNUM_OFFSET),
&regs->grstctl);
- ret = wait_for_bit(&regs->grstctl, DWC2_GRSTCTL_TXFFLSH, 0);
+ ret = wait_for_bit(__func__, &regs->grstctl, DWC2_GRSTCTL_TXFFLSH,
+ false, 1000, false);
if (ret)
printf("%s: Timeout!\n", __func__);
@@ -136,7 +117,8 @@ static void dwc_otg_flush_rx_fifo(struct dwc2_core_regs *regs)
int ret;
writel(DWC2_GRSTCTL_RXFFLSH, &regs->grstctl);
- ret = wait_for_bit(&regs->grstctl, DWC2_GRSTCTL_RXFFLSH, 0);
+ ret = wait_for_bit(__func__, &regs->grstctl, DWC2_GRSTCTL_RXFFLSH,
+ false, 1000, false);
if (ret)
printf("%s: Timeout!\n", __func__);
@@ -153,13 +135,15 @@ static void dwc_otg_core_reset(struct dwc2_core_regs *regs)
int ret;
/* Wait for AHB master IDLE state. */
- ret = wait_for_bit(&regs->grstctl, DWC2_GRSTCTL_AHBIDLE, 1);
+ ret = wait_for_bit(__func__, &regs->grstctl, DWC2_GRSTCTL_AHBIDLE,
+ true, 1000, false);
if (ret)
printf("%s: Timeout!\n", __func__);
/* Core Soft Reset */
writel(DWC2_GRSTCTL_CSFTRST, &regs->grstctl);
- ret = wait_for_bit(&regs->grstctl, DWC2_GRSTCTL_CSFTRST, 0);
+ ret = wait_for_bit(__func__, &regs->grstctl, DWC2_GRSTCTL_CSFTRST,
+ false, 1000, false);
if (ret)
printf("%s: Timeout!\n", __func__);
@@ -244,8 +228,8 @@ static void dwc_otg_core_host_init(struct dwc2_core_regs *regs)
clrsetbits_le32(&regs->hc_regs[i].hcchar,
DWC2_HCCHAR_EPDIR,
DWC2_HCCHAR_CHEN | DWC2_HCCHAR_CHDIS);
- ret = wait_for_bit(&regs->hc_regs[i].hcchar,
- DWC2_HCCHAR_CHEN, 0);
+ ret = wait_for_bit(__func__, &regs->hc_regs[i].hcchar,
+ DWC2_HCCHAR_CHEN, false, 1000, false);
if (ret)
printf("%s: Timeout!\n", __func__);
}
@@ -745,7 +729,8 @@ int wait_for_chhltd(struct dwc2_hc_regs *hc_regs, uint32_t *sub, u8 *toggle)
int ret;
uint32_t hcint, hctsiz;
- ret = wait_for_bit(&hc_regs->hcint, DWC2_HCINT_CHHLTD, true);
+ ret = wait_for_bit(__func__, &hc_regs->hcint, DWC2_HCINT_CHHLTD, true,
+ 1000, false);
if (ret)
return ret;
diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c
index 2666351..e1c67f7 100644
--- a/drivers/usb/host/ehci-mx6.c
+++ b/drivers/usb/host/ehci-mx6.c
@@ -8,6 +8,7 @@
#include <common.h>
#include <usb.h>
#include <errno.h>
+#include <wait_bit.h>
#include <linux/compiler.h>
#include <usb/ehci-fsl.h>
#include <asm/io.h>
@@ -117,32 +118,6 @@ static void usb_power_config(int index)
pll_480_ctrl_set);
}
-static int wait_for_bit(u32 *reg, const u32 mask, bool set)
-{
- u32 val;
- const unsigned int timeout = 10000;
- unsigned long start = get_timer(0);
-
- while(1) {
- val = readl(reg);
- if (!set)
- val = ~val;
-
- if ((val & mask) == mask)
- return 0;
-
- if (get_timer(start) > timeout)
- break;
-
- udelay(1);
- }
-
- debug("%s: Timeout (reg=%p mask=%08x wait_set=%i)\n",
- __func__, reg, mask, set);
-
- return -ETIMEDOUT;
-}
-
/* Return 0 : host node, <>0 : device mode */
static int usb_phy_enable(int index, struct usb_ehci *ehci)
{
@@ -160,12 +135,13 @@ static int usb_phy_enable(int index, struct usb_ehci *ehci)
/* Stop then Reset */
clrbits_le32(usb_cmd, UCMD_RUN_STOP);
- ret = wait_for_bit(usb_cmd, UCMD_RUN_STOP, 0);
+ ret = wait_for_bit(__func__, usb_cmd, UCMD_RUN_STOP, false, 10000,
+ false);
if (ret)
return ret;
setbits_le32(usb_cmd, UCMD_RESET);
- ret = wait_for_bit(usb_cmd, UCMD_RESET, 0);
+ ret = wait_for_bit(__func__, usb_cmd, UCMD_RESET, false, 10000, false);
if (ret)
return ret;
diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c
index cda1c6d..f21a1fa 100644
--- a/drivers/usb/host/ehci-pci.c
+++ b/drivers/usb/host/ehci-pci.c
@@ -137,11 +137,17 @@ static int ehci_pci_remove(struct udevice *dev)
return 0;
}
+static const struct udevice_id ehci_pci_ids[] = {
+ { .compatible = "ehci-pci" },
+ { }
+};
+
U_BOOT_DRIVER(ehci_pci) = {
.name = "ehci_pci",
.id = UCLASS_USB,
.probe = ehci_pci_probe,
.remove = ehci_pci_remove,
+ .of_match = ehci_pci_ids,
.ops = &ehci_usb_ops,
.platdata_auto_alloc_size = sizeof(struct usb_platdata),
.priv_auto_alloc_size = sizeof(struct ehci_pci_priv),
diff --git a/drivers/usb/host/ohci-lpc32xx.c b/drivers/usb/host/ohci-lpc32xx.c
index 48d338e..9245126 100644
--- a/drivers/usb/host/ohci-lpc32xx.c
+++ b/drivers/usb/host/ohci-lpc32xx.c
@@ -10,6 +10,7 @@
#include <common.h>
#include <errno.h>
+#include <wait_bit.h>
#include <asm/io.h>
#include <asm/arch/cpu.h>
#include <asm/arch/clk.h>
@@ -80,30 +81,6 @@ struct otg_regs {
static struct otg_regs *otg = (struct otg_regs *)USB_BASE;
static struct clk_pm_regs *clk_pwr = (struct clk_pm_regs *)CLK_PM_BASE;
-static int wait_for_bit(void *reg, const u32 mask, bool set)
-{
- u32 val;
- unsigned long start = get_timer(0);
-
- while (1) {
- val = readl(reg);
- if (!set)
- val = ~val;
-
- if ((val & mask) == mask)
- return 0;
-
- if (get_timer(start) > CONFIG_SYS_HZ)
- break;
-
- udelay(1);
- }
-
- error("Timeout (reg=%p mask=%08x wait_set=%i)\n", reg, mask, set);
-
- return -ETIMEDOUT;
-}
-
static int isp1301_set_value(int reg, u8 value)
{
return i2c_write(ISP1301_I2C_ADDR, reg, 1, &value, 1);
@@ -158,7 +135,8 @@ static int usbpll_setup(void)
setbits_le32(&clk_pwr->usb_ctrl, CLK_USBCTRL_POSTDIV_2POW(0x01));
setbits_le32(&clk_pwr->usb_ctrl, CLK_USBCTRL_PLL_PWRUP);
- ret = wait_for_bit(&clk_pwr->usb_ctrl, CLK_USBCTRL_PLL_STS, 1);
+ ret = wait_for_bit(__func__, &clk_pwr->usb_ctrl, CLK_USBCTRL_PLL_STS,
+ true, CONFIG_SYS_HZ, false);
if (ret)
return ret;
@@ -183,7 +161,8 @@ int usb_cpu_init(void)
/* enable I2C clock */
writel(OTG_CLK_I2C_EN, &otg->otg_clk_ctrl);
- ret = wait_for_bit(&otg->otg_clk_sts, OTG_CLK_I2C_EN, 1);
+ ret = wait_for_bit(__func__, &otg->otg_clk_sts, OTG_CLK_I2C_EN, true,
+ CONFIG_SYS_HZ, false);
if (ret)
return ret;
@@ -203,7 +182,8 @@ int usb_cpu_init(void)
OTG_CLK_I2C_EN | OTG_CLK_HOST_EN;
writel(mask, &otg->otg_clk_ctrl);
- ret = wait_for_bit(&otg->otg_clk_sts, mask, 1);
+ ret = wait_for_bit(__func__, &otg->otg_clk_sts, mask, true,
+ CONFIG_SYS_HZ, false);
if (ret)
return ret;
generated by cgit v1.1 at 2024-12-22 01:03:38 +0000