summaryrefslogtreecommitdiff
path: root/drivers/serial
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/serial')
-rw-r--r--drivers/serial/atmel_usart.c11
-rw-r--r--drivers/serial/ns16550.c2
-rw-r--r--drivers/serial/serial_pl01x.c2
3 files changed, 13 insertions, 2 deletions
diff --git a/drivers/serial/atmel_usart.c b/drivers/serial/atmel_usart.c
index e326b2b..943ef70 100644
--- a/drivers/serial/atmel_usart.c
+++ b/drivers/serial/atmel_usart.c
@@ -49,17 +49,26 @@ int serial_init(void)
{
atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
+ /*
+ * Just in case: drain transmitter register
+ * 1000us is enough for baudrate >= 9600
+ */
+ if (!(readl(&usart->csr) & USART3_BIT(TXEMPTY)))
+ __udelay(1000);
+
writel(USART3_BIT(RSTRX) | USART3_BIT(RSTTX), &usart->cr);
serial_setbrg();
- writel(USART3_BIT(RXEN) | USART3_BIT(TXEN), &usart->cr);
writel((USART3_BF(USART_MODE, USART3_USART_MODE_NORMAL)
| USART3_BF(USCLKS, USART3_USCLKS_MCK)
| USART3_BF(CHRL, USART3_CHRL_8)
| USART3_BF(PAR, USART3_PAR_NONE)
| USART3_BF(NBSTOP, USART3_NBSTOP_1)),
&usart->mr);
+ writel(USART3_BIT(RXEN) | USART3_BIT(TXEN), &usart->cr);
+ /* 100us is enough for the new settings to be settled */
+ __udelay(100);
return 0;
}
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index 0c23955..facadd2 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -52,7 +52,7 @@ void NS16550_init(NS16550_t com_port, int baud_divisor)
serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);
serial_out(UART_LCRVAL, &com_port->lcr);
#if (defined(CONFIG_OMAP) && !defined(CONFIG_OMAP3_ZOOM2)) || \
- defined(CONFIG_AM33XX)
+ defined(CONFIG_AM33XX) || defined(CONFIG_SOC_DA8XX)
#if defined(CONFIG_APTIX)
/* /13 mode so Aptix 6MHz can hit 115200 */
diff --git a/drivers/serial/serial_pl01x.c b/drivers/serial/serial_pl01x.c
index ed581ae..d4c5137 100644
--- a/drivers/serial/serial_pl01x.c
+++ b/drivers/serial/serial_pl01x.c
@@ -156,6 +156,8 @@ int serial_init (void)
writel(lcr, &regs->fr);
writel(lcr, &regs->pl011_rlcr);
+ /* lcrh needs to be set again for change to be effective */
+ writel(lcr, &regs->pl011_lcrh);
}
#endif
/* Finally, enable the UART */