diff options
Diffstat (limited to 'drivers/serial')
-rw-r--r-- | drivers/serial/Makefile | 7 | ||||
-rw-r--r-- | drivers/serial/mcfuart.c | 10 | ||||
-rw-r--r-- | drivers/serial/ns16550.c | 4 | ||||
-rw-r--r-- | drivers/serial/serial.c | 42 | ||||
-rw-r--r-- | drivers/serial/serial_pl011.c | 161 | ||||
-rw-r--r-- | drivers/serial/serial_pl01x.c (renamed from drivers/serial/serial_pl010.c) | 88 | ||||
-rw-r--r-- | drivers/serial/serial_pl01x.h (renamed from drivers/serial/serial_pl011.h) | 0 | ||||
-rw-r--r-- | drivers/serial/serial_sh.c | 4 | ||||
-rw-r--r-- | drivers/serial/usbtty.c | 6 | ||||
-rw-r--r-- | drivers/serial/usbtty.h | 31 | ||||
-rwxr-xr-x | drivers/serial/vcth.c | 121 |
11 files changed, 246 insertions, 228 deletions
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index f30014d..17235ff 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -33,13 +33,14 @@ COBJS-$(CONFIG_DRIVER_S3C4510_UART) += s3c4510b_uart.o COBJS-$(CONFIG_S3C64XX) += s3c64xx.o COBJS-y += serial.o COBJS-$(CONFIG_MAX3100_SERIAL) += serial_max3100.o -COBJS-y += serial_pl010.o -COBJS-y += serial_pl011.o +COBJS-$(CONFIG_PL010_SERIAL) += serial_pl01x.o +COBJS-$(CONFIG_PL011_SERIAL) += serial_pl01x.o COBJS-$(CONFIG_XILINX_UARTLITE) += serial_xuartlite.o COBJS-$(CONFIG_SCIF_CONSOLE) += serial_sh.o COBJS-$(CONFIG_USB_TTY) += usbtty.o +COBJS-$(CONFIG_VCTH_SERIAL) += vcth.o -COBJS := $(COBJS-y) +COBJS := $(sort $(COBJS-y)) SRCS := $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) diff --git a/drivers/serial/mcfuart.c b/drivers/serial/mcfuart.c index a1fcd05..e04fc29 100644 --- a/drivers/serial/mcfuart.c +++ b/drivers/serial/mcfuart.c @@ -41,7 +41,7 @@ int serial_init(void) volatile uart_t *uart; u32 counter; - uart = (volatile uart_t *)(CFG_UART_BASE); + uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE); uart_port_conf(); @@ -76,7 +76,7 @@ int serial_init(void) void serial_putc(const char c) { - volatile uart_t *uart = (volatile uart_t *)(CFG_UART_BASE); + volatile uart_t *uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE); if (c == '\n') serial_putc('\r'); @@ -96,7 +96,7 @@ void serial_puts(const char *s) int serial_getc(void) { - volatile uart_t *uart = (volatile uart_t *)(CFG_UART_BASE); + volatile uart_t *uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE); /* Wait for a character to arrive. */ while (!(uart->usr & UART_USR_RXRDY)) ; @@ -105,14 +105,14 @@ int serial_getc(void) int serial_tstc(void) { - volatile uart_t *uart = (volatile uart_t *)(CFG_UART_BASE); + volatile uart_t *uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE); return (uart->usr & UART_USR_RXRDY); } void serial_setbrg(void) { - volatile uart_t *uart = (volatile uart_t *)(CFG_UART_BASE); + volatile uart_t *uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE); u32 counter; counter = ((gd->bus_clk / gd->baudrate)) >> 5; diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 6b3f60e..93c2243 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -1,12 +1,12 @@ /* * COM1 NS16550 support * originally from linux source (arch/ppc/boot/ns16550.c) - * modified to use CFG_ISA_MEM and new defines + * modified to use CONFIG_SYS_ISA_MEM and new defines */ #include <config.h> -#ifdef CFG_NS16550 +#ifdef CONFIG_SYS_NS16550 #include <ns16550.h> diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c index b361eef..bce7548 100644 --- a/drivers/serial/serial.c +++ b/drivers/serial/serial.c @@ -23,7 +23,7 @@ #include <common.h> -#ifdef CFG_NS16550_SERIAL +#ifdef CONFIG_SYS_NS16550_SERIAL #include <ns16550.h> #ifdef CONFIG_NS87308 @@ -48,13 +48,13 @@ DECLARE_GLOBAL_DATA_PTR; #error "Invalid console index value." #endif -#if CONFIG_CONS_INDEX == 1 && !defined(CFG_NS16550_COM1) +#if CONFIG_CONS_INDEX == 1 && !defined(CONFIG_SYS_NS16550_COM1) #error "Console port 1 defined but not configured." -#elif CONFIG_CONS_INDEX == 2 && !defined(CFG_NS16550_COM2) +#elif CONFIG_CONS_INDEX == 2 && !defined(CONFIG_SYS_NS16550_COM2) #error "Console port 2 defined but not configured." -#elif CONFIG_CONS_INDEX == 3 && !defined(CFG_NS16550_COM3) +#elif CONFIG_CONS_INDEX == 3 && !defined(CONFIG_SYS_NS16550_COM3) #error "Console port 3 defined but not configured." -#elif CONFIG_CONS_INDEX == 4 && !defined(CFG_NS16550_COM4) +#elif CONFIG_CONS_INDEX == 4 && !defined(CONFIG_SYS_NS16550_COM4) #error "Console port 4 defined but not configured." #endif @@ -62,23 +62,23 @@ DECLARE_GLOBAL_DATA_PTR; * the array is 0 based. */ static NS16550_t serial_ports[4] = { -#ifdef CFG_NS16550_COM1 - (NS16550_t)CFG_NS16550_COM1, +#ifdef CONFIG_SYS_NS16550_COM1 + (NS16550_t)CONFIG_SYS_NS16550_COM1, #else NULL, #endif -#ifdef CFG_NS16550_COM2 - (NS16550_t)CFG_NS16550_COM2, +#ifdef CONFIG_SYS_NS16550_COM2 + (NS16550_t)CONFIG_SYS_NS16550_COM2, #else NULL, #endif -#ifdef CFG_NS16550_COM3 - (NS16550_t)CFG_NS16550_COM3, +#ifdef CONFIG_SYS_NS16550_COM3 + (NS16550_t)CONFIG_SYS_NS16550_COM3, #else NULL, #endif -#ifdef CFG_NS16550_COM4 - (NS16550_t)CFG_NS16550_COM4 +#ifdef CONFIG_SYS_NS16550_COM4 + (NS16550_t)CONFIG_SYS_NS16550_COM4 #else NULL #endif @@ -126,7 +126,7 @@ static int calc_divisor (NS16550_t port) { #ifdef CONFIG_OMAP1510 /* If can't cleanly clock 115200 set div to 1 */ - if ((CFG_NS16550_CLK == 12000000) && (gd->baudrate == 115200)) { + if ((CONFIG_SYS_NS16550_CLK == 12000000) && (gd->baudrate == 115200)) { port->osc_12m_sel = OSC_12M_SEL; /* enable 6.5 * divisor */ return (1); /* return 1 for base divisor */ } @@ -134,7 +134,7 @@ static int calc_divisor (NS16550_t port) #endif #ifdef CONFIG_OMAP1610 /* If can't cleanly clock 115200 set div to 1 */ - if ((CFG_NS16550_CLK == 48000000) && (gd->baudrate == 115200)) { + if ((CONFIG_SYS_NS16550_CLK == 48000000) && (gd->baudrate == 115200)) { return (26); /* return 26 for base divisor */ } #endif @@ -146,11 +146,11 @@ static int calc_divisor (NS16550_t port) #endif /* Compute divisor value. Normally, we should simply return: - * CFG_NS16550_CLK) / MODE_X_DIV / gd->baudrate + * CONFIG_SYS_NS16550_CLK) / MODE_X_DIV / gd->baudrate * but we need to round that value by adding 0.5. * Rounding is especially important at high baud rates. */ - return (CFG_NS16550_CLK + (gd->baudrate * (MODE_X_DIV / 2))) / + return (CONFIG_SYS_NS16550_CLK + (gd->baudrate * (MODE_X_DIV / 2))) / (MODE_X_DIV * gd->baudrate); } @@ -163,19 +163,19 @@ int serial_init (void) initialise_ns87308(); #endif -#ifdef CFG_NS16550_COM1 +#ifdef CONFIG_SYS_NS16550_COM1 clock_divisor = calc_divisor(serial_ports[0]); NS16550_init(serial_ports[0], clock_divisor); #endif -#ifdef CFG_NS16550_COM2 +#ifdef CONFIG_SYS_NS16550_COM2 clock_divisor = calc_divisor(serial_ports[1]); NS16550_init(serial_ports[1], clock_divisor); #endif -#ifdef CFG_NS16550_COM3 +#ifdef CONFIG_SYS_NS16550_COM3 clock_divisor = calc_divisor(serial_ports[2]); NS16550_init(serial_ports[2], clock_divisor); #endif -#ifdef CFG_NS16550_COM4 +#ifdef CONFIG_SYS_NS16550_COM4 clock_divisor = calc_divisor(serial_ports[3]); NS16550_init(serial_ports[3], clock_divisor); #endif diff --git a/drivers/serial/serial_pl011.c b/drivers/serial/serial_pl011.c deleted file mode 100644 index 4d35fe5..0000000 --- a/drivers/serial/serial_pl011.c +++ /dev/null @@ -1,161 +0,0 @@ -/* - * (C) Copyright 2000 - * Rob Taylor, Flying Pig Systems. robt@flyingpig.com. - * - * (C) Copyright 2004 - * ARM Ltd. - * Philippe Robin, <philippe.robin@arm.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* Simple U-Boot driver for the PrimeCell PL011 UARTs on the IntegratorCP */ -/* Should be fairly simple to make it work with the PL010 as well */ - -#include <common.h> - -#ifdef CFG_PL011_SERIAL - -#include "serial_pl011.h" - -#define IO_WRITE(addr, val) (*(volatile unsigned int *)(addr) = (val)) -#define IO_READ(addr) (*(volatile unsigned int *)(addr)) - -/* - * IntegratorCP has two UARTs, use the first one, at 38400-8-N-1 - * Versatile PB has four UARTs. - */ - -#define CONSOLE_PORT CONFIG_CONS_INDEX -#define baudRate CONFIG_BAUDRATE -static volatile unsigned char *const port[] = CONFIG_PL01x_PORTS; -#define NUM_PORTS (sizeof(port)/sizeof(port[0])) - -static void pl011_putc (int portnum, char c); -static int pl011_getc (int portnum); -static int pl011_tstc (int portnum); - - -int serial_init (void) -{ - unsigned int temp; - unsigned int divider; - unsigned int remainder; - unsigned int fraction; - - /* - ** First, disable everything. - */ - IO_WRITE (port[CONSOLE_PORT] + UART_PL011_CR, 0x0); - - /* - ** Set baud rate - ** - ** IBRD = UART_CLK / (16 * BAUD_RATE) - ** FBRD = ROUND((64 * MOD(UART_CLK,(16 * BAUD_RATE))) / (16 * BAUD_RATE)) - */ - temp = 16 * baudRate; - divider = CONFIG_PL011_CLOCK / temp; - remainder = CONFIG_PL011_CLOCK % temp; - temp = (8 * remainder) / baudRate; - fraction = (temp >> 1) + (temp & 1); - - IO_WRITE (port[CONSOLE_PORT] + UART_PL011_IBRD, divider); - IO_WRITE (port[CONSOLE_PORT] + UART_PL011_FBRD, fraction); - - /* - ** Set the UART to be 8 bits, 1 stop bit, no parity, fifo enabled. - */ - IO_WRITE (port[CONSOLE_PORT] + UART_PL011_LCRH, - (UART_PL011_LCRH_WLEN_8 | UART_PL011_LCRH_FEN)); - - /* - ** Finally, enable the UART - */ - IO_WRITE (port[CONSOLE_PORT] + UART_PL011_CR, - (UART_PL011_CR_UARTEN | UART_PL011_CR_TXE | - UART_PL011_CR_RXE)); - - return 0; -} - -void serial_putc (const char c) -{ - if (c == '\n') - pl011_putc (CONSOLE_PORT, '\r'); - - pl011_putc (CONSOLE_PORT, c); -} - -void serial_puts (const char *s) -{ - while (*s) { - serial_putc (*s++); - } -} - -int serial_getc (void) -{ - return pl011_getc (CONSOLE_PORT); -} - -int serial_tstc (void) -{ - return pl011_tstc (CONSOLE_PORT); -} - -void serial_setbrg (void) -{ -} - -static void pl011_putc (int portnum, char c) -{ - /* Wait until there is space in the FIFO */ - while (IO_READ (port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_TXFF); - - /* Send the character */ - IO_WRITE (port[portnum] + UART_PL01x_DR, c); -} - -static int pl011_getc (int portnum) -{ - unsigned int data; - - /* Wait until there is data in the FIFO */ - while (IO_READ (port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_RXFE); - - data = IO_READ (port[portnum] + UART_PL01x_DR); - - /* Check for an error flag */ - if (data & 0xFFFFFF00) { - /* Clear the error */ - IO_WRITE (port[portnum] + UART_PL01x_ECR, 0xFFFFFFFF); - return -1; - } - - return (int) data; -} - -static int pl011_tstc (int portnum) -{ - return !(IO_READ (port[portnum] + UART_PL01x_FR) & - UART_PL01x_FR_RXFE); -} - -#endif diff --git a/drivers/serial/serial_pl010.c b/drivers/serial/serial_pl01x.c index 134ed09..c645cef 100644 --- a/drivers/serial/serial_pl010.c +++ b/drivers/serial/serial_pl01x.c @@ -25,30 +25,31 @@ * MA 02111-1307 USA */ -/* Simple U-Boot driver for the PrimeCell PL011 UARTs on the IntegratorCP */ -/* Should be fairly simple to make it work with the PL010 as well */ +/* Simple U-Boot driver for the PrimeCell PL010/PL011 UARTs */ #include <common.h> #include <watchdog.h> -#ifdef CFG_PL010_SERIAL - -#include "serial_pl011.h" +#include "serial_pl01x.h" #define IO_WRITE(addr, val) (*(volatile unsigned int *)(addr) = (val)) #define IO_READ(addr) (*(volatile unsigned int *)(addr)) -/* Integrator AP has two UARTs, we use the first one, at 38400-8-N-1 */ +/* + * Integrator AP has two UARTs, we use the first one, at 38400-8-N-1 + * Integrator CP has two UARTs, use the first one, at 38400-8-N-1 + * Versatile PB has four UARTs. + */ #define CONSOLE_PORT CONFIG_CONS_INDEX #define baudRate CONFIG_BAUDRATE static volatile unsigned char *const port[] = CONFIG_PL01x_PORTS; #define NUM_PORTS (sizeof(port)/sizeof(port[0])) +static void pl01x_putc (int portnum, char c); +static int pl01x_getc (int portnum); +static int pl01x_tstc (int portnum); -static void pl010_putc (int portnum, char c); -static int pl010_getc (int portnum); -static int pl010_tstc (int portnum); - +#ifdef CONFIG_PL010_SERIAL int serial_init (void) { @@ -103,15 +104,64 @@ int serial_init (void) */ IO_WRITE (port[CONSOLE_PORT] + UART_PL010_CR, (UART_PL010_CR_UARTEN)); - return (0); + return 0; } +#endif /* CONFIG_PL010_SERIAL */ + +#ifdef CONFIG_PL011_SERIAL + +int serial_init (void) +{ + unsigned int temp; + unsigned int divider; + unsigned int remainder; + unsigned int fraction; + + /* + ** First, disable everything. + */ + IO_WRITE (port[CONSOLE_PORT] + UART_PL011_CR, 0x0); + + /* + ** Set baud rate + ** + ** IBRD = UART_CLK / (16 * BAUD_RATE) + ** FBRD = ROUND((64 * MOD(UART_CLK,(16 * BAUD_RATE))) / (16 * BAUD_RATE)) + */ + temp = 16 * baudRate; + divider = CONFIG_PL011_CLOCK / temp; + remainder = CONFIG_PL011_CLOCK % temp; + temp = (8 * remainder) / baudRate; + fraction = (temp >> 1) + (temp & 1); + + IO_WRITE (port[CONSOLE_PORT] + UART_PL011_IBRD, divider); + IO_WRITE (port[CONSOLE_PORT] + UART_PL011_FBRD, fraction); + + /* + ** Set the UART to be 8 bits, 1 stop bit, no parity, fifo enabled. + */ + IO_WRITE (port[CONSOLE_PORT] + UART_PL011_LCRH, + (UART_PL011_LCRH_WLEN_8 | UART_PL011_LCRH_FEN)); + + /* + ** Finally, enable the UART + */ + IO_WRITE (port[CONSOLE_PORT] + UART_PL011_CR, + (UART_PL011_CR_UARTEN | UART_PL011_CR_TXE | + UART_PL011_CR_RXE)); + + return 0; +} + +#endif /* CONFIG_PL011_SERIAL */ + void serial_putc (const char c) { if (c == '\n') - pl010_putc (CONSOLE_PORT, '\r'); + pl01x_putc (CONSOLE_PORT, '\r'); - pl010_putc (CONSOLE_PORT, c); + pl01x_putc (CONSOLE_PORT, c); } void serial_puts (const char *s) @@ -123,19 +173,19 @@ void serial_puts (const char *s) int serial_getc (void) { - return pl010_getc (CONSOLE_PORT); + return pl01x_getc (CONSOLE_PORT); } int serial_tstc (void) { - return pl010_tstc (CONSOLE_PORT); + return pl01x_tstc (CONSOLE_PORT); } void serial_setbrg (void) { } -static void pl010_putc (int portnum, char c) +static void pl01x_putc (int portnum, char c) { /* Wait until there is space in the FIFO */ while (IO_READ (port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_TXFF) @@ -145,7 +195,7 @@ static void pl010_putc (int portnum, char c) IO_WRITE (port[portnum] + UART_PL01x_DR, c); } -static int pl010_getc (int portnum) +static int pl01x_getc (int portnum) { unsigned int data; @@ -165,11 +215,9 @@ static int pl010_getc (int portnum) return (int) data; } -static int pl010_tstc (int portnum) +static int pl01x_tstc (int portnum) { WATCHDOG_RESET(); return !(IO_READ (port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_RXFE); } - -#endif diff --git a/drivers/serial/serial_pl011.h b/drivers/serial/serial_pl01x.h index 5f20fdd..5f20fdd 100644 --- a/drivers/serial/serial_pl011.h +++ b/drivers/serial/serial_pl01x.h diff --git a/drivers/serial/serial_sh.c b/drivers/serial/serial_sh.c index 61c2b82..1d76a19 100644 --- a/drivers/serial/serial_sh.c +++ b/drivers/serial/serial_sh.c @@ -76,7 +76,7 @@ # define FIFOLEVEL_MASK 0xFF # endif #elif defined(CONFIG_CPU_SH7723) -# if defined(CONIFG_SCIF_A) +# if defined(CONFIG_SCIF_A) # define SCLSR SCFSR # define LSR_ORER 0x0200 # define FIFOLEVEL_MASK 0x3F @@ -94,7 +94,7 @@ # define LSR_ORER 1 # define FIFOLEVEL_MASK 0x1F #elif defined(CONFIG_CPU_SH7720) -# define SCLSR (vu_short *)(SCIF_BASE + 0x24) +# define SCLSR SCFSR # define LSR_ORER 0x0200 # define FIFOLEVEL_MASK 0x1F #elif defined(CONFIG_CPU_SH7710) || \ diff --git a/drivers/serial/usbtty.c b/drivers/serial/usbtty.c index e738c56..7eba470 100644 --- a/drivers/serial/usbtty.c +++ b/drivers/serial/usbtty.c @@ -22,16 +22,14 @@ */ #include <common.h> - +#include <config.h> #include <circbuf.h> #include <devices.h> #include "usbtty.h" #include "usb_cdc_acm.h" #include "usbdescriptors.h" -#include <config.h> /* If defined, override Linux identifiers with - * vendor specific ones */ -#if 0 +#ifdef DEBUG #define TTYDBG(fmt,args...)\ serial_printf("[%s] %s %d: "fmt, __FILE__,__FUNCTION__,__LINE__,##args) #else diff --git a/drivers/serial/usbtty.h b/drivers/serial/usbtty.h index 71c47bc..ecefde5 100644 --- a/drivers/serial/usbtty.h +++ b/drivers/serial/usbtty.h @@ -24,11 +24,11 @@ #ifndef __USB_TTY_H__ #define __USB_TTY_H__ -#include "usbdcore.h" +#include <usbdcore.h> #if defined(CONFIG_PPC) -#include "usbdcore_mpc8xx.h" +#include <usbdcore_mpc8xx.h> #elif defined(CONFIG_ARM) -#include "usbdcore_omap1510.h" +#include <usbdcore_omap1510.h> #endif #include <version_autogenerated.h> @@ -36,14 +36,25 @@ /* If no VendorID/ProductID is defined in config.h, pretend to be Linux * DO NOT Reuse this Vendor/Product setup with protocol incompatible devices */ -#define CONFIG_USBD_VENDORID 0x0525 /* Linux/NetChip */ -#define CONFIG_USBD_PRODUCTID_GSERIAL 0xa4a6 /* gserial */ -#define CONFIG_USBD_PRODUCTID_CDCACM 0xa4a7 /* CDC ACM */ -#define CONFIG_USBD_MANUFACTURER "Das U-Boot" -#define CONFIG_USBD_PRODUCT_NAME U_BOOT_VERSION - +#ifndef CONFIG_USBD_VENDORID +#define CONFIG_USBD_VENDORID 0x0525 /* Linux/NetChip */ +#endif +#ifndef CONFIG_USBD_PRODUCTID_GSERIAL +#define CONFIG_USBD_PRODUCTID_GSERIAL 0xa4a6 /* gserial */ +#endif +#ifndef CONFIG_USBD_PRODUCTID_CDCACM +#define CONFIG_USBD_PRODUCTID_CDCACM 0xa4a7 /* CDC ACM */ +#endif +#ifndef CONFIG_USBD_MANUFACTURER +#define CONFIG_USBD_MANUFACTURER "Das U-Boot" +#endif +#ifndef CONFIG_USBD_PRODUCT_NAME +#define CONFIG_USBD_PRODUCT_NAME U_BOOT_VERSION +#endif -#define CONFIG_USBD_CONFIGURATION_STR "TTY via USB" +#ifndef CONFIG_USBD_CONFIGURATION_STR +#define CONFIG_USBD_CONFIGURATION_STR "TTY via USB" +#endif #define CONFIG_USBD_SERIAL_OUT_ENDPOINT UDC_OUT_ENDPOINT #define CONFIG_USBD_SERIAL_OUT_PKTSIZE UDC_OUT_PACKET_SIZE diff --git a/drivers/serial/vcth.c b/drivers/serial/vcth.c new file mode 100755 index 0000000..2c847d0 --- /dev/null +++ b/drivers/serial/vcth.c @@ -0,0 +1,121 @@ +/* + * (C) Copyright 2008 Stefan Roese <sr@denx.de>, DENX Software Engineering + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <config.h> +#include <common.h> +#include <asm/io.h> + +#define UART_1_BASE 0xBF89C000 + +#define UART_RBR_OFF 0x00 /* receiver buffer reg */ +#define UART_THR_OFF 0x00 /* transmit holding reg */ +#define UART_DLL_OFF 0x00 /* divisor latch low reg */ +#define UART_IER_OFF 0x04 /* interrupt enable reg */ +#define UART_DLH_OFF 0x04 /* receiver buffer reg */ +#define UART_FCR_OFF 0x08 /* fifo control register */ +#define UART_LCR_OFF 0x0c /* line control register */ +#define UART_MCR_OFF 0x10 /* modem control register */ +#define UART_LSR_OFF 0x14 /* line status register */ +#define UART_MSR_OFF 0x18 /* modem status register */ +#define UART_SCR_OFF 0x1c /* scratch pad register */ + +#define UART_RCV_DATA_RDY 0x01 /* Data Received */ +#define UART_XMT_HOLD_EMPTY 0x20 +#define UART_TRANSMIT_EMPTY 0x40 + +/* 7 bit on line control reg. enalbing rw to dll and dlh */ +#define UART_LCR_DLAB 0x0080 + +#define UART___9600_BDR 0x84 +#define UART__19200_BDR 0x42 +#define UART_115200_BDR 0x08 + +#define UART_DIS_ALL_INTER 0x00 /* disable all interrupts */ + +#define UART_5DATA_BITS 0x0000 /* 5 [bits] 1.5 bits 2 */ +#define UART_6DATA_BITS 0x0001 /* 6 [bits] 1 bits 2 */ +#define UART_7DATA_BITS 0x0002 /* 7 [bits] 1 bits 2 */ +#define UART_8DATA_BITS 0x0003 /* 8 [bits] 1 bits 2 */ + +static void vcth_uart_set_baud_rate(u32 address, u32 dh, u32 dl) +{ + u32 val = __raw_readl(UART_1_BASE + UART_LCR_OFF); + + /* set 7 bit on 1 */ + val |= UART_LCR_DLAB; + __raw_writel(val, UART_1_BASE + UART_LCR_OFF); + + __raw_writel(dl, UART_1_BASE + UART_DLL_OFF); + __raw_writel(dh, UART_1_BASE + UART_DLH_OFF); + + /* set 7 bit on 0 */ + val &= ~UART_LCR_DLAB; + __raw_writel(val, UART_1_BASE + UART_LCR_OFF); + + return; +} + +int serial_init(void) +{ + __raw_writel(UART_DIS_ALL_INTER, UART_1_BASE + UART_IER_OFF); + vcth_uart_set_baud_rate(UART_1_BASE, 0, UART_115200_BDR); + __raw_writel(UART_8DATA_BITS, UART_1_BASE + UART_LCR_OFF); + + return 0; +} + +void serial_setbrg(void) +{ + /* + * Baudrate change not supported currently, fixed to 115200 baud + */ +} + +void serial_putc(const char c) +{ + if (c == '\n') + serial_putc('\r'); + + while (!(UART_XMT_HOLD_EMPTY & __raw_readl(UART_1_BASE + UART_LSR_OFF))) + ; + + __raw_writel(c, UART_1_BASE + UART_THR_OFF); +} + +void serial_puts(const char *s) +{ + while (*s) + serial_putc(*s++); +} + +int serial_getc(void) +{ + while (!(UART_RCV_DATA_RDY & __raw_readl(UART_1_BASE + UART_LSR_OFF))) + ; + + return __raw_readl(UART_1_BASE + UART_RBR_OFF) & 0xff; +} + +int serial_tstc(void) +{ + if (!(UART_RCV_DATA_RDY & __raw_readl(UART_1_BASE + UART_LSR_OFF))) + return 0; + + return 1; +} |