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path: root/drivers/rtc/ds1374.c
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Diffstat (limited to 'drivers/rtc/ds1374.c')
-rw-r--r--drivers/rtc/ds1374.c29
1 files changed, 10 insertions, 19 deletions
diff --git a/drivers/rtc/ds1374.c b/drivers/rtc/ds1374.c
index d61a228..ec04ec8 100644
--- a/drivers/rtc/ds1374.c
+++ b/drivers/rtc/ds1374.c
@@ -84,15 +84,6 @@
#define RTC_SR_BIT_AF 0x01 /* Bit 0 = Alarm Flag */
#define RTC_SR_BIT_OSF 0x80 /* Bit 7 - Osc Stop Flag */
-typedef unsigned char boolean_t;
-
-#ifndef TRUE
-#define TRUE ((boolean_t)(0==0))
-#endif
-#ifndef FALSE
-#define FALSE (!TRUE)
-#endif
-
const char RtcTodAddr[] = {
RTC_TOD_CNT_BYTE0_ADDR,
RTC_TOD_CNT_BYTE1_ADDR,
@@ -101,7 +92,7 @@ const char RtcTodAddr[] = {
};
static uchar rtc_read (uchar reg);
-static void rtc_write (uchar reg, uchar val, boolean_t set);
+static void rtc_write(uchar reg, uchar val, bool set);
static void rtc_write_raw (uchar reg, uchar val);
/*
@@ -185,7 +176,7 @@ int rtc_set (struct rtc_time *tmp){
}
/* Start clock */
- rtc_write(RTC_CTL_ADDR, RTC_CTL_BIT_EN_OSC, FALSE);
+ rtc_write(RTC_CTL_ADDR, RTC_CTL_BIT_EN_OSC, false);
return 0;
}
@@ -202,18 +193,18 @@ void rtc_reset (void){
struct rtc_time tmp;
/* clear status flags */
- rtc_write (RTC_SR_ADDR, (RTC_SR_BIT_AF|RTC_SR_BIT_OSF), FALSE); /* clearing OSF and AF */
+ rtc_write(RTC_SR_ADDR, (RTC_SR_BIT_AF|RTC_SR_BIT_OSF), false); /* clearing OSF and AF */
/* Initialise DS1374 oriented to MPC8349E-ADS */
rtc_write (RTC_CTL_ADDR, (RTC_CTL_BIT_EN_OSC
|RTC_CTL_BIT_WACE
- |RTC_CTL_BIT_AIE), FALSE);/* start osc, disable WACE, clear AIE
+ |RTC_CTL_BIT_AIE), false);/* start osc, disable WACE, clear AIE
- set to 0 */
rtc_write (RTC_CTL_ADDR, (RTC_CTL_BIT_WD_ALM
|RTC_CTL_BIT_WDSTR
|RTC_CTL_BIT_RS1
|RTC_CTL_BIT_RS2
- |RTC_CTL_BIT_BBSQW), TRUE);/* disable WD/ALM, WDSTR set to INT-pin,
+ |RTC_CTL_BIT_BBSQW), true);/* disable WD/ALM, WDSTR set to INT-pin,
set BBSQW and SQW to 32k
- set to 1 */
tmp.tm_year = 1970;
@@ -229,9 +220,9 @@ void rtc_reset (void){
tmp.tm_year, tmp.tm_mon, tmp.tm_mday,
tmp.tm_hour, tmp.tm_min, tmp.tm_sec);
- rtc_write(RTC_WD_ALM_CNT_BYTE2_ADDR,0xAC, TRUE);
- rtc_write(RTC_WD_ALM_CNT_BYTE1_ADDR,0xDE, TRUE);
- rtc_write(RTC_WD_ALM_CNT_BYTE2_ADDR,0xAD, TRUE);
+ rtc_write(RTC_WD_ALM_CNT_BYTE2_ADDR, 0xAC, true);
+ rtc_write(RTC_WD_ALM_CNT_BYTE1_ADDR, 0xDE, true);
+ rtc_write(RTC_WD_ALM_CNT_BYTE2_ADDR, 0xAD, true);
}
/*
@@ -242,9 +233,9 @@ static uchar rtc_read (uchar reg)
return (i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg));
}
-static void rtc_write (uchar reg, uchar val, boolean_t set)
+static void rtc_write(uchar reg, uchar val, bool set)
{
- if (set == TRUE) {
+ if (set == true) {
val |= i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg);
i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val);
} else {