5 files changed, 50 insertions, 12 deletions
diff --git a/drivers/qe/Makefile b/drivers/qe/Makefile
index 45a2fff..18fe9ce 100644
--- a/drivers/qe/Makefile
+++ b/drivers/qe/Makefile
@@ -25,8 +25,9 @@ include $(TOPDIR)/config.mk
 LIB	:= $(obj)qe.a
 
 COBJS-$(CONFIG_OF_LIBFDT) += fdt.o
-COBJS	:= qe.o uccf.o uec.o uec_phy.o $(COBJS-y)
+COBJS-$(CONFIG_QE) += qe.o uccf.o uec.o uec_phy.o
 
+COBJS	:= $(COBJS-y)
 SRCS	:= $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS))
 
diff --git a/drivers/qe/qe.c b/drivers/qe/qe.c
index 7b6ecd7..e914d01 100644
--- a/drivers/qe/qe.c
+++ b/drivers/qe/qe.c
@@ -27,7 +27,6 @@
 #include "asm/immap_qe.h"
 #include "qe.h"
 
-#if defined(CONFIG_QE)
 qe_map_t		*qe_immr = NULL;
 static qe_snum_t	snums[QE_NUM_OF_SNUM];
 
@@ -466,5 +465,3 @@ U_BOOT_CMD(
 	"fw <addr> [<length>] - Upload firmware binary at address <addr> to "
 		"the QE,\n\twith optional length <length> verification.\n"
 	);
-
-#endif /* CONFIG_QE */
diff --git a/drivers/qe/uccf.c b/drivers/qe/uccf.c
index 4a327ab..7f6337b 100644
--- a/drivers/qe/uccf.c
+++ b/drivers/qe/uccf.c
@@ -28,7 +28,6 @@
 #include "qe.h"
 #include "uccf.h"
 
-#if defined(CONFIG_QE)
 void ucc_fast_transmit_on_demand(ucc_fast_private_t *uccf)
 {
 	out_be16(&uccf->uf_regs->utodr, UCC_FAST_TOD);
@@ -401,4 +400,3 @@ int ucc_fast_init(ucc_fast_info_t *uf_info, ucc_fast_private_t  **uccf_ret)
 	*uccf_ret = uccf;
 	return 0;
 }
-#endif /* CONFIG_QE */
diff --git a/drivers/qe/uec.c b/drivers/qe/uec.c
index d2c430b..344c649 100644
--- a/drivers/qe/uec.c
+++ b/drivers/qe/uec.c
@@ -29,8 +29,7 @@
 #include "uccf.h"
 #include "uec.h"
 #include "uec_phy.h"
-
-#if defined(CONFIG_QE)
+#include "miiphy.h"
 
 #ifdef CONFIG_UEC_ETH1
 static uec_info_t eth1_uec_info = {
@@ -125,6 +124,13 @@ static uec_info_t eth4_uec_info = {
 };
 #endif
 
+#define MAXCONTROLLERS	(4)
+
+static struct eth_device *devlist[MAXCONTROLLERS];
+
+u16 phy_read (struct uec_mii_info *mii_info, u16 regnum);
+void phy_write (struct uec_mii_info *mii_info, u16 regnum, u16 val);
+
 static int uec_mac_enable(uec_private_t *uec, comm_dir_e mode)
 {
 	uec_t		*uec_regs;
@@ -629,6 +635,39 @@ static void phy_change(struct eth_device *dev)
 	adjust_link(dev);
 }
 
+#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) \
+	&& !defined(BITBANGMII)
+
+/*
+ * Read a MII PHY register.
+ *
+ * Returns:
+ *  0 on success
+ */
+static int uec_miiphy_read(char *devname, unsigned char addr,
+			    unsigned char reg, unsigned short *value)
+{
+	*value = uec_read_phy_reg(devlist[0], addr, reg);
+
+	return 0;
+}
+
+/*
+ * Write a MII PHY register.
+ *
+ * Returns:
+ *  0 on success
+ */
+static int uec_miiphy_write(char *devname, unsigned char addr,
+			     unsigned char reg, unsigned short value)
+{
+	uec_write_phy_reg(devlist[0], addr, reg, value);
+
+	return 0;
+}
+
+#endif
+
 static int uec_set_mac_address(uec_private_t *uec, u8 *mac_addr)
 {
 	uec_t		*uec_regs;
@@ -1334,6 +1373,8 @@ int uec_initialize(int index)
 		return -EINVAL;
 	}
 
+	devlist[index] = dev;
+
 	uec->uec_info = uec_info;
 
 	sprintf(dev->name, "FSL UEC%d", index);
@@ -1356,6 +1397,10 @@ int uec_initialize(int index)
 		return err;
 	}
 
+#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) \
+	&& !defined(BITBANGMII)
+	miiphy_register(dev->name, uec_miiphy_read, uec_miiphy_write);
+#endif
+
 	return 1;
 }
-#endif /* CONFIG_QE */
diff --git a/drivers/qe/uec_phy.c b/drivers/qe/uec_phy.c
index 423ba78..186922e 100644
--- a/drivers/qe/uec_phy.c
+++ b/drivers/qe/uec_phy.c
@@ -26,8 +26,6 @@
 #include "uec_phy.h"
 #include "miiphy.h"
 
-#if defined(CONFIG_QE)
-
 #define ugphy_printk(format, arg...)  \
 	printf(format "\n", ## arg)
 
@@ -677,4 +675,3 @@ void change_phy_interface_mode (struct eth_device *dev, enet_interface_e mode)
 	marvell_phy_interface_mode (dev, mode);
 #endif
 }
-#endif /* CONFIG_QE */