diff options
Diffstat (limited to 'drivers/qe')
-rw-r--r-- | drivers/qe/qe.c | 7 | ||||
-rw-r--r-- | drivers/qe/uec.c | 33 | ||||
-rw-r--r-- | drivers/qe/uec.h | 1 | ||||
-rw-r--r-- | drivers/qe/uec_phy.c | 14 | ||||
-rw-r--r-- | drivers/qe/uec_phy.h | 6 |
5 files changed, 33 insertions, 28 deletions
diff --git a/drivers/qe/qe.c b/drivers/qe/qe.c index 0f5232a..7559e92 100644 --- a/drivers/qe/qe.c +++ b/drivers/qe/qe.c @@ -30,6 +30,8 @@ qe_map_t *qe_immr = NULL; static qe_snum_t snums[QE_NUM_OF_SNUM]; +DECLARE_GLOBAL_DATA_PTR; + void qe_issue_cmd(uint cmd, uint sbc, u8 mcn, u32 cmd_data) { u32 cecr; @@ -51,8 +53,6 @@ void qe_issue_cmd(uint cmd, uint sbc, u8 mcn, u32 cmd_data) uint qe_muram_alloc(uint size, uint align) { - DECLARE_GLOBAL_DATA_PTR; - uint retloc; uint align_mask, off; uint savebase; @@ -158,8 +158,6 @@ void qe_put_snum(u8 snum) void qe_init(uint qe_base) { - DECLARE_GLOBAL_DATA_PTR; - /* Init the QE IMMR base */ qe_immr = (qe_map_t *)qe_base; @@ -204,7 +202,6 @@ void qe_assign_page(uint snum, uint para_ram_base) int qe_set_brg(uint brg, uint rate) { - DECLARE_GLOBAL_DATA_PTR; volatile uint *bp; u32 divisor; int div16 = 0; diff --git a/drivers/qe/uec.c b/drivers/qe/uec.c index c416a67..dc2765b 100644 --- a/drivers/qe/uec.c +++ b/drivers/qe/uec.c @@ -391,17 +391,17 @@ static int uec_set_mac_if_mode(uec_private_t *uec, enet_interface_e if_mode) return 0; } -static int init_mii_management_configuration(uec_t *uec_regs) +static int init_mii_management_configuration(uec_mii_t *uec_mii_regs) { uint timeout = 0x1000; u32 miimcfg = 0; - miimcfg = in_be32(&uec_regs->miimcfg); + miimcfg = in_be32(&uec_mii_regs->miimcfg); miimcfg |= MIIMCFG_MNGMNT_CLC_DIV_INIT_VALUE; - out_be32(&uec_regs->miimcfg, miimcfg); + out_be32(&uec_mii_regs->miimcfg, miimcfg); /* Wait until the bus is free */ - while ((in_be32(&uec_regs->miimcfg) & MIIMIND_BUSY) && timeout--); + while ((in_be32(&uec_mii_regs->miimcfg) & MIIMIND_BUSY) && timeout--); if (timeout <= 0) { printf("%s: The MII Bus is stuck!", __FUNCTION__); return -ETIMEDOUT; @@ -413,13 +413,13 @@ static int init_mii_management_configuration(uec_t *uec_regs) static int init_phy(struct eth_device *dev) { uec_private_t *uec; - uec_t *uec_regs; + uec_mii_t *umii_regs; struct uec_mii_info *mii_info; struct phy_info *curphy; int err; uec = (uec_private_t *)dev->priv; - uec_regs = uec->uec_regs; + umii_regs = uec->uec_mii_regs; uec->oldlink = 0; uec->oldspeed = 0; @@ -451,19 +451,19 @@ static int init_phy(struct eth_device *dev) mii_info->mii_id = uec->uec_info->phy_address; mii_info->dev = dev; - mii_info->mdio_read = &read_phy_reg; - mii_info->mdio_write = &write_phy_reg; + mii_info->mdio_read = &uec_read_phy_reg; + mii_info->mdio_write = &uec_write_phy_reg; uec->mii_info = mii_info; - if (init_mii_management_configuration(uec_regs)) { + if (init_mii_management_configuration(umii_regs)) { printf("%s: The MII Bus is stuck!", dev->name); err = -1; goto bus_fail; } /* get info for this PHY */ - curphy = get_phy_info(uec->mii_info); + curphy = uec_get_phy_info(uec->mii_info); if (!curphy) { printf("%s: No PHY found", dev->name); err = -1; @@ -989,6 +989,13 @@ static int uec_startup(uec_private_t *uec) /* Setup MAC interface mode */ uec_set_mac_if_mode(uec, uec_info->enet_interface); + /* Setup MII management base */ +#ifndef CONFIG_eTSEC_MDIO_BUS + uec->uec_mii_regs = (uec_mii_t *)(&uec_regs->miimcfg); +#else + uec->uec_mii_regs = (uec_mii_t *) CONFIG_MIIM_ADDRESS; +#endif + /* Setup MII master clock source */ qe_set_mii_clk_src(uec_info->uf_info.ucc_num); @@ -1103,7 +1110,7 @@ static int uec_init(struct eth_device* dev, bd_t *bd) if (dev->enetaddr[0] & 0x01) { printf("%s: MacAddress is multcast address\n", __FUNCTION__); - return -EINVAL; + return 0; } uec_set_mac_address(uec, dev->enetaddr); uec->the_first_run = 1; @@ -1112,10 +1119,10 @@ static int uec_init(struct eth_device* dev, bd_t *bd) err = uec_open(uec, COMM_DIR_RX_AND_TX); if (err) { printf("%s: cannot enable UEC device\n", dev->name); - return err; + return 0; } - return 0; + return uec->mii_info->link; } static void uec_halt(struct eth_device* dev) diff --git a/drivers/qe/uec.h b/drivers/qe/uec.h index 0495026..c384055 100644 --- a/drivers/qe/uec.h +++ b/drivers/qe/uec.h @@ -675,6 +675,7 @@ typedef struct uec_private { ucc_fast_private_t *uccf; struct eth_device *dev; uec_t *uec_regs; + uec_mii_t *uec_mii_regs; /* enet init command parameter */ uec_init_cmd_pram_t *p_init_enet_param; u32 init_enet_param_offset; diff --git a/drivers/qe/uec_phy.c b/drivers/qe/uec_phy.c index 76fd388..ca6faa6 100644 --- a/drivers/qe/uec_phy.c +++ b/drivers/qe/uec_phy.c @@ -60,14 +60,14 @@ void phy_write (struct uec_mii_info *mii_info, u16 regnum, u16 val); /* Write value to the PHY for this device to the register at regnum, */ /* waiting until the write is done before it returns. All PHY */ /* configuration has to be done through the TSEC1 MIIM regs */ -void write_phy_reg (struct eth_device *dev, int mii_id, int regnum, int value) +void uec_write_phy_reg (struct eth_device *dev, int mii_id, int regnum, int value) { uec_private_t *ugeth = (uec_private_t *) dev->priv; - uec_t *ug_regs; + uec_mii_t *ug_regs; enet_tbi_mii_reg_e mii_reg = (enet_tbi_mii_reg_e) regnum; u32 tmp_reg; - ug_regs = ugeth->uec_regs; + ug_regs = ugeth->uec_mii_regs; /* Stop the MII management read cycle */ out_be32 (&ug_regs->miimcom, 0); @@ -87,15 +87,15 @@ void write_phy_reg (struct eth_device *dev, int mii_id, int regnum, int value) /* Reads from register regnum in the PHY for device dev, */ /* returning the value. Clears miimcom first. All PHY */ /* configuration has to be done through the TSEC1 MIIM regs */ -int read_phy_reg (struct eth_device *dev, int mii_id, int regnum) +int uec_read_phy_reg (struct eth_device *dev, int mii_id, int regnum) { uec_private_t *ugeth = (uec_private_t *) dev->priv; - uec_t *ug_regs; + uec_mii_t *ug_regs; enet_tbi_mii_reg_e mii_reg = (enet_tbi_mii_reg_e) regnum; u32 tmp_reg; u16 value; - ug_regs = ugeth->uec_regs; + ug_regs = ugeth->uec_mii_regs; /* Setting up the MII Mangement Address Register */ tmp_reg = ((u32) mii_id << MIIMADD_PHY_ADDRESS_SHIFT) | mii_reg; @@ -521,7 +521,7 @@ void phy_write (struct uec_mii_info *mii_info, u16 regnum, u16 val) /* Use the PHY ID registers to determine what type of PHY is attached * to device dev. return a struct phy_info structure describing that PHY */ -struct phy_info *get_phy_info (struct uec_mii_info *mii_info) +struct phy_info *uec_get_phy_info (struct uec_mii_info *mii_info) { u16 phy_reg; u32 phy_ID; diff --git a/drivers/qe/uec_phy.h b/drivers/qe/uec_phy.h index 9bd926d..e59a940 100644 --- a/drivers/qe/uec_phy.h +++ b/drivers/qe/uec_phy.h @@ -249,10 +249,10 @@ struct phy_info { void (*close) (struct uec_mii_info * mii_info); }; -struct phy_info *get_phy_info (struct uec_mii_info *mii_info); -void write_phy_reg (struct eth_device *dev, int mii_id, int regnum, +struct phy_info *uec_get_phy_info (struct uec_mii_info *mii_info); +void uec_write_phy_reg (struct eth_device *dev, int mii_id, int regnum, int value); -int read_phy_reg (struct eth_device *dev, int mii_id, int regnum); +int uec_read_phy_reg (struct eth_device *dev, int mii_id, int regnum); void mii_clear_phy_interrupt (struct uec_mii_info *mii_info); void mii_configure_phy_interrupt (struct uec_mii_info *mii_info, u32 interrupts); |