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path: root/drivers/net/e1000.c
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Diffstat (limited to 'drivers/net/e1000.c')
-rw-r--r--drivers/net/e1000.c120
1 files changed, 60 insertions, 60 deletions
diff --git a/drivers/net/e1000.c b/drivers/net/e1000.c
index 8ba98b2..c1863f4 100644
--- a/drivers/net/e1000.c
+++ b/drivers/net/e1000.c
@@ -313,14 +313,14 @@ void e1000_standby_eeprom(struct e1000_hw *hw)
*
* hw - Struct containing variables accessed by shared code
****************************************************************************/
-static boolean_t e1000_is_onboard_nvm_eeprom(struct e1000_hw *hw)
+static bool e1000_is_onboard_nvm_eeprom(struct e1000_hw *hw)
{
uint32_t eecd = 0;
DEBUGFUNC();
if (hw->mac_type == e1000_ich8lan)
- return FALSE;
+ return false;
if (hw->mac_type == e1000_82573 || hw->mac_type == e1000_82574) {
eecd = E1000_READ_REG(hw, EECD);
@@ -330,9 +330,9 @@ static boolean_t e1000_is_onboard_nvm_eeprom(struct e1000_hw *hw)
/* If both bits are set, device is Flash type */
if (eecd == 0x03)
- return FALSE;
+ return false;
}
- return TRUE;
+ return true;
}
/******************************************************************************
@@ -421,8 +421,8 @@ static int32_t e1000_init_eeprom_params(struct e1000_hw *hw)
eeprom->opcode_bits = 3;
eeprom->address_bits = 6;
eeprom->delay_usec = 50;
- eeprom->use_eerd = FALSE;
- eeprom->use_eewr = FALSE;
+ eeprom->use_eerd = false;
+ eeprom->use_eewr = false;
break;
case e1000_82540:
case e1000_82545:
@@ -439,8 +439,8 @@ static int32_t e1000_init_eeprom_params(struct e1000_hw *hw)
eeprom->word_size = 64;
eeprom->address_bits = 6;
}
- eeprom->use_eerd = FALSE;
- eeprom->use_eewr = FALSE;
+ eeprom->use_eerd = false;
+ eeprom->use_eewr = false;
break;
case e1000_82541:
case e1000_82541_rev_2:
@@ -469,8 +469,8 @@ static int32_t e1000_init_eeprom_params(struct e1000_hw *hw)
eeprom->address_bits = 6;
}
}
- eeprom->use_eerd = FALSE;
- eeprom->use_eewr = FALSE;
+ eeprom->use_eerd = false;
+ eeprom->use_eewr = false;
break;
case e1000_82571:
case e1000_82572:
@@ -484,8 +484,8 @@ static int32_t e1000_init_eeprom_params(struct e1000_hw *hw)
eeprom->page_size = 8;
eeprom->address_bits = 8;
}
- eeprom->use_eerd = FALSE;
- eeprom->use_eewr = FALSE;
+ eeprom->use_eerd = false;
+ eeprom->use_eewr = false;
break;
case e1000_82573:
case e1000_82574:
@@ -499,9 +499,9 @@ static int32_t e1000_init_eeprom_params(struct e1000_hw *hw)
eeprom->page_size = 8;
eeprom->address_bits = 8;
}
- eeprom->use_eerd = TRUE;
- eeprom->use_eewr = TRUE;
- if (e1000_is_onboard_nvm_eeprom(hw) == FALSE) {
+ eeprom->use_eerd = true;
+ eeprom->use_eewr = true;
+ if (e1000_is_onboard_nvm_eeprom(hw) == false) {
eeprom->type = e1000_eeprom_flash;
eeprom->word_size = 2048;
@@ -522,8 +522,8 @@ static int32_t e1000_init_eeprom_params(struct e1000_hw *hw)
eeprom->page_size = 8;
eeprom->address_bits = 8;
}
- eeprom->use_eerd = TRUE;
- eeprom->use_eewr = FALSE;
+ eeprom->use_eerd = true;
+ eeprom->use_eewr = false;
break;
/* ich8lan does not support currently. if needed, please
@@ -535,8 +535,8 @@ static int32_t e1000_init_eeprom_params(struct e1000_hw *hw)
int32_t i = 0;
eeprom->type = e1000_eeprom_ich8;
- eeprom->use_eerd = FALSE;
- eeprom->use_eewr = FALSE;
+ eeprom->use_eerd = false;
+ eeprom->use_eewr = false;
eeprom->word_size = E1000_SHADOW_RAM_WORDS;
uint32_t flash_size = E1000_READ_ICH_FLASH_REG(hw,
ICH_FLASH_GFPREG);
@@ -544,7 +544,7 @@ static int32_t e1000_init_eeprom_params(struct e1000_hw *hw)
* so as to save time for driver init */
if (hw->eeprom_shadow_ram != NULL) {
for (i = 0; i < E1000_SHADOW_RAM_WORDS; i++) {
- hw->eeprom_shadow_ram[i].modified = FALSE;
+ hw->eeprom_shadow_ram[i].modified = false;
hw->eeprom_shadow_ram[i].eeprom_word = 0xFFFF;
}
}
@@ -779,8 +779,8 @@ e1000_read_eeprom(struct e1000_hw *hw, uint16_t offset,
* directly. In this case, we need to acquire the EEPROM so that
* FW or other port software does not interrupt.
*/
- if (e1000_is_onboard_nvm_eeprom(hw) == TRUE &&
- hw->eeprom.use_eerd == FALSE) {
+ if (e1000_is_onboard_nvm_eeprom(hw) == true &&
+ hw->eeprom.use_eerd == false) {
/* Prepare the EEPROM for bit-bang reading */
if (e1000_acquire_eeprom(hw) != E1000_SUCCESS)
@@ -788,7 +788,7 @@ e1000_read_eeprom(struct e1000_hw *hw, uint16_t offset,
}
/* Eerd register EEPROM access requires no eeprom aquire/release */
- if (eeprom->use_eerd == TRUE)
+ if (eeprom->use_eerd == true)
return e1000_read_eeprom_eerd(hw, offset, words, data);
/* ich8lan does not support currently. if needed, please
@@ -935,7 +935,7 @@ e1000_set_phy_mode(struct e1000_hw *hw)
if (ret_val)
return ret_val;
- hw->phy_reset_disable = FALSE;
+ hw->phy_reset_disable = false;
}
}
@@ -1098,17 +1098,17 @@ e1000_swfw_sync_acquire(struct e1000_hw *hw, uint16_t mask)
return E1000_SUCCESS;
}
-static boolean_t e1000_is_second_port(struct e1000_hw *hw)
+static bool e1000_is_second_port(struct e1000_hw *hw)
{
switch (hw->mac_type) {
case e1000_80003es2lan:
case e1000_82546:
case e1000_82571:
if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1)
- return TRUE;
+ return true;
/* Fallthrough */
default:
- return FALSE;
+ return false;
}
}
@@ -1373,7 +1373,7 @@ e1000_reset_hw(struct e1000_hw *hw)
E1000_WRITE_FLUSH(hw);
/* The tbi_compatibility_on Flag must be cleared when Rctl is cleared. */
- hw->tbi_compatibility_on = FALSE;
+ hw->tbi_compatibility_on = false;
/* Delay to allow any outstanding PCI transactions to complete before
* resetting the device
@@ -2098,7 +2098,7 @@ e1000_copper_link_preconfig(struct e1000_hw *hw)
hw->mac_type == e1000_82541 || hw->mac_type == e1000_82547 ||
hw->mac_type == e1000_82541_rev_2
|| hw->mac_type == e1000_82547_rev_2)
- hw->phy_reset_disable = FALSE;
+ hw->phy_reset_disable = false;
return E1000_SUCCESS;
}
@@ -2118,7 +2118,7 @@ e1000_copper_link_preconfig(struct e1000_hw *hw)
****************************************************************************/
static int32_t
-e1000_set_d3_lplu_state(struct e1000_hw *hw, boolean_t active)
+e1000_set_d3_lplu_state(struct e1000_hw *hw, bool active)
{
uint32_t phy_ctrl = 0;
int32_t ret_val;
@@ -2253,7 +2253,7 @@ e1000_set_d3_lplu_state(struct e1000_hw *hw, boolean_t active)
****************************************************************************/
static int32_t
-e1000_set_d0_lplu_state(struct e1000_hw *hw, boolean_t active)
+e1000_set_d0_lplu_state(struct e1000_hw *hw, bool active)
{
uint32_t phy_ctrl = 0;
int32_t ret_val;
@@ -2378,7 +2378,7 @@ e1000_copper_link_igp_setup(struct e1000_hw *hw)
/* The NVM settings will configure LPLU in D3 for IGP2 and IGP3 PHYs */
if (hw->phy_type == e1000_phy_igp) {
/* disable lplu d3 during driver init */
- ret_val = e1000_set_d3_lplu_state(hw, FALSE);
+ ret_val = e1000_set_d3_lplu_state(hw, false);
if (ret_val) {
DEBUGOUT("Error Disabling LPLU D3\n");
return ret_val;
@@ -2386,7 +2386,7 @@ e1000_copper_link_igp_setup(struct e1000_hw *hw)
}
/* disable lplu d0 during driver init */
- ret_val = e1000_set_d0_lplu_state(hw, FALSE);
+ ret_val = e1000_set_d0_lplu_state(hw, false);
if (ret_val) {
DEBUGOUT("Error Disabling LPLU D0\n");
return ret_val;
@@ -2495,9 +2495,9 @@ e1000_copper_link_igp_setup(struct e1000_hw *hw)
/*****************************************************************************
* This function checks the mode of the firmware.
*
- * returns - TRUE when the mode is IAMT or FALSE.
+ * returns - true when the mode is IAMT or false.
****************************************************************************/
-boolean_t
+bool
e1000_check_mng_mode(struct e1000_hw *hw)
{
uint32_t fwsm;
@@ -2508,12 +2508,12 @@ e1000_check_mng_mode(struct e1000_hw *hw)
if (hw->mac_type == e1000_ich8lan) {
if ((fwsm & E1000_FWSM_MODE_MASK) ==
(E1000_MNG_ICH_IAMT_MODE << E1000_FWSM_MODE_SHIFT))
- return TRUE;
+ return true;
} else if ((fwsm & E1000_FWSM_MODE_MASK) ==
(E1000_MNG_IAMT_MODE << E1000_FWSM_MODE_SHIFT))
- return TRUE;
+ return true;
- return FALSE;
+ return false;
}
static int32_t
@@ -2675,7 +2675,7 @@ e1000_copper_link_ggp_setup(struct e1000_hw *hw)
* firmware will have already initialized them. We only initialize
* them if the HW is not in IAMT mode.
*/
- if (e1000_check_mng_mode(hw) == FALSE) {
+ if (e1000_check_mng_mode(hw) == false) {
/* Enable Electrical Idle on the PHY */
phy_data |= GG82563_PMCR_ENABLE_ELECTRICAL_IDLE;
ret_val = e1000_write_phy_reg(hw,
@@ -2879,7 +2879,7 @@ e1000_copper_link_autoneg(struct e1000_hw *hw)
}
}
- hw->get_link_status = TRUE;
+ hw->get_link_status = true;
return E1000_SUCCESS;
}
@@ -3598,7 +3598,7 @@ e1000_check_for_link(struct eth_device *nic)
}
if (phy_data & MII_SR_LINK_STATUS) {
- hw->get_link_status = FALSE;
+ hw->get_link_status = false;
} else {
/* No link detected */
return -E1000_ERR_NOLINK;
@@ -3661,7 +3661,7 @@ e1000_check_for_link(struct eth_device *nic)
rctl = E1000_READ_REG(hw, RCTL);
rctl &= ~E1000_RCTL_SBP;
E1000_WRITE_REG(hw, RCTL, rctl);
- hw->tbi_compatibility_on = FALSE;
+ hw->tbi_compatibility_on = false;
}
} else {
/* If TBI compatibility is was previously off, turn it on. For
@@ -3670,7 +3670,7 @@ e1000_check_for_link(struct eth_device *nic)
* will look like CRC errors to to the hardware.
*/
if (!hw->tbi_compatibility_on) {
- hw->tbi_compatibility_on = TRUE;
+ hw->tbi_compatibility_on = true;
rctl = E1000_READ_REG(hw, RCTL);
rctl |= E1000_RCTL_SBP;
E1000_WRITE_REG(hw, RCTL, rctl);
@@ -4569,7 +4569,7 @@ e1000_detect_gig_phy(struct e1000_hw *hw)
{
int32_t phy_init_status, ret_val;
uint16_t phy_id_high, phy_id_low;
- boolean_t match = FALSE;
+ bool match = false;
DEBUGFUNC();
@@ -4609,11 +4609,11 @@ e1000_detect_gig_phy(struct e1000_hw *hw)
switch (hw->mac_type) {
case e1000_82543:
if (hw->phy_id == M88E1000_E_PHY_ID)
- match = TRUE;
+ match = true;
break;
case e1000_82544:
if (hw->phy_id == M88E1000_I_PHY_ID)
- match = TRUE;
+ match = true;
break;
case e1000_82540:
case e1000_82545:
@@ -4621,37 +4621,37 @@ e1000_detect_gig_phy(struct e1000_hw *hw)
case e1000_82546:
case e1000_82546_rev_3:
if (hw->phy_id == M88E1011_I_PHY_ID)
- match = TRUE;
+ match = true;
break;
case e1000_82541:
case e1000_82541_rev_2:
case e1000_82547:
case e1000_82547_rev_2:
if(hw->phy_id == IGP01E1000_I_PHY_ID)
- match = TRUE;
+ match = true;
break;
case e1000_82573:
if (hw->phy_id == M88E1111_I_PHY_ID)
- match = TRUE;
+ match = true;
break;
case e1000_82574:
if (hw->phy_id == BME1000_E_PHY_ID)
- match = TRUE;
+ match = true;
break;
case e1000_80003es2lan:
if (hw->phy_id == GG82563_E_PHY_ID)
- match = TRUE;
+ match = true;
break;
case e1000_ich8lan:
if (hw->phy_id == IGP03E1000_E_PHY_ID)
- match = TRUE;
+ match = true;
if (hw->phy_id == IFE_E_PHY_ID)
- match = TRUE;
+ match = true;
if (hw->phy_id == IFE_PLUS_E_PHY_ID)
- match = TRUE;
+ match = true;
if (hw->phy_id == IFE_C_E_PHY_ID)
- match = TRUE;
+ match = true;
break;
default:
DEBUGOUT("Invalid MAC type %d\n", hw->mac_type);
@@ -4682,7 +4682,7 @@ e1000_set_media_type(struct e1000_hw *hw)
if (hw->mac_type != e1000_82543) {
/* tbi_compatibility is only valid on 82543 */
- hw->tbi_compatibility_en = FALSE;
+ hw->tbi_compatibility_en = false;
}
switch (hw->device_id) {
@@ -4714,7 +4714,7 @@ e1000_set_media_type(struct e1000_hw *hw)
if (status & E1000_STATUS_TBIMODE) {
hw->media_type = e1000_media_type_fiber;
/* tbi_compatibility not valid on fiber */
- hw->tbi_compatibility_en = FALSE;
+ hw->tbi_compatibility_en = false;
} else {
hw->media_type = e1000_media_type_copper;
}
@@ -4788,8 +4788,8 @@ e1000_sw_init(struct eth_device *nic)
hw->media_type = e1000_media_type_fiber;
}
- hw->tbi_compatibility_en = TRUE;
- hw->wait_autoneg_complete = TRUE;
+ hw->tbi_compatibility_en = true;
+ hw->wait_autoneg_complete = true;
if (hw->mac_type < e1000_82543)
hw->report_tx_early = 0;
else
@@ -5194,7 +5194,7 @@ e1000_initialize(bd_t * bis)
hw->original_fc = e1000_fc_default;
hw->autoneg_failed = 0;
hw->autoneg = 1;
- hw->get_link_status = TRUE;
+ hw->get_link_status = true;
hw->hw_addr = pci_map_bar(devno, PCI_BASE_ADDRESS_0,
PCI_REGION_MEM);
hw->mac_type = e1000_undefined;
generated by cgit v1.1 at 2024-11-10 09:07:13 +0000