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path: root/drivers/mtd/spi/sf_ops.c
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Diffstat (limited to 'drivers/mtd/spi/sf_ops.c')
-rw-r--r--drivers/mtd/spi/sf_ops.c157
1 files changed, 128 insertions, 29 deletions
diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c
index e316a69..1f1bb36 100644
--- a/drivers/mtd/spi/sf_ops.c
+++ b/drivers/mtd/spi/sf_ops.c
@@ -9,6 +9,7 @@
*/
#include <common.h>
+#include <malloc.h>
#include <spi.h>
#include <spi_flash.h>
#include <watchdog.h>
@@ -23,13 +24,28 @@ static void spi_flash_addr(u32 addr, u8 *cmd)
cmd[3] = addr >> 0;
}
-int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr)
+int spi_flash_cmd_read_status(struct spi_flash *flash, u8 *rs)
+{
+ int ret;
+ u8 cmd;
+
+ cmd = CMD_READ_STATUS;
+ ret = spi_flash_read_common(flash, &cmd, 1, rs, 1);
+ if (ret < 0) {
+ debug("SF: fail to read status register\n");
+ return ret;
+ }
+
+ return 0;
+}
+
+int spi_flash_cmd_write_status(struct spi_flash *flash, u8 ws)
{
u8 cmd;
int ret;
cmd = CMD_WRITE_STATUS;
- ret = spi_flash_write_common(flash, &cmd, 1, &sr, 1);
+ ret = spi_flash_write_common(flash, &cmd, 1, &ws, 1);
if (ret < 0) {
debug("SF: fail to write status register\n");
return ret;
@@ -38,6 +54,44 @@ int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr)
return 0;
}
+#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
+int spi_flash_cmd_read_config(struct spi_flash *flash, u8 *rc)
+{
+ int ret;
+ u8 cmd;
+
+ cmd = CMD_READ_CONFIG;
+ ret = spi_flash_read_common(flash, &cmd, 1, rc, 1);
+ if (ret < 0) {
+ debug("SF: fail to read config register\n");
+ return ret;
+ }
+
+ return 0;
+}
+
+int spi_flash_cmd_write_config(struct spi_flash *flash, u8 wc)
+{
+ u8 data[2];
+ u8 cmd;
+ int ret;
+
+ ret = spi_flash_cmd_read_status(flash, &data[0]);
+ if (ret < 0)
+ return ret;
+
+ cmd = CMD_WRITE_STATUS;
+ data[1] = wc;
+ ret = spi_flash_write_common(flash, &cmd, 1, &data, 2);
+ if (ret) {
+ debug("SF: fail to write config register\n");
+ return ret;
+ }
+
+ return 0;
+}
+#endif
+
#ifdef CONFIG_SPI_FLASH_BAR
static int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel)
{
@@ -65,7 +119,7 @@ static int spi_flash_bank(struct spi_flash *flash, u32 offset)
u8 bank_sel;
int ret;
- bank_sel = offset / SPI_FLASH_16MB_BOUN;
+ bank_sel = offset / (SPI_FLASH_16MB_BOUN << flash->shift);
ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
if (ret) {
@@ -73,7 +127,29 @@ static int spi_flash_bank(struct spi_flash *flash, u32 offset)
return ret;
}
- return 0;
+ return bank_sel;
+}
+#endif
+
+#ifdef CONFIG_SF_DUAL_FLASH
+static void spi_flash_dual_flash(struct spi_flash *flash, u32 *addr)
+{
+ switch (flash->dual_flash) {
+ case SF_DUAL_STACKED_FLASH:
+ if (*addr >= (flash->size >> 1)) {
+ *addr -= flash->size >> 1;
+ flash->spi->flags |= SPI_XFER_U_PAGE;
+ } else {
+ flash->spi->flags &= ~SPI_XFER_U_PAGE;
+ }
+ break;
+ case SF_DUAL_PARALLEL_FLASH:
+ *addr >>= flash->shift;
+ break;
+ default:
+ debug("SF: Unsupported dual_flash=%d\n", flash->dual_flash);
+ break;
+ }
}
#endif
@@ -81,6 +157,7 @@ int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout)
{
struct spi_slave *spi = flash->spi;
unsigned long timebase;
+ unsigned long flags = SPI_XFER_BEGIN;
int ret;
u8 status;
u8 check_status = 0x0;
@@ -92,7 +169,11 @@ int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout)
check_status = poll_bit;
}
- ret = spi_xfer(spi, 8, &cmd, NULL, SPI_XFER_BEGIN);
+#ifdef CONFIG_SF_DUAL_FLASH
+ if (spi->flags & SPI_XFER_U_PAGE)
+ flags |= SPI_XFER_U_PAGE;
+#endif
+ ret = spi_xfer(spi, 8, &cmd, NULL, flags);
if (ret) {
debug("SF: fail to read %s status register\n",
cmd == CMD_READ_STATUS ? "read" : "flag");
@@ -165,8 +246,8 @@ int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len)
{
- u32 erase_size;
- u8 cmd[4];
+ u32 erase_size, erase_addr;
+ u8 cmd[SPI_FLASH_CMD_LEN];
int ret = -1;
erase_size = flash->erase_size;
@@ -177,15 +258,21 @@ int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len)
cmd[0] = flash->erase_cmd;
while (len) {
+ erase_addr = offset;
+
+#ifdef CONFIG_SF_DUAL_FLASH
+ if (flash->dual_flash > SF_SINGLE_FLASH)
+ spi_flash_dual_flash(flash, &erase_addr);
+#endif
#ifdef CONFIG_SPI_FLASH_BAR
- ret = spi_flash_bank(flash, offset);
+ ret = spi_flash_bank(flash, erase_addr);
if (ret < 0)
return ret;
#endif
- spi_flash_addr(offset, cmd);
+ spi_flash_addr(erase_addr, cmd);
debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
- cmd[2], cmd[3], offset);
+ cmd[2], cmd[3], erase_addr);
ret = spi_flash_write_common(flash, cmd, sizeof(cmd), NULL, 0);
if (ret < 0) {
@@ -204,16 +291,23 @@ int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
size_t len, const void *buf)
{
unsigned long byte_addr, page_size;
+ u32 write_addr;
size_t chunk_len, actual;
- u8 cmd[4];
+ u8 cmd[SPI_FLASH_CMD_LEN];
int ret = -1;
page_size = flash->page_size;
- cmd[0] = CMD_PAGE_PROGRAM;
+ cmd[0] = flash->write_cmd;
for (actual = 0; actual < len; actual += chunk_len) {
+ write_addr = offset;
+
+#ifdef CONFIG_SF_DUAL_FLASH
+ if (flash->dual_flash > SF_SINGLE_FLASH)
+ spi_flash_dual_flash(flash, &write_addr);
+#endif
#ifdef CONFIG_SPI_FLASH_BAR
- ret = spi_flash_bank(flash, offset);
+ ret = spi_flash_bank(flash, write_addr);
if (ret < 0)
return ret;
#endif
@@ -223,9 +317,9 @@ int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
if (flash->spi->max_write_size)
chunk_len = min(chunk_len, flash->spi->max_write_size);
- spi_flash_addr(offset, cmd);
+ spi_flash_addr(write_addr, cmd);
- debug("PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n",
+ debug("SF: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n",
buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
ret = spi_flash_write_common(flash, cmd, sizeof(cmd),
@@ -267,8 +361,9 @@ int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
size_t len, void *data)
{
- u8 cmd[5], bank_sel = 0;
- u32 remain_len, read_len;
+ u8 *cmd, cmdsz;
+ u32 remain_len, read_len, read_addr;
+ int bank_sel = 0;
int ret = -1;
/* Handle memory-mapped SPI */
@@ -285,29 +380,33 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
return 0;
}
- cmd[0] = CMD_READ_ARRAY_FAST;
- cmd[4] = 0x00;
+ cmdsz = SPI_FLASH_CMD_LEN + flash->dummy_byte;
+ cmd = malloc(cmdsz);
+ memset(cmd, 0, cmdsz);
+ cmd[0] = flash->read_cmd;
while (len) {
-#ifdef CONFIG_SPI_FLASH_BAR
- bank_sel = offset / SPI_FLASH_16MB_BOUN;
+ read_addr = offset;
- ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
- if (ret) {
- debug("SF: fail to set bank%d\n", bank_sel);
+#ifdef CONFIG_SF_DUAL_FLASH
+ if (flash->dual_flash > SF_SINGLE_FLASH)
+ spi_flash_dual_flash(flash, &read_addr);
+#endif
+#ifdef CONFIG_SPI_FLASH_BAR
+ bank_sel = spi_flash_bank(flash, read_addr);
+ if (bank_sel < 0)
return ret;
- }
#endif
- remain_len = (SPI_FLASH_16MB_BOUN * (bank_sel + 1)) - offset;
+ remain_len = ((SPI_FLASH_16MB_BOUN << flash->shift) *
+ (bank_sel + 1)) - offset;
if (len < remain_len)
read_len = len;
else
read_len = remain_len;
- spi_flash_addr(offset, cmd);
+ spi_flash_addr(read_addr, cmd);
- ret = spi_flash_read_common(flash, cmd, sizeof(cmd),
- data, read_len);
+ ret = spi_flash_read_common(flash, cmd, cmdsz, data, read_len);
if (ret < 0) {
debug("SF: read failed\n");
break;
generated by cgit v1.1 at 2024-12-20 17:51:23 +0000