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path: root/drivers/i2c/tegra_i2c.c
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Diffstat (limited to 'drivers/i2c/tegra_i2c.c')
-rw-r--r--drivers/i2c/tegra_i2c.c78
1 files changed, 61 insertions, 17 deletions
diff --git a/drivers/i2c/tegra_i2c.c b/drivers/i2c/tegra_i2c.c
index ca71cd3..8fa1cda 100644
--- a/drivers/i2c/tegra_i2c.c
+++ b/drivers/i2c/tegra_i2c.c
@@ -284,7 +284,8 @@ exit:
return error;
}
-static int tegra_i2c_write_data(u32 addr, u8 *data, u32 len)
+static int tegra_i2c_write_data(struct i2c_bus *bus, u32 addr, u8 *data,
+ u32 len)
{
int error;
struct i2c_trans_info trans_info;
@@ -295,14 +296,15 @@ static int tegra_i2c_write_data(u32 addr, u8 *data, u32 len)
trans_info.num_bytes = len;
trans_info.is_10bit_address = 0;
- error = send_recv_packets(&i2c_controllers[i2c_bus_num], &trans_info);
+ error = send_recv_packets(bus, &trans_info);
if (error)
debug("tegra_i2c_write_data: Error (%d) !!!\n", error);
return error;
}
-static int tegra_i2c_read_data(u32 addr, u8 *data, u32 len)
+static int tegra_i2c_read_data(struct i2c_bus *bus, u32 addr, u8 *data,
+ u32 len)
{
int error;
struct i2c_trans_info trans_info;
@@ -313,7 +315,7 @@ static int tegra_i2c_read_data(u32 addr, u8 *data, u32 len)
trans_info.num_bytes = len;
trans_info.is_10bit_address = 0;
- error = send_recv_packets(&i2c_controllers[i2c_bus_num], &trans_info);
+ error = send_recv_packets(bus, &trans_info);
if (error)
debug("tegra_i2c_read_data: Error (%d) !!!\n", error);
@@ -324,18 +326,48 @@ static int tegra_i2c_read_data(u32 addr, u8 *data, u32 len)
#error "Please enable device tree support to use this driver"
#endif
+/**
+ * Check that a bus number is valid and return a pointer to it
+ *
+ * @param bus_num Bus number to check / return
+ * @return pointer to bus, if valid, else NULL
+ */
+static struct i2c_bus *tegra_i2c_get_bus(unsigned int bus_num)
+{
+ struct i2c_bus *bus;
+
+ if (bus_num >= TEGRA_I2C_NUM_CONTROLLERS) {
+ debug("%s: Invalid bus number %u\n", __func__, bus_num);
+ return NULL;
+ }
+ bus = &i2c_controllers[bus_num];
+ if (!bus->inited) {
+ debug("%s: Bus %u not available\n", __func__, bus_num);
+ return NULL;
+ }
+
+ return bus;
+}
+
unsigned int i2c_get_bus_speed(void)
{
- return i2c_controllers[i2c_bus_num].speed;
+ struct i2c_bus *bus;
+
+ bus = tegra_i2c_get_bus(i2c_bus_num);
+ if (!bus)
+ return 0;
+ return bus->speed;
}
int i2c_set_bus_speed(unsigned int speed)
{
- struct i2c_bus *i2c_bus;
+ struct i2c_bus *bus;
- i2c_bus = &i2c_controllers[i2c_bus_num];
- i2c_bus->speed = speed;
- i2c_init_controller(i2c_bus);
+ bus = tegra_i2c_get_bus(i2c_bus_num);
+ if (!bus)
+ return 0;
+ bus->speed = speed;
+ i2c_init_controller(bus);
return 0;
}
@@ -458,7 +490,7 @@ void i2c_init(int speed, int slaveaddr)
}
/* i2c write version without the register address */
-int i2c_write_data(uchar chip, uchar *buffer, int len)
+int i2c_write_data(struct i2c_bus *bus, uchar chip, uchar *buffer, int len)
{
int rc;
@@ -470,7 +502,7 @@ int i2c_write_data(uchar chip, uchar *buffer, int len)
debug("\n");
/* Shift 7-bit address over for lower-level i2c functions */
- rc = tegra_i2c_write_data(chip << 1, buffer, len);
+ rc = tegra_i2c_write_data(bus, chip << 1, buffer, len);
if (rc)
debug("i2c_write_data(): rc=%d\n", rc);
@@ -478,13 +510,13 @@ int i2c_write_data(uchar chip, uchar *buffer, int len)
}
/* i2c read version without the register address */
-int i2c_read_data(uchar chip, uchar *buffer, int len)
+int i2c_read_data(struct i2c_bus *bus, uchar chip, uchar *buffer, int len)
{
int rc;
debug("inside i2c_read_data():\n");
/* Shift 7-bit address over for lower-level i2c functions */
- rc = tegra_i2c_read_data(chip << 1, buffer, len);
+ rc = tegra_i2c_read_data(bus, chip << 1, buffer, len);
if (rc) {
debug("i2c_read_data(): rc=%d\n", rc);
return rc;
@@ -502,12 +534,16 @@ int i2c_read_data(uchar chip, uchar *buffer, int len)
/* Probe to see if a chip is present. */
int i2c_probe(uchar chip)
{
+ struct i2c_bus *bus;
int rc;
uchar reg;
debug("i2c_probe: addr=0x%x\n", chip);
+ bus = tegra_i2c_get_bus(i2c_get_bus_num());
+ if (!bus)
+ return 1;
reg = 0;
- rc = i2c_write_data(chip, &reg, 1);
+ rc = i2c_write_data(bus, chip, &reg, 1);
if (rc) {
debug("Error probing 0x%x.\n", chip);
return 1;
@@ -524,11 +560,15 @@ static int i2c_addr_ok(const uint addr, const int alen)
/* Read bytes */
int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
{
+ struct i2c_bus *bus;
uint offset;
int i;
debug("i2c_read: chip=0x%x, addr=0x%x, len=0x%x\n",
chip, addr, len);
+ bus = tegra_i2c_get_bus(i2c_bus_num);
+ if (!bus)
+ return 1;
if (!i2c_addr_ok(addr, alen)) {
debug("i2c_read: Bad address %x.%d.\n", addr, alen);
return 1;
@@ -540,13 +580,13 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
data[alen - i - 1] =
(addr + offset) >> (8 * i);
}
- if (i2c_write_data(chip, data, alen)) {
+ if (i2c_write_data(bus, chip, data, alen)) {
debug("i2c_read: error sending (0x%x)\n",
addr);
return 1;
}
}
- if (i2c_read_data(chip, buffer + offset, 1)) {
+ if (i2c_read_data(bus, chip, buffer + offset, 1)) {
debug("i2c_read: error reading (0x%x)\n", addr);
return 1;
}
@@ -558,11 +598,15 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
/* Write bytes */
int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
{
+ struct i2c_bus *bus;
uint offset;
int i;
debug("i2c_write: chip=0x%x, addr=0x%x, len=0x%x\n",
chip, addr, len);
+ bus = tegra_i2c_get_bus(i2c_bus_num);
+ if (!bus)
+ return 1;
if (!i2c_addr_ok(addr, alen)) {
debug("i2c_write: Bad address %x.%d.\n", addr, alen);
return 1;
@@ -572,7 +616,7 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
for (i = 0; i < alen; i++)
data[alen - i - 1] = (addr + offset) >> (8 * i);
data[alen] = buffer[offset];
- if (i2c_write_data(chip, data, alen + 1)) {
+ if (i2c_write_data(bus, chip, data, alen + 1)) {
debug("i2c_write: error sending (0x%x)\n", addr);
return 1;
}