diff options
Diffstat (limited to 'doc')
| -rw-r--r-- | doc/README.mxc_hab | 12 | ||||
| -rw-r--r-- | doc/README.scrapyard | 19 | ||||
| -rw-r--r-- | doc/device-tree-bindings/gpu/nvidia,tegra20-host1x.txt | 372 | ||||
| -rw-r--r-- | doc/device-tree-bindings/pmic/max77686.txt | 35 | ||||
| -rw-r--r-- | doc/device-tree-bindings/pmic/sandbox.txt | 35 | ||||
| -rw-r--r-- | doc/device-tree-bindings/regulator/fixed.txt | 38 | ||||
| -rw-r--r-- | doc/device-tree-bindings/regulator/max77686.txt | 70 | ||||
| -rw-r--r-- | doc/device-tree-bindings/regulator/regulator.txt | 54 | ||||
| -rw-r--r-- | doc/device-tree-bindings/regulator/sandbox.txt | 45 | ||||
| -rw-r--r-- | doc/device-tree-bindings/serial/pl01x.txt | 7 | ||||
| -rw-r--r-- | doc/device-tree-bindings/video/display-timing.txt | 110 | ||||
| -rw-r--r-- | doc/driver-model/pmic-framework.txt | 140 | ||||
| -rw-r--r-- | doc/git-mailrc | 3 |
13 files changed, 928 insertions, 12 deletions
diff --git a/doc/README.mxc_hab b/doc/README.mxc_hab index a1b1d34..b688580 100644 --- a/doc/README.mxc_hab +++ b/doc/README.mxc_hab @@ -1,7 +1,13 @@ High Assurance Boot (HAB) for i.MX6 CPUs -To authenticate U-Boot only by the CPU there is no code required in -U-Boot itself. However, the U-Boot image to be programmed into the +To enable the authenticated or encrypted boot mode of U-Boot, it is +required to set the proper configuration for the target board. This +is done by adding the following configuration in in the proper config +file (e.g. include/configs/mx6qarm2.h) + +#define CONFIG_SECURE_BOOT + +In addition, the U-Boot image to be programmed into the boot media needs to be properly constructed, i.e. it must contain a proper Command Sequence File (CSF). @@ -69,7 +75,7 @@ CONFIG_SECURE_BOOT CONFIG_SYS_FSL_SEC_COMPAT 4 /* HAB version */ CONFIG_FSL_CAAM CONFIG_CMD_DEKBLOB -CONFIG_SYS_FSL_LE +CONFIG_SYS_FSL_SEC_LE Note: The encrypted boot feature is only supported by HABv4 or greater. diff --git a/doc/README.scrapyard b/doc/README.scrapyard index 59d2142..aa2b07b 100644 --- a/doc/README.scrapyard +++ b/doc/README.scrapyard @@ -12,14 +12,17 @@ The list should be sorted in reverse chronological order. Board Arch CPU Commit Removed Last known maintainer/contact ================================================================================================= -korat powerpc ppc4xx - - Larry Johnson <lrj@acm.org> -galaxy5200 powerpc mpc5xxx - - Eric Millbrandt <emillbrandt@dekaresearch.com> -W7OLMC powerpc ppc4xx - - Erik Theisen <etheisen@mindspring.com> -W7OLMG powerpc ppc4xx - - Erik Theisen <etheisen@mindspring.com> -aev powerpc mpc5xxx - - -TB5200 powerpc mpc5xxx - - -JSE powerpc ppc4xx - - Stephen Williams <steve@icarus.com> -BC3450 powerpc mpc5xxx - - +afeb9260 arm arm926ejs - - Sergey Lapin <slapin@ossfans.org> +tny_a9260 arm arm926ejs - - Albin Tonnerre <albin.tonnerre@free-electrons.com> +sbc35_a9g20 arm arm926ejs - - Albin Tonnerre <albin.tonnerre@free-electrons.com> +korat powerpc ppc4xx 5043045d 2015-03-17 Larry Johnson <lrj@acm.org> +galaxy5200 powerpc mpc5xxx 41eb4e5c 2015-03-17 Eric Millbrandt <emillbrandt@dekaresearch.com> +W7OLMC powerpc ppc4xx 6beecd5d 2015-03-17 Erik Theisen <etheisen@mindspring.com> +W7OLMG powerpc ppc4xx 6beecd5d 2015-03-17 Erik Theisen <etheisen@mindspring.com> +aev powerpc mpc5xxx 470ee8b1 2015-03-17 +TB5200 powerpc mpc5xxx 470ee8b1 2015-03-17 +JSE powerpc ppc4xx 2da8137b 2015-03-17 Stephen Williams <steve@icarus.com> +BC3450 powerpc mpc5xxx f8296d69 2015-03-17 hawkboard arm arm926ejs cb957cda 2015-02-24 Syed Mohammed Khasim <sm.khasim@gmail.com>:Sughosh Ganu <urwithsughosh@gmail.com> tnetv107x arm arm1176 50b82c4b 2015-02-24 Chan-Taek Park <c-park@ti.com> a320evb arm arm920t 29fc6f24 2015-02-24 Po-Yu Chuang <ratbert@faraday-tech.com> diff --git a/doc/device-tree-bindings/gpu/nvidia,tegra20-host1x.txt b/doc/device-tree-bindings/gpu/nvidia,tegra20-host1x.txt new file mode 100644 index 0000000..b48f4ef --- /dev/null +++ b/doc/device-tree-bindings/gpu/nvidia,tegra20-host1x.txt @@ -0,0 +1,372 @@ +NVIDIA Tegra host1x + +Required properties: +- compatible: "nvidia,tegra<chip>-host1x" +- reg: Physical base address and length of the controller's registers. +- interrupts: The interrupt outputs from the controller. +- #address-cells: The number of cells used to represent physical base addresses + in the host1x address space. Should be 1. +- #size-cells: The number of cells used to represent the size of an address + range in the host1x address space. Should be 1. +- ranges: The mapping of the host1x address space to the CPU address space. +- clocks: Must contain one entry, for the module clock. + See ../clocks/clock-bindings.txt for details. +- resets: Must contain an entry for each entry in reset-names. + See ../reset/reset.txt for details. +- reset-names: Must include the following entries: + - host1x + +The host1x top-level node defines a number of children, each representing one +of the following host1x client modules: + +- mpe: video encoder + + Required properties: + - compatible: "nvidia,tegra<chip>-mpe" + - reg: Physical base address and length of the controller's registers. + - interrupts: The interrupt outputs from the controller. + - clocks: Must contain one entry, for the module clock. + See ../clocks/clock-bindings.txt for details. + - resets: Must contain an entry for each entry in reset-names. + See ../reset/reset.txt for details. + - reset-names: Must include the following entries: + - mpe + +- vi: video input + + Required properties: + - compatible: "nvidia,tegra<chip>-vi" + - reg: Physical base address and length of the controller's registers. + - interrupts: The interrupt outputs from the controller. + - clocks: Must contain one entry, for the module clock. + See ../clocks/clock-bindings.txt for details. + - resets: Must contain an entry for each entry in reset-names. + See ../reset/reset.txt for details. + - reset-names: Must include the following entries: + - vi + +- epp: encoder pre-processor + + Required properties: + - compatible: "nvidia,tegra<chip>-epp" + - reg: Physical base address and length of the controller's registers. + - interrupts: The interrupt outputs from the controller. + - clocks: Must contain one entry, for the module clock. + See ../clocks/clock-bindings.txt for details. + - resets: Must contain an entry for each entry in reset-names. + See ../reset/reset.txt for details. + - reset-names: Must include the following entries: + - epp + +- isp: image signal processor + + Required properties: + - compatible: "nvidia,tegra<chip>-isp" + - reg: Physical base address and length of the controller's registers. + - interrupts: The interrupt outputs from the controller. + - clocks: Must contain one entry, for the module clock. + See ../clocks/clock-bindings.txt for details. + - resets: Must contain an entry for each entry in reset-names. + See ../reset/reset.txt for details. + - reset-names: Must include the following entries: + - isp + +- gr2d: 2D graphics engine + + Required properties: + - compatible: "nvidia,tegra<chip>-gr2d" + - reg: Physical base address and length of the controller's registers. + - interrupts: The interrupt outputs from the controller. + - clocks: Must contain one entry, for the module clock. + See ../clocks/clock-bindings.txt for details. + - resets: Must contain an entry for each entry in reset-names. + See ../reset/reset.txt for details. + - reset-names: Must include the following entries: + - 2d + +- gr3d: 3D graphics engine + + Required properties: + - compatible: "nvidia,tegra<chip>-gr3d" + - reg: Physical base address and length of the controller's registers. + - clocks: Must contain an entry for each entry in clock-names. + See ../clocks/clock-bindings.txt for details. + - clock-names: Must include the following entries: + (This property may be omitted if the only clock in the list is "3d") + - 3d + This MUST be the first entry. + - 3d2 (Only required on SoCs with two 3D clocks) + - resets: Must contain an entry for each entry in reset-names. + See ../reset/reset.txt for details. + - reset-names: Must include the following entries: + - 3d + - 3d2 (Only required on SoCs with two 3D clocks) + +- dc: display controller + + Required properties: + - compatible: "nvidia,tegra<chip>-dc" + - reg: Physical base address and length of the controller's registers. + - interrupts: The interrupt outputs from the controller. + - clocks: Must contain an entry for each entry in clock-names. + See ../clocks/clock-bindings.txt for details. + - clock-names: Must include the following entries: + - dc + This MUST be the first entry. + - parent + - resets: Must contain an entry for each entry in reset-names. + See ../reset/reset.txt for details. + - reset-names: Must include the following entries: + - dc + - nvidia,head: The number of the display controller head. This is used to + setup the various types of output to receive video data from the given + head. + + Each display controller node has a child node, named "rgb", that represents + the RGB output associated with the controller. It can take the following + optional properties: + - nvidia,ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing + - nvidia,hpd-gpio: specifies a GPIO used for hotplug detection + - nvidia,edid: supplies a binary EDID blob + - nvidia,panel: phandle of a display panel + +- hdmi: High Definition Multimedia Interface + + Required properties: + - compatible: "nvidia,tegra<chip>-hdmi" + - reg: Physical base address and length of the controller's registers. + - interrupts: The interrupt outputs from the controller. + - hdmi-supply: supply for the +5V HDMI connector pin + - vdd-supply: regulator for supply voltage + - pll-supply: regulator for PLL + - clocks: Must contain an entry for each entry in clock-names. + See ../clocks/clock-bindings.txt for details. + - clock-names: Must include the following entries: + - hdmi + This MUST be the first entry. + - parent + - resets: Must contain an entry for each entry in reset-names. + See ../reset/reset.txt for details. + - reset-names: Must include the following entries: + - hdmi + + Optional properties: + - nvidia,ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing + - nvidia,hpd-gpio: specifies a GPIO used for hotplug detection + - nvidia,edid: supplies a binary EDID blob + - nvidia,panel: phandle of a display panel + +- tvo: TV encoder output + + Required properties: + - compatible: "nvidia,tegra<chip>-tvo" + - reg: Physical base address and length of the controller's registers. + - interrupts: The interrupt outputs from the controller. + - clocks: Must contain one entry, for the module clock. + See ../clocks/clock-bindings.txt for details. + +- dsi: display serial interface + + Required properties: + - compatible: "nvidia,tegra<chip>-dsi" + - reg: Physical base address and length of the controller's registers. + - clocks: Must contain an entry for each entry in clock-names. + See ../clocks/clock-bindings.txt for details. + - clock-names: Must include the following entries: + - dsi + This MUST be the first entry. + - lp + - parent + - resets: Must contain an entry for each entry in reset-names. + See ../reset/reset.txt for details. + - reset-names: Must include the following entries: + - dsi + - avdd-dsi-supply: phandle of a supply that powers the DSI controller + - nvidia,mipi-calibrate: Should contain a phandle and a specifier specifying + which pads are used by this DSI output and need to be calibrated. See also + ../mipi/nvidia,tegra114-mipi.txt. + + Optional properties: + - nvidia,ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing + - nvidia,hpd-gpio: specifies a GPIO used for hotplug detection + - nvidia,edid: supplies a binary EDID blob + - nvidia,panel: phandle of a display panel + +- sor: serial output resource + + Required properties: + - compatible: "nvidia,tegra124-sor" + - reg: Physical base address and length of the controller's registers. + - interrupts: The interrupt outputs from the controller. + - clocks: Must contain an entry for each entry in clock-names. + See ../clocks/clock-bindings.txt for details. + - clock-names: Must include the following entries: + - sor: clock input for the SOR hardware + - parent: input for the pixel clock + - dp: reference clock for the SOR clock + - safe: safe reference for the SOR clock during power up + - resets: Must contain an entry for each entry in reset-names. + See ../reset/reset.txt for details. + - reset-names: Must include the following entries: + - sor + + Optional properties: + - nvidia,ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing + - nvidia,hpd-gpio: specifies a GPIO used for hotplug detection + - nvidia,edid: supplies a binary EDID blob + - nvidia,panel: phandle of a display panel + + Optional properties when driving an eDP output: + - nvidia,dpaux: phandle to a DispayPort AUX interface + +- dpaux: DisplayPort AUX interface + - compatible: "nvidia,tegra124-dpaux" + - reg: Physical base address and length of the controller's registers. + - interrupts: The interrupt outputs from the controller. + - clocks: Must contain an entry for each entry in clock-names. + See ../clocks/clock-bindings.txt for details. + - clock-names: Must include the following entries: + - dpaux: clock input for the DPAUX hardware + - parent: reference clock + - resets: Must contain an entry for each entry in reset-names. + See ../reset/reset.txt for details. + - reset-names: Must include the following entries: + - dpaux + - vdd-supply: phandle of a supply that powers the DisplayPort link + +Example: + +/ { + ... + + host1x { + compatible = "nvidia,tegra20-host1x", "simple-bus"; + reg = <0x50000000 0x00024000>; + interrupts = <0 65 0x04 /* mpcore syncpt */ + 0 67 0x04>; /* mpcore general */ + clocks = <&tegra_car TEGRA20_CLK_HOST1X>; + resets = <&tegra_car 28>; + reset-names = "host1x"; + + #address-cells = <1>; + #size-cells = <1>; + + ranges = <0x54000000 0x54000000 0x04000000>; + + mpe { + compatible = "nvidia,tegra20-mpe"; + reg = <0x54040000 0x00040000>; + interrupts = <0 68 0x04>; + clocks = <&tegra_car TEGRA20_CLK_MPE>; + resets = <&tegra_car 60>; + reset-names = "mpe"; + }; + + vi { + compatible = "nvidia,tegra20-vi"; + reg = <0x54080000 0x00040000>; + interrupts = <0 69 0x04>; + clocks = <&tegra_car TEGRA20_CLK_VI>; + resets = <&tegra_car 100>; + reset-names = "vi"; + }; + + epp { + compatible = "nvidia,tegra20-epp"; + reg = <0x540c0000 0x00040000>; + interrupts = <0 70 0x04>; + clocks = <&tegra_car TEGRA20_CLK_EPP>; + resets = <&tegra_car 19>; + reset-names = "epp"; + }; + + isp { + compatible = "nvidia,tegra20-isp"; + reg = <0x54100000 0x00040000>; + interrupts = <0 71 0x04>; + clocks = <&tegra_car TEGRA20_CLK_ISP>; + resets = <&tegra_car 23>; + reset-names = "isp"; + }; + + gr2d { + compatible = "nvidia,tegra20-gr2d"; + reg = <0x54140000 0x00040000>; + interrupts = <0 72 0x04>; + clocks = <&tegra_car TEGRA20_CLK_GR2D>; + resets = <&tegra_car 21>; + reset-names = "2d"; + }; + + gr3d { + compatible = "nvidia,tegra20-gr3d"; + reg = <0x54180000 0x00040000>; + clocks = <&tegra_car TEGRA20_CLK_GR3D>; + resets = <&tegra_car 24>; + reset-names = "3d"; + }; + + dc@54200000 { + compatible = "nvidia,tegra20-dc"; + reg = <0x54200000 0x00040000>; + interrupts = <0 73 0x04>; + clocks = <&tegra_car TEGRA20_CLK_DISP1>, + <&tegra_car TEGRA20_CLK_PLL_P>; + clock-names = "dc", "parent"; + resets = <&tegra_car 27>; + reset-names = "dc"; + + rgb { + status = "disabled"; + }; + }; + + dc@54240000 { + compatible = "nvidia,tegra20-dc"; + reg = <0x54240000 0x00040000>; + interrupts = <0 74 0x04>; + clocks = <&tegra_car TEGRA20_CLK_DISP2>, + <&tegra_car TEGRA20_CLK_PLL_P>; + clock-names = "dc", "parent"; + resets = <&tegra_car 26>; + reset-names = "dc"; + + rgb { + status = "disabled"; + }; + }; + + hdmi { + compatible = "nvidia,tegra20-hdmi"; + reg = <0x54280000 0x00040000>; + interrupts = <0 75 0x04>; + clocks = <&tegra_car TEGRA20_CLK_HDMI>, + <&tegra_car TEGRA20_CLK_PLL_D_OUT0>; + clock-names = "hdmi", "parent"; + resets = <&tegra_car 51>; + reset-names = "hdmi"; + status = "disabled"; + }; + + tvo { + compatible = "nvidia,tegra20-tvo"; + reg = <0x542c0000 0x00040000>; + interrupts = <0 76 0x04>; + clocks = <&tegra_car TEGRA20_CLK_TVO>; + status = "disabled"; + }; + + dsi { + compatible = "nvidia,tegra20-dsi"; + reg = <0x54300000 0x00040000>; + clocks = <&tegra_car TEGRA20_CLK_DSI>, + <&tegra_car TEGRA20_CLK_PLL_D_OUT0>; + clock-names = "dsi", "parent"; + resets = <&tegra_car 48>; + reset-names = "dsi"; + status = "disabled"; + }; + }; + + ... +}; diff --git a/doc/device-tree-bindings/pmic/max77686.txt b/doc/device-tree-bindings/pmic/max77686.txt new file mode 100644 index 0000000..09aee64 --- /dev/null +++ b/doc/device-tree-bindings/pmic/max77686.txt @@ -0,0 +1,35 @@ +MAXIM, MAX77686 pmic + +This device uses two drivers: +- drivers/power/pmic/max77686.c (for parent device) +- drivers/power/regulator/max77686.c (for child regulators) + +This file describes the binding info for the PMIC driver. + +To bind the regulators, please read the additional binding info: +- doc/device-tree-bindings/regulator/max77686.txt + +Required properties: +- compatible: "maxim,max77686" +- reg = 0x9 + +With those two properties, the pmic device can be used for read/write only. +To bind each regulator, the optional regulators subnode should exists. + +Optional subnode: +- voltage-regulators: subnode list of each device's regulator + (see max77686.txt - regulator binding info) + +Example: + +max77686@09 { + compatible = "maxim,max77686"; + reg = <0x09>; + + voltage-regulators { + ldo1 { + ... + }; + ... + }; +}; diff --git a/doc/device-tree-bindings/pmic/sandbox.txt b/doc/device-tree-bindings/pmic/sandbox.txt new file mode 100644 index 0000000..d84c977 --- /dev/null +++ b/doc/device-tree-bindings/pmic/sandbox.txt @@ -0,0 +1,35 @@ +Sandbox pmic + +This device uses two drivers: +- drivers/power/pmic/sandbox.c (for parent device) +- drivers/power/regulator/sandbox.c (for child regulators) + +This file describes the binding info for the PMIC driver. + +To bind the regulators, please read the regulator binding info: +- doc/device-tree-bindings/regulator/sandbox.txt + +Required PMIC node properties: +- compatible: "sandbox,pmic" +- reg = 0x40 + +Required PMIC's "emul" subnode, with property: +- compatible: "sandbox,i2c-pmic" + +With the above properties, the pmic device can be used for read/write only. +To bind each regulator, the optional regulator subnodes should exists. + +Optional subnodes: +- ldo/buck subnodes of each device's regulator (see regulator binding info) + +Example: + +sandbox_pmic { + compatible = "sandbox,pmic"; + reg = <0x40>; + + /* Mandatory for I/O */ + emul { + compatible = "sandbox,i2c-pmic"; + }; +}; diff --git a/doc/device-tree-bindings/regulator/fixed.txt b/doc/device-tree-bindings/regulator/fixed.txt new file mode 100644 index 0000000..4ff39b8 --- /dev/null +++ b/doc/device-tree-bindings/regulator/fixed.txt @@ -0,0 +1,38 @@ +Fixed Voltage regulator + +Binding: +The binding is done by the property "compatible" - this is different, than for +binding by the node prefix (doc/device-tree-bindings/regulator/regulator.txt). + +Required properties: +- compatible: "regulator-fixed" +- regulator-name: this is required by the regulator uclass + +Optional properties: +- gpio: GPIO to use for enable control +- regulator constraints (binding info: regulator.txt) + +Other kernel-style properties, are currently not used. + +Note: +For the regulator constraints, driver expects that: +- regulator-min-microvolt is equal to regulator-max-microvolt +- regulator-min-microamp is equal to regulator-max-microamp + +Example: +fixed_regulator@0 { + /* Mandatory */ + compatible = "regulator-fixed"; + regulator-name = "LED_3.3V"; + + /* Optional: */ + gpio = <&gpc1 0 GPIO_ACTIVE_LOW>; + + /* Optional for regulator uclass */ + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-min-microamp = <15000>; + regulator-max-microamp = <15000>; + regulator-always-on; + regulator-boot-on; +}; diff --git a/doc/device-tree-bindings/regulator/max77686.txt b/doc/device-tree-bindings/regulator/max77686.txt new file mode 100644 index 0000000..ae9b1b6 --- /dev/null +++ b/doc/device-tree-bindings/regulator/max77686.txt @@ -0,0 +1,70 @@ +MAXIM, MAX77686 regulators + +This device uses two drivers: +- drivers/power/pmic/max77686.c (as parent I/O device) +- drivers/power/regulator/max77686.c (for child regulators) + +This file describes the binding info for the REGULATOR driver. + +First, please read the binding info for the pmic: +- doc/device-tree-bindings/pmic/max77686.txt + +Required subnode: +- voltage-regulators: required for the PMIC driver + +Required properties: +- regulator-name: used for regulator uclass platform data '.name' + +Optional: +- regulator-min-microvolt: minimum allowed Voltage to set +- regulator-max-microvolt: minimum allowed Voltage to set +- regulator-always-on: regulator should be never disabled +- regulator-boot-on: regulator should be enabled by the bootloader + +Example: +(subnode of max77686 pmic node) +voltage-regulators { + ldo1 { + regulator-name = "VDD_ALIVE_1.0V"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo2 { + regulator-name = "VDDQ_VM1M2_1.2V"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + regulator-boot-on; + }; + . + . + . + ldo26 { + regulator-name = "nc"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + regulator-boot-on; + }; + + buck1 { + regulator-compatible = "BUCK1"; + regulator-name = "VDD_MIF_1.0V"; + regulator-min-microvolt = <8500000>; + regulator-max-microvolt = <1100000>; + regulator-always-on; + regulator-boot-on; + }; + . + . + . + buck9 { + regulator-compatible = "BUCK9"; + regulator-name = "nc"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; +}; diff --git a/doc/device-tree-bindings/regulator/regulator.txt b/doc/device-tree-bindings/regulator/regulator.txt new file mode 100644 index 0000000..68b02a8 --- /dev/null +++ b/doc/device-tree-bindings/regulator/regulator.txt @@ -0,0 +1,54 @@ +Voltage/Current regulator + +Binding: +The regulator devices don't use the "compatible" property. The binding is done +by the prefix of regulator node's name. Usually the pmic I/O driver will provide +the array of 'struct pmic_child_info' with the prefixes and compatible drivers. +The bind is done by calling function: pmic_bind_childs(). +Example drivers: +pmic: drivers/power/pmic/max77686.c +regulator: drivers/power/regulator/max77686.c + +For the node name e.g.: "prefix[:alpha:]num { ... }": +- the driver prefix should be: "prefix" or "PREFIX" - case insensitive +- the node name's "num" is set as "dev->driver_data" on bind + +Example the prefix "ldo" will pass for: "ldo1", "ldo@1", "LDO1", "LDOREG@1"... + +Required properties: +- regulator-name: a string, required by the regulator uclass + +Note +The "regulator-name" constraint is used for setting the device's uclass +platform data '.name' field. And the regulator device name is set from +it's node name. + +Optional properties: +- regulator-min-microvolt: a minimum allowed Voltage value +- regulator-max-microvolt: a maximum allowed Voltage value +- regulator-min-microamp: a minimum allowed Current value +- regulator-max-microamp: a maximum allowed Current value +- regulator-always-on: regulator should never be disabled +- regulator-boot-on: enabled by bootloader/firmware + +Other kernel-style properties, are currently not used. + +Note: +For the regulator autoset from constraints, the framework expects that: +- regulator-min-microvolt is equal to regulator-max-microvolt +- regulator-min-microamp is equal to regulator-max-microamp +- regulator-always-on or regulator-boot-on is set + +Example: +ldo0 { + /* Mandatory */ + regulator-name = "VDDQ_EMMC_1.8V"; + + /* Optional */ + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-min-microamp = <100000>; + regulator-max-microamp = <100000>; + regulator-always-on; + regulator-boot-on; +}; diff --git a/doc/device-tree-bindings/regulator/sandbox.txt b/doc/device-tree-bindings/regulator/sandbox.txt new file mode 100644 index 0000000..d70494c --- /dev/null +++ b/doc/device-tree-bindings/regulator/sandbox.txt @@ -0,0 +1,45 @@ +Sandbox, PMIC regulators + +This device uses two drivers: +- drivers/power/pmic/sandbox.c (as parent I/O device) +- drivers/power/regulator/sandbox.c (for child regulators) + +This file describes the binding info for the REGULATOR driver. + +First, please read the binding info for the PMIC: +- doc/device-tree-bindings/pmic/sandbox.txt + +Required subnodes: +- ldoN { }; +- buckN { }; + +The sandbox PMIC can support: ldo1, ldo2, buck1, buck2. + +For each PMIC's regulator subnode, there is one required property: +- regulator-name: used for regulator uclass platform data '.name' + +Optional: +- regulator-min-microvolt: minimum allowed Voltage to set +- regulator-max-microvolt: minimum allowed Voltage to set +- regulator-min-microamps: minimum allowed Current limit to set (LDO1/BUCK1) +- regulator-max-microamps: minimum allowed Current limit to set (LDO1/BUCK1) +- regulator-always-on: regulator should be never disabled +- regulator-boot-on: regulator should be enabled by the bootloader + +Example PMIC's regulator subnodes: + +ldo1 { + regulator-name = "VDD_1.0V"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1200000>; + regulator-min-microamps = <100000>; + regulator-max-microamps = <400000>; + regulator-always-on; +}; + +buck2 { + regulator-name = "VDD_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; +}; diff --git a/doc/device-tree-bindings/serial/pl01x.txt b/doc/device-tree-bindings/serial/pl01x.txt new file mode 100644 index 0000000..61c27d1 --- /dev/null +++ b/doc/device-tree-bindings/serial/pl01x.txt @@ -0,0 +1,7 @@ +* ARM AMBA Primecell PL011 & PL010 serial UART + +Required properties: +- compatible: must be "arm,primecell", "arm,pl011" or "arm,pl010" +- reg: exactly one register range with length 0x1000 +- clock: input clock frequency for the UART (used to calculate the baud + rate divisor) diff --git a/doc/device-tree-bindings/video/display-timing.txt b/doc/device-tree-bindings/video/display-timing.txt new file mode 100644 index 0000000..e1d4a0b --- /dev/null +++ b/doc/device-tree-bindings/video/display-timing.txt @@ -0,0 +1,110 @@ +display-timing bindings +======================= + +display-timings node +-------------------- + +required properties: + - none + +optional properties: + - native-mode: The native mode for the display, in case multiple modes are + provided. When omitted, assume the first node is the native. + +timing subnode +-------------- + +required properties: + - hactive, vactive: display resolution + - hfront-porch, hback-porch, hsync-len: horizontal display timing parameters + in pixels + vfront-porch, vback-porch, vsync-len: vertical display timing parameters in + lines + - clock-frequency: display clock in Hz + +optional properties: + - hsync-active: hsync pulse is active low/high/ignored + - vsync-active: vsync pulse is active low/high/ignored + - de-active: data-enable pulse is active low/high/ignored + - pixelclk-active: with + - active high = drive pixel data on rising edge/ + sample data on falling edge + - active low = drive pixel data on falling edge/ + sample data on rising edge + - ignored = ignored + - interlaced (bool): boolean to enable interlaced mode + - doublescan (bool): boolean to enable doublescan mode + - doubleclk (bool): boolean to enable doubleclock mode + +All the optional properties that are not bool follow the following logic: + <1>: high active + <0>: low active + omitted: not used on hardware + +There are different ways of describing the capabilities of a display. The +devicetree representation corresponds to the one commonly found in datasheets +for displays. If a display supports multiple signal timings, the native-mode +can be specified. + +The parameters are defined as: + + +----------+-------------------------------------+----------+-------+ + | | ↑ | | | + | | |vback_porch | | | + | | ↓ | | | + +----------#######################################----------+-------+ + | # ↑ # | | + | # | # | | + | hback # | # hfront | hsync | + | porch # | hactive # porch | len | + |<-------->#<-------+--------------------------->#<-------->|<----->| + | # | # | | + | # |vactive # | | + | # | # | | + | # ↓ # | | + +----------#######################################----------+-------+ + | | ↑ | | | + | | |vfront_porch | | | + | | ↓ | | | + +----------+-------------------------------------+----------+-------+ + | | ↑ | | | + | | |vsync_len | | | + | | ↓ | | | + +----------+-------------------------------------+----------+-------+ + +Example: + + display-timings { + native-mode = <&timing0>; + timing0: 1080p24 { + /* 1920x1080p24 */ + clock-frequency = <52000000>; + hactive = <1920>; + vactive = <1080>; + hfront-porch = <25>; + hback-porch = <25>; + hsync-len = <25>; + vback-porch = <2>; + vfront-porch = <2>; + vsync-len = <2>; + hsync-active = <1>; + }; + }; + +Every required property also supports the use of ranges, so the commonly used +datasheet description with minimum, typical and maximum values can be used. + +Example: + + timing1: timing { + /* 1920x1080p24 */ + clock-frequency = <148500000>; + hactive = <1920>; + vactive = <1080>; + hsync-len = <0 44 60>; + hfront-porch = <80 88 95>; + hback-porch = <100 148 160>; + vfront-porch = <0 4 6>; + vback-porch = <0 36 50>; + vsync-len = <0 5 6>; + }; diff --git a/doc/driver-model/pmic-framework.txt b/doc/driver-model/pmic-framework.txt new file mode 100644 index 0000000..95b1a66 --- /dev/null +++ b/doc/driver-model/pmic-framework.txt @@ -0,0 +1,140 @@ +# +# (C) Copyright 2014-2015 Samsung Electronics +# Przemyslaw Marczak <p.marczak@samsung.com> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +PMIC framework based on Driver Model +==================================== +TOC: +1. Introduction +2. How does it work +3. Pmic uclass +4. Regulator uclass + +1. Introduction +=============== +This is an introduction to driver-model multi uclass PMIC IC's support. +At present it's based on two uclass types: +- UCLASS_PMIC - basic uclass type for PMIC I/O, which provides common + read/write interface. +- UCLASS_REGULATOR - additional uclass type for specific PMIC features, + which are Voltage/Current regulators. + +New files: +UCLASS_PMIC: +- drivers/power/pmic/pmic-uclass.c +- include/power/pmic.h +UCLASS_REGULATOR: +- drivers/power/regulator/regulator-uclass.c +- include/power/regulator.h + +Commands: +- common/cmd_pmic.c +- common/cmd_regulator.c + +2. How doees it work +==================== +The Power Management Integrated Circuits (PMIC) are used in embedded systems +to provide stable, precise and specific voltage power source with over-voltage +and thermal protection circuits. + +The single PMIC can provide various functions by single or multiple interfaces, +like in the example below. + +-- SoC + | + | ______________________________________ + | BUS 0 | Multi interface PMIC IC |--> LDO out 1 + | e.g.I2C0 | |--> LDO out N + |-----------|---- PMIC device 0 (READ/WRITE ops) | + | or SPI0 | |_ REGULATOR device (ldo/... ops) |--> BUCK out 1 + | | |_ CHARGER device (charger ops) |--> BUCK out M + | | |_ MUIC device (microUSB con ops) | + | BUS 1 | |_ ... |---> BATTERY + | e.g.I2C1 | | + |-----------|---- PMIC device 1 (READ/WRITE ops) |---> USB in 1 + . or SPI1 | |_ RTC device (rtc ops) |---> USB in 2 + . |______________________________________|---> USB out + . + +Since U-Boot provides driver model features for I2C and SPI bus drivers, +the PMIC devices should also support this. By the pmic and regulator API's, +PMIC drivers can simply provide a common functions, for multi-interface and +and multi-instance device support. + +Basic design assumptions: + +- Common I/O API - UCLASS_PMIC +For the multi-function PMIC devices, this can be used as parent I/O device +for each IC's interface. Then, each children uses the same dev for read/write. + +- Common regulator API - UCLASS_REGULATOR +For driving the regulator attributes, auto setting function or command line +interface, based on kernel-style regulator device tree constraints. + +For simple implementations, regulator drivers are not required, so the code can +use pmic read/write directly. + +3. Pmic uclass +============== +The basic information: +* Uclass: 'UCLASS_PMIC' +* Header: 'include/power/pmic.h' +* Core: 'drivers/power/pmic/pmic-uclass.c' + config: 'CONFIG_DM_PMIC' +* Command: 'common/cmd_pmic.c' + config: 'CONFIG_CMD_PMIC' +* Example: 'drivers/power/pmic/max77686.c' + +For detailed API description, please refer to the header file. + +As an example of the pmic driver, please refer to the MAX77686 driver. + +Please pay attention for the driver's bind() method. Exactly the function call: +'pmic_bind_children()', which is used to bind the regulators by using the array +of regulator's node, compatible prefixes. + +The 'pmic; command also supports the new API. So the pmic command can be enabled +by adding CONFIG_CMD_PMIC. +The new pmic command allows to: +- list pmic devices +- choose the current device (like the mmc command) +- read or write the pmic register +- dump all pmic registers + +This command can use only UCLASS_PMIC devices, since this uclass is designed +for pmic I/O operations only. + +For more information, please refer to the core file. + +4. Regulator uclass +=================== +The basic information: +* Uclass: 'UCLASS_REGULATOR' +* Header: 'include/power/regulator.h' +* Core: 'drivers/power/regulator/regulator-uclass.c' + config: 'CONFIG_DM_REGULATOR' + binding: 'doc/device-tree-bindings/regulator/regulator.txt' +* Command: 'common/cmd_regulator.c' + config: 'CONFIG_CMD_REGULATOR' +* Example: 'drivers/power/regulator/max77686.c' + 'drivers/power/pmic/max77686.c' (required I/O driver for the above) +* Example: 'drivers/power/regulator/fixed.c' + config" 'CONFIG_DM_REGULATOR_FIXED' + +For detailed API description, please refer to the header file. + +For the example regulator driver, please refer to the MAX77686 regulator driver, +but this driver can't operate without pmic's example driver, which provides an +I/O interface for MAX77686 regulator. + +The second example is a fixed Voltage/Current regulator for a common use. + +The 'regulator' command also supports the new API. The command allow: +- list regulator devices +- choose the current device (like the mmc command) +- do all regulator-specific operations + +For more information, please refer to the command file. diff --git a/doc/git-mailrc b/doc/git-mailrc index 174109f..598bb3e 100644 --- a/doc/git-mailrc +++ b/doc/git-mailrc @@ -22,7 +22,7 @@ alias gruss Graeme Russ <graeme.russ@gmail.com> alias hs Heiko Schocher <hs@denx.de> alias ijc Ian Campbell <ijc+uboot@hellion.org.uk> alias iwamatsu Nobuhiro Iwamatsu <iwamatsu@nigauri.org> -alias jagan Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> +alias jagan Jagan Teki <jteki@openedev.com> alias jasonjin Jason Jin <jason.jin@freescale.com> alias jhersh Joe Hershberger <joe.hershberger@ni.com> alias jwrdegoede Hans de Goede <hdegoede@redhat.com> @@ -64,6 +64,7 @@ alias rmobile uboot, iwamatsu alias s3c samsung alias s5pc samsung alias samsung uboot, prom +alias socfpga uboot, marex, Dinh Nguyen <dinguyen@opensource.altera.com> alias sunxi uboot, ijc, jwrdegoede alias tegra uboot, sjg, Tom Warren <twarren@nvidia.com>, Stephen Warren <swarren@nvidia.com> alias tegra2 tegra |