diff options
Diffstat (limited to 'doc')
| -rw-r--r-- | doc/README-integrator | 2 | ||||
| -rw-r--r-- | doc/README.ARM-SoC | 12 | ||||
| -rw-r--r-- | doc/README.LED | 2 | ||||
| -rw-r--r-- | doc/README.PIP405 | 16 | ||||
| -rw-r--r-- | doc/README.POST | 4 | ||||
| -rw-r--r-- | doc/README.RPXlite | 2 | ||||
| -rw-r--r-- | doc/README.TQM8260 | 8 | ||||
| -rw-r--r-- | doc/README.alaska8220 | 38 | ||||
| -rw-r--r-- | doc/README.bedbug | 16 | ||||
| -rw-r--r-- | doc/README.enetaddr | 11 | ||||
| -rw-r--r-- | doc/README.m52277evb | 26 | ||||
| -rw-r--r-- | doc/README.m53017evb | 26 | ||||
| -rw-r--r-- | doc/README.m5373evb | 26 | ||||
| -rw-r--r-- | doc/README.m54455evb | 26 | ||||
| -rw-r--r-- | doc/README.m5475evb | 26 | ||||
| -rw-r--r-- | doc/README.m68k | 4 | ||||
| -rw-r--r-- | doc/README.ml300 | 128 | ||||
| -rw-r--r-- | doc/README.modnet50 | 2 | ||||
| -rw-r--r-- | doc/README.mpc5xx | 8 | ||||
| -rw-r--r-- | doc/README.mvsmr | 55 | ||||
| -rw-r--r-- | doc/README.nios | 4 | ||||
| -rw-r--r-- | doc/TODO-i386 | 4 | ||||
| -rw-r--r-- | doc/uImage.FIT/multi.its | 4 |
23 files changed, 196 insertions, 254 deletions
diff --git a/doc/README-integrator b/doc/README-integrator index 4daf341..5a0e934 100644 --- a/doc/README-integrator +++ b/doc/README-integrator @@ -52,7 +52,7 @@ cpu/arm<>/start.S so that it may be used by other boards. However, to avoid duplicating code through all processor files, a generic core for ARM Integrator CMs has been added - cpu/arm_intcm + arch/arm/cpu/arm_intcm Otherwise. for example, the standard CM reset via the CM control register would need placing in each CM processor file...... diff --git a/doc/README.ARM-SoC b/doc/README.ARM-SoC index 0f2677f..d6bd624 100644 --- a/doc/README.ARM-SoC +++ b/doc/README.ARM-SoC @@ -1,24 +1,24 @@ [By Steven Scholz <steven.scholz@imc-berlin.de>, 16 Aug 2004] Since the cpu/ directory gets clobbered with peripheral driver code I -started cleaning up cpu/arm920t. +started cleaning up arch/arm/cpu/arm920t. I introduced the concept of Soc (system on a chip) into the ./cpu directory. That means that code that is cpu (i.e. core) specific resides in - cpu/$(CPU)/ + $(CPUDIR)/ and code that is specific to some SoC (i.e. vendor specific peripherals around the core) is moved into - cpu/$(CPU)/$(SOC)/ + $(CPUDIR)/$(SOC)/ -Thus a library/archive "cpu/$(CPU)/$(SOC)/lib$(SOC).a" will be build +Thus a library/archive "$(CPUDIR)/$(SOC)/lib$(SOC).a" will be build and linked. Examples will be - cpu/arm920t/imx/ - cpu/arm920t/s3c24x0 + arch/arm/cpu/arm920t/imx/ + arch/arm/cpu/arm920t/s3c24x0 One can select an SoC by passing the name of it to ./mkconfig just like diff --git a/doc/README.LED b/doc/README.LED index 94e552a..c3bcb3a 100644 --- a/doc/README.LED +++ b/doc/README.LED @@ -69,7 +69,7 @@ yellow_LED_off blue_LED_on blue_LED_off -These are weakly defined in lib_arm/board.c to noops. Where applicable, define +These are weakly defined in arch/arm/lib/board.c to noops. Where applicable, define these functions in the board specific source. TBD : Describe older board dependent macros similar to what is done for diff --git a/doc/README.PIP405 b/doc/README.PIP405 index d8b3f9c..e8a6541 100644 --- a/doc/README.PIP405 +++ b/doc/README.PIP405 @@ -17,11 +17,11 @@ Changed files: added console settings from environment - common/devices.c added ISA keyboard init - common/main.c corrected the read of bootdelay -- cpu/ppc4xx/405gp_pci.c excluded file from PIP405 -- cpu/ppc4xx/i2c.c added 16bit read write I2C support +- arch/ppc/cpu/ppc4xx/405gp_pci.c excluded file from PIP405 +- arch/ppc/cpu/ppc4xx/i2c.c added 16bit read write I2C support added page write -- cpu/ppc4xx/speed.c added get_PCI_freq -- cpu/ppc4xx/start.S added CONFIG_IDENT_STRING +- arch/ppc/cpu/ppc4xx/speed.c added get_PCI_freq +- arch/ppc/cpu/ppc4xx/start.S added CONFIG_IDENT_STRING - disk/Makefile added part_iso for CD support - disk/part.c changed to work with block device description added ISO CD support @@ -275,7 +275,7 @@ Added the config variable CONFIG_IDENT_STRING which will be added to the "U_BOOT_VERSION __TIME__ DATE___ " String, to allows to identify intermidiate and custom versions. Changed files: -- cpu/ppc4xx/start.s +- arch/ppc/cpu/ppc4xx/start.s Firmware Image: --------------- @@ -288,11 +288,11 @@ Changed files: Correct PCI Frequency for PPC405: --------------------------------- -Added function (in cpu/ppc4xx/speed.c) to get the PCI frequency for PPC405 CPU. +Added function (in arch/ppc/cpu/ppc4xx/speed.c) to get the PCI frequency for PPC405 CPU. The PCI Frequency will now be set correct in the board description in common/board.c. (was set to the busfreq before). Changed files: -- cpu/ppc4xx/speed.c +- arch/ppc/cpu/ppc4xx/speed.c - common/board.c I2C Stuff: @@ -301,7 +301,7 @@ Added defined(CONFIG_PIP405) at several points in common/cmd_i2c.c. Added 16bit read/write support for I2C (PPC405), and page write to I2C EEPROM if defined CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE. Changed files: -- cpu/ppc4xx/i2c.c +- arch/ppc/cpu/ppc4xx/i2c.c - common/cmd_i2c.c Environment / Console: diff --git a/doc/README.POST b/doc/README.POST index a81e079..0d5e20e 100644 --- a/doc/README.POST +++ b/doc/README.POST @@ -713,7 +713,7 @@ use external loopback for testing. That will need appropriate reconfiguration of the physical interface chip. The test routines for the SCC ethernet tests will be located in -cpu/mpc8xx/scc.c. +arch/ppc/cpu/mpc8xx/scc.c. 2.2.3.2. UART tests (SMC/SCC) @@ -725,7 +725,7 @@ will be transmitted. These tests may be enhanced to make to perform test will be executed manually. The test routine for the SMC/SCC UART tests will be located in -cpu/mpc8xx/serial.c. +arch/ppc/cpu/mpc8xx/serial.c. 2.2.3.3. USB test diff --git a/doc/README.RPXlite b/doc/README.RPXlite index c0238ae..0aa4d11 100644 --- a/doc/README.RPXlite +++ b/doc/README.RPXlite @@ -116,7 +116,7 @@ board/RPXLITE/RPXLITE.c /* DRAM-related routines */ board/RPXLITE/flash.c /* flash-related routines */ board/RPXLITE/config.mk /* set text base address */ - cpu/mpc8xx/serial.c /* board specific register setting */ + arch/ppc/cpu/mpc8xx/serial.c /* board specific register setting */ include/config_RPXLITE.h /* board specific registers */ See 'reg_config.txt' for register values in detail. diff --git a/doc/README.TQM8260 b/doc/README.TQM8260 index b93a1cb..e64e64a 100644 --- a/doc/README.TQM8260 +++ b/doc/README.TQM8260 @@ -14,10 +14,10 @@ The following common files have been modified by this project: MAKEALL - TQM8260 entry added Makefile - TQM8260_config entry added -cpu/mpc8260/Makefile - soft_i2c.o module added -cpu/mpc8260/ether_scc.c - TQM8260-specific definitions added, an obvious +arch/ppc/cpu/mpc8260/Makefile - soft_i2c.o module added +arch/ppc/cpu/mpc8260/ether_scc.c - TQM8260-specific definitions added, an obvious bug fixed (fcr -> scr) -cpu/mpc8260/ether_fcc.c - TQM8260-specific definitions added +arch/ppc/cpu/mpc8260/ether_fcc.c - TQM8260-specific definitions added include/flash.h - added definitions for the AM29LV640D Flash chip @@ -33,7 +33,7 @@ board/tqm8260/config.mk - config file board/tqm8260/flash.c - flash driver (for AM29LV640D) board/tqm8260/ppcboot.lds - linker script board/tqm8260/tqm8260.c - ioport and memory initialization -cpu/mpc8260/soft_i2c.c - software i2c EEPROM driver +arch/ppc/cpu/mpc8260/soft_i2c.c - software i2c EEPROM driver include/config_TQM8260.h - main configuration file diff --git a/doc/README.alaska8220 b/doc/README.alaska8220 index 0bd68d9..9249cfb 100644 --- a/doc/README.alaska8220 +++ b/doc/README.alaska8220 @@ -22,7 +22,7 @@ Changed files: - include/asm-ppc/global_data.h added global variables - inp_clk, pci_clk, vco_clk, pev_clk, flb_clk, and bExtUart -- lib_ppc/board.c added CONFIG_MPC8220 support +- arch/ppc/lib/board.c added CONFIG_MPC8220 support - net/eth.c added FEC support for MPC8220 @@ -37,24 +37,24 @@ Added files: - board/alaska/config.mk config make - board/alaska/u-boot.lds Linker description -- cpu/mpc8220/dma.h multi-channel dma header file -- cpu/mpc8220/dramSetup.h dram setup header file -- cpu/mpc8220/fec.h MPC8220 FEC header file -- cpu/mpc8220/cpu.c cpu specific code -- cpu/mpc8220/cpu_init.c Flexbus ChipSelect and Mux pins setup -- cpu/mpc8220/dramSetup.c MPC8220 DDR SDRAM setup -- cpu/mpc8220/fec.c MPC8220 FEC driver -- cpu/mpc8220/i2c.c MPC8220 I2C driver -- cpu/mpc8220/interrupts.c interrupt support (not enable) -- cpu/mpc8220/loadtask.c load dma -- cpu/mpc8220/speed.c system, pci, flexbus, pev, and cpu clock -- cpu/mpc8220/traps.c exception -- cpu/mpc8220/uart.c MPC8220 UART driver -- cpu/mpc8220/Makefile Makefile -- cpu/mpc8220/config.mk config make -- cpu/mpc8220/fec_dma_task.S MPC8220 FEC multi-channel dma program -- cpu/mpc8220/io.S io functions -- cpu/mpc8220/start.S start up +- arch/ppc/cpu/mpc8220/dma.h multi-channel dma header file +- arch/ppc/cpu/mpc8220/dramSetup.h dram setup header file +- arch/ppc/cpu/mpc8220/fec.h MPC8220 FEC header file +- arch/ppc/cpu/mpc8220/cpu.c cpu specific code +- arch/ppc/cpu/mpc8220/cpu_init.c Flexbus ChipSelect and Mux pins setup +- arch/ppc/cpu/mpc8220/dramSetup.c MPC8220 DDR SDRAM setup +- arch/ppc/cpu/mpc8220/fec.c MPC8220 FEC driver +- arch/ppc/cpu/mpc8220/i2c.c MPC8220 I2C driver +- arch/ppc/cpu/mpc8220/interrupts.c interrupt support (not enable) +- arch/ppc/cpu/mpc8220/loadtask.c load dma +- arch/ppc/cpu/mpc8220/speed.c system, pci, flexbus, pev, and cpu clock +- arch/ppc/cpu/mpc8220/traps.c exception +- arch/ppc/cpu/mpc8220/uart.c MPC8220 UART driver +- arch/ppc/cpu/mpc8220/Makefile Makefile +- arch/ppc/cpu/mpc8220/config.mk config make +- arch/ppc/cpu/mpc8220/fec_dma_task.S MPC8220 FEC multi-channel dma program +- arch/ppc/cpu/mpc8220/io.S io functions +- arch/ppc/cpu/mpc8220/start.S start up - include/mpc8220.h diff --git a/doc/README.bedbug b/doc/README.bedbug index 2616acc..4c1e6c4 100644 --- a/doc/README.bedbug +++ b/doc/README.bedbug @@ -18,15 +18,15 @@ can be easily implemented. ./common/board.c Added call to initialize debugger on startup. -./cpu/ppc4xx/Makefile +./arch/ppc/cpu/ppc4xx/Makefile Added bedbug_405.c to the Makefile. -./cpu/ppc4xx/start.S +./arch/ppc/cpu/ppc4xx/start.S Added code to handle the debug exception (0x2000) on the 405. Also added code to handle critical exceptions since the debug is treated as critical on the 405. -./cpu/ppc4xx/traps.c +./arch/ppc/cpu/ppc4xx/traps.c Added more detailed output for the program exception to tell if it is an illegal instruction, privileged instruction or a trap. Also added debug trap handler. @@ -51,7 +51,7 @@ can be easily implemented. hardware breakpoints and stepping through code. These routines are common to all PowerPC processors. -./cpu/ppc4xx/bedbug_405.c +./arch/ppc/cpu/ppc4xx/bedbug_405.c AMCC PPC405 specific debugger routines. @@ -63,16 +63,16 @@ Changes: common/cmd_bedbug.c Added call to initialize 860 debugger. - cpu/mpc8xx/Makefile + arch/ppc/cpu/mpc8xx/Makefile Added new file "bedbug_860.c" to the makefile - cpu/mpc8xx/start.S + arch/ppc/cpu/mpc8xx/start.S Added handler for InstructionBreakpoint (0xfd00) - cpu/mpc8xx/traps.c + arch/ppc/cpu/mpc8xx/traps.c Added new routine DebugException() New Files: - cpu/mpc8xx/bedbug_860.c + arch/ppc/cpu/mpc8xx/bedbug_860.c CPU-specific routines for 860 debug registers. diff --git a/doc/README.enetaddr b/doc/README.enetaddr index 1d75aa3..94d800a 100644 --- a/doc/README.enetaddr +++ b/doc/README.enetaddr @@ -28,6 +28,17 @@ Here are the places where MAC addresses might be stored: purpose of passing this information to an OS kernel we are about to boot +Correct flow of setting up the MAC address (summarized): + +1. Read from hardware in initialize() function +2. Read from environment in net/eth.c after initialize() +3. Give priority to the value in the environment if a conflict +4. Program hardware in the device's init() function. + +If somebody wants to subvert the design philosophy, this can be done +in the board-specific board_eth_init() function by calling eth_init() +after all the NICs have been registered. + ------- Usage ------- diff --git a/doc/README.m52277evb b/doc/README.m52277evb index 40f9028..b6e955b 100644 --- a/doc/README.m52277evb +++ b/doc/README.m52277evb @@ -14,13 +14,13 @@ Changed files: - board/freescale/m52277evb/config.mk config make - board/freescale/m52277evb/u-boot.lds Linker description -- cpu/mcf5227x/cpu.c cpu specific code -- cpu/mcf5227x/cpu_init.c FBCS, Mux pins, icache and RTC extra regs -- cpu/mcf5227x/interrupts.c cpu specific interrupt support -- cpu/mcf5227x/speed.c system, flexbus, and cpu clock -- cpu/mcf5227x/Makefile Makefile -- cpu/mcf5227x/config.mk config make -- cpu/mcf5227x/start.S start up assembly code +- arch/m68k/cpu/mcf5227x/cpu.c cpu specific code +- arch/m68k/cpu/mcf5227x/cpu_init.c FBCS, Mux pins, icache and RTC extra regs +- arch/m68k/cpu/mcf5227x/interrupts.c cpu specific interrupt support +- arch/m68k/cpu/mcf5227x/speed.c system, flexbus, and cpu clock +- arch/m68k/cpu/mcf5227x/Makefile Makefile +- arch/m68k/cpu/mcf5227x/config.mk config make +- arch/m68k/cpu/mcf5227x/start.S start up assembly code - doc/README.m52277evb This readme file @@ -53,12 +53,12 @@ Changed files: - include/configs/M52277EVB.h Board specific configuration file -- lib_m68k/board.c board init function -- lib_m68k/cache.c -- lib_m68k/interrupts Coldfire common interrupt functions -- lib_m68k/m68k_linux.c -- lib_m68k/time.c Timer functions (Dma timer and PIT) -- lib_m68k/traps.c Exception init code +- arch/m68k/lib/board.c board init function +- arch/m68k/lib/cache.c +- arch/m68k/lib/interrupts Coldfire common interrupt functions +- arch/m68k/lib/m68k_linux.c +- arch/m68k/lib/time.c Timer functions (Dma timer and PIT) +- arch/m68k/lib/traps.c Exception init code 1 MCF52277 specific Options/Settings ==================================== diff --git a/doc/README.m53017evb b/doc/README.m53017evb index 60cfa95..42798c2 100644 --- a/doc/README.m53017evb +++ b/doc/README.m53017evb @@ -15,13 +15,13 @@ Changed files: - board/freescale/m53017evb/config.mk config make - board/freescale/m53017evb/u-boot.lds Linker description -- cpu/mcf532x/cpu.c cpu specific code -- cpu/mcf532x/cpu_init.c FBCS, Mux pins, icache and RTC extra regs -- cpu/mcf532x/interrupts.c cpu specific interrupt support -- cpu/mcf532x/speed.c system, flexbus, and cpu clock -- cpu/mcf532x/Makefile Makefile -- cpu/mcf532x/config.mk config make -- cpu/mcf532x/start.S start up assembly code +- arch/m68k/cpu/mcf532x/cpu.c cpu specific code +- arch/m68k/cpu/mcf532x/cpu_init.c FBCS, Mux pins, icache and RTC extra regs +- arch/m68k/cpu/mcf532x/interrupts.c cpu specific interrupt support +- arch/m68k/cpu/mcf532x/speed.c system, flexbus, and cpu clock +- arch/m68k/cpu/mcf532x/Makefile Makefile +- arch/m68k/cpu/mcf532x/config.mk config make +- arch/m68k/cpu/mcf532x/start.S start up assembly code - doc/README.m53017evb This readme file @@ -51,12 +51,12 @@ Changed files: - include/configs/M53017EVB.h Board specific configuration file -- lib_m68k/board.c board init function -- lib_m68k/cache.c -- lib_m68k/interrupts Coldfire common interrupt functions -- lib_m68k/m68k_linux.c -- lib_m68k/time.c Timer functions (Dma timer and PIT) -- lib_m68k/traps.c Exception init code +- arch/m68k/lib/board.c board init function +- arch/m68k/lib/cache.c +- arch/m68k/lib/interrupts Coldfire common interrupt functions +- arch/m68k/lib/m68k_linux.c +- arch/m68k/lib/time.c Timer functions (Dma timer and PIT) +- arch/m68k/lib/traps.c Exception init code 1 MCF5301x specific Options/Settings ==================================== diff --git a/doc/README.m5373evb b/doc/README.m5373evb index 5591748..e90a320 100644 --- a/doc/README.m5373evb +++ b/doc/README.m5373evb @@ -15,13 +15,13 @@ Changed files: - board/freescale/m5373evb/config.mk config make - board/freescale/m5373evb/u-boot.lds Linker description -- cpu/mcf532x/cpu.c cpu specific code -- cpu/mcf532x/cpu_init.c FBCS, Mux pins, icache and RTC extra regs -- cpu/mcf532x/interrupts.c cpu specific interrupt support -- cpu/mcf532x/speed.c system, pci, flexbus, and cpu clock -- cpu/mcf532x/Makefile Makefile -- cpu/mcf532x/config.mk config make -- cpu/mcf532x/start.S start up assembly code +- arch/m68k/cpu/mcf532x/cpu.c cpu specific code +- arch/m68k/cpu/mcf532x/cpu_init.c FBCS, Mux pins, icache and RTC extra regs +- arch/m68k/cpu/mcf532x/interrupts.c cpu specific interrupt support +- arch/m68k/cpu/mcf532x/speed.c system, pci, flexbus, and cpu clock +- arch/m68k/cpu/mcf532x/Makefile Makefile +- arch/m68k/cpu/mcf532x/config.mk config make +- arch/m68k/cpu/mcf532x/start.S start up assembly code - doc/README.m5373evb This readme file @@ -50,12 +50,12 @@ Changed files: - include/configs/M5373EVB.h Board specific configuration file -- lib_m68k/board.c board init function -- lib_m68k/cache.c -- lib_m68k/interrupts Coldfire common interrupt functions -- lib_m68k/m68k_linux.c -- lib_m68k/time.c Timer functions (Dma timer and PIT) -- lib_m68k/traps.c Exception init code +- arch/m68k/lib/board.c board init function +- arch/m68k/lib/cache.c +- arch/m68k/lib/interrupts Coldfire common interrupt functions +- arch/m68k/lib/m68k_linux.c +- arch/m68k/lib/time.c Timer functions (Dma timer and PIT) +- arch/m68k/lib/traps.c Exception init code 1 MCF5373 specific Options/Settings ==================================== diff --git a/doc/README.m54455evb b/doc/README.m54455evb index 1888e16..918a746 100644 --- a/doc/README.m54455evb +++ b/doc/README.m54455evb @@ -18,13 +18,13 @@ Changed files: - common/cmd_bdinfo.c Clock frequencies output - common/cmd_mii.c mii support -- cpu/mcf5445x/cpu.c cpu specific code -- cpu/mcf5445x/cpu_init.c Flexbus ChipSelect, Mux pins setup, icache and RTC extra regs -- cpu/mcf5445x/interrupts.c cpu specific interrupt support -- cpu/mcf5445x/speed.c system, pci, flexbus, and cpu clock -- cpu/mcf5445x/Makefile Makefile -- cpu/mcf5445x/config.mk config make -- cpu/mcf5445x/start.S start up assembly code +- arch/m68k/cpu/mcf5445x/cpu.c cpu specific code +- arch/m68k/cpu/mcf5445x/cpu_init.c Flexbus ChipSelect, Mux pins setup, icache and RTC extra regs +- arch/m68k/cpu/mcf5445x/interrupts.c cpu specific interrupt support +- arch/m68k/cpu/mcf5445x/speed.c system, pci, flexbus, and cpu clock +- arch/m68k/cpu/mcf5445x/Makefile Makefile +- arch/m68k/cpu/mcf5445x/config.mk config make +- arch/m68k/cpu/mcf5445x/start.S start up assembly code - doc/README.m54455evb This readme file @@ -52,12 +52,12 @@ Changed files: - include/configs/M54455EVB.h Board specific configuration file -- lib_m68k/board.c board init function -- lib_m68k/cache.c -- lib_m68k/interrupts Coldfire common interrupt functions -- lib_m68k/m68k_linux.c -- lib_m68k/time.c Timer functions (Dma timer and PIT) -- lib_m68k/traps.c Exception init code +- arch/m68k/lib/board.c board init function +- arch/m68k/lib/cache.c +- arch/m68k/lib/interrupts Coldfire common interrupt functions +- arch/m68k/lib/m68k_linux.c +- arch/m68k/lib/time.c Timer functions (Dma timer and PIT) +- arch/m68k/lib/traps.c Exception init code - rtc/mcfrtc.c Realtime clock Driver diff --git a/doc/README.m5475evb b/doc/README.m5475evb index f3a1d7b..f5658ea 100644 --- a/doc/README.m5475evb +++ b/doc/README.m5475evb @@ -15,14 +15,14 @@ Changed files: - board/freescale/m547xevb/config.mk config make - board/freescale/m547xevb/u-boot.lds Linker description -- cpu/mcf547x_8x/cpu.c cpu specific code -- cpu/mcf547x_8x/cpu_init.c Flexbus ChipSelect, Mux pins setup, icache and RTC extra regs -- cpu/mcf547x_8x/interrupts.c cpu specific interrupt support -- cpu/mcf547x_8x/slicetimer.c Timer support -- cpu/mcf547x_8x/speed.c system, pci, flexbus, and cpu clock -- cpu/mcf547x_8x/Makefile Makefile -- cpu/mcf547x_8x/config.mk config make -- cpu/mcf547x_8x/start.S start up assembly code +- arch/m68k/cpu/mcf547x_8x/cpu.c cpu specific code +- arch/m68k/cpu/mcf547x_8x/cpu_init.c Flexbus ChipSelect, Mux pins setup, icache and RTC extra regs +- arch/m68k/cpu/mcf547x_8x/interrupts.c cpu specific interrupt support +- arch/m68k/cpu/mcf547x_8x/slicetimer.c Timer support +- arch/m68k/cpu/mcf547x_8x/speed.c system, pci, flexbus, and cpu clock +- arch/m68k/cpu/mcf547x_8x/Makefile Makefile +- arch/m68k/cpu/mcf547x_8x/config.mk config make +- arch/m68k/cpu/mcf547x_8x/start.S start up assembly code - doc/README.m5475evb This readme file @@ -58,11 +58,11 @@ Changed files: - include/configs/M5475EVB.h Board specific configuration file -- lib_m68k/board.c board init function -- lib_m68k/cache.c -- lib_m68k/interrupts Coldfire common interrupt functions -- lib_m68k/m68k_linux.c -- lib_m68k/traps.c Exception init code +- arch/m68k/lib/board.c board init function +- arch/m68k/lib/cache.c +- arch/m68k/lib/interrupts Coldfire common interrupt functions +- arch/m68k/lib/m68k_linux.c +- arch/m68k/lib/traps.c Exception init code 1 MCF547x specific Options/Settings ==================================== diff --git a/doc/README.m68k b/doc/README.m68k index e6c33a7..a00ab69 100644 --- a/doc/README.m68k +++ b/doc/README.m68k @@ -31,12 +31,12 @@ hopefully added soon! 2.1 Motorola Coldfire MCF5272 ----------------------------- -CPU specific code is located in: cpu/mcf52x2 +CPU specific code is located in: arch/m68k/cpu/mcf52x2 2.1 Motorola Coldfire MCF5282 ----------------------------- -CPU specific code is located in: cpu/mcf52x2 +CPU specific code is located in: arch/m68k/cpu/mcf52x2 The MCF5282 Port no longer needs a preloader and can place in external or internal FLASH. diff --git a/doc/README.ml300 b/doc/README.ml300 deleted file mode 100644 index 27c5b92..0000000 --- a/doc/README.ml300 +++ /dev/null @@ -1,128 +0,0 @@ -Xilinx ML300 platform -===================== - -0. Introduction ---------------- - -The Xilinx ML300 board is based on the Virtex-II Pro FPGA with -integrated AMCC PowerPC 405 core. The board is normally booted from -System ACE CF. U-Boot is then run out of main memory. - -An FPGA is a configurable and thus very flexible device. To -accommodate for this flexibility this port of U-Boot includes the -required means to regenerate the drivers and configuration files if -you decide to change the hardware design. The required steps are -described below. - - -1. Requirements ---------------- - -To compile and run U-Boot on the Xilinx ML300 platform you need the -following items. - -- A Xilinx ML300 platform (see http://www.xilinx.com/ml300) -- EDK and ISE development tools (shipping with ML300) -- Parallel4 cable (shipping with ML300) -- The EDK reference design for ML300. You can get this as design #6 from - http://www.xilinx.com/ise/embedded/edk_examples.htm -- A BOOTP/TFTP server - - -2. Quick Start --------------- - -To compile and run U-Boot on ML300 follow the steps below. Make sure -to consult the documentation for U-Boot, EDK, and the EDK reference -design for ML300 if you have any questions. - -1. Implement the EDK reference design for ML300. You can use any of - the project files, for example from a xygwin shell: - $ xps -nw system_linux.xmp - XPS% run init_bram -2. Configure and compile U-Boot. Change into the root directory of - U-Boot and run: - $ export CROSS_COMPILE=powerpc-eabi- - $ make ml300_config - $ make -3. Set up the ML300, connect the Parallel4 and the serial cable. Start - a terminal on your host computer and set the communication - parameters to 9600,8N1,no handshake. -4. Set up the BOOTP/TFTP server on your host machine. U-Boot is - preconfigured to use a fixed HW MAC address of 00:0A:35:00:22:01. -5. Download the bitstream to the ML300. -6. Use XMD to download and run U-Boot on the ML300: - $ xmd - XMD% ppcconnect - XMD% dow u-boot - XMD% run - -You can now make an ACE file out of bitstream and U-Boot: - $ xmd genace.tcl -jprog -board ml300 -hw \ - implementation/download.bit -elf u-boot -ace top.ace - -Put the ACE file onto the MicroDrive, for example into xilinx/myace, -and reboot ML300. - - -3. Generating a Custom BSP for U-Boot -------------------------------------- - -If you decide to change the EDK reference design for ML300 or if you -build a new design from scratch either with the Base System Builder in -XPS or all by hand you most likely will change the base addresses for -the Uart and the Ethernet peripheral. If you do so you will have two -options: - -1. Edit boards/xilinx/ml300/xparameters.h to reflect the changes you - made to your hardware. -2. Use the MLD technology provided by Xilinx Platform Studio to make - the changes automatically. To do so go to the root directory of the - EDK reference design for ML300. Copy the Linux project file and the - Linux software configuration file: - $ cp system_linux.xmp system_uboot.xmp - $ cp system_linux.mss system_uboot.mss - - Edit system_uboot.xmp and and have it point to system_uboot.mss for - the software configuration. - - Then, copy the sw_services directory in - boards/xilinx/ml300/sw_services to the root directory of the EDK - reference design for ML300. - $ cp -R <uboot dir>/boards/xilinx/ml300/sw_services <edk dir> - - Modify system_uboot.mss. Look for the Linux library definition - and change it to generate a BSP for U-Boot. An example, might look - like this: - - BEGIN LIBRARY - PARAMETER LIBRARY_NAME = uboot - PARAMETER LIBRARY_VER = 1.00.a - PARAMETER CONNECTED_PERIPHS = (opb_uart16550_0,opb_ethernet_0) - PARAMETER TARGET_DIR = <uboot dir> - END - - Now, you are ready to generate the Xilinx ML300 BSP for U-Boot: - $ xps -nw system_uboot.xmp - XPS% run libs - - If all goes well the new configuration has been copied into the - right places within the U-Boot source tree. Recompile U-Boot and - run it on the ML300. - - -4. ToDo -------- - -- Add support for all other peripherals on ML300. -- Read the MAC address out of the IIC EEPROM. -- Store the bootargs in the IIC EEPROM. - - -5. References -------------- - -ML300: http://www.xilinx.com/ml300 -EDK: http://www.xilinx.com/edk -ISE: http://www.xilinx.com/ise -Reference Design: http://www.xilinx.com/ise/embedded/edk_examples.htm diff --git a/doc/README.modnet50 b/doc/README.modnet50 index f7bb254..2ac3c8f 100644 --- a/doc/README.modnet50 +++ b/doc/README.modnet50 @@ -45,7 +45,7 @@ flash. Files: -cpu/arm720t/serial_netarm.c .. serial I/O for the cpu +arch/arm/cpu/arm720t/serial_netarm.c .. serial I/O for the cpu board/modnet50/lowlevel_init.S .. memory setup for ModNET50 board/modnet50/flash.c .. flash routines diff --git a/doc/README.mpc5xx b/doc/README.mpc5xx index 07be863..26fb0c2 100644 --- a/doc/README.mpc5xx +++ b/doc/README.mpc5xx @@ -25,7 +25,7 @@ Added or Changed Files: u-boot-0.2.0/common/cmd_boot.c u-boot-0.2.0/common/cmd_reginfo.c u-boot-0.2.0/common/environment.c -u-boot-0.2.0/cpu/mpc5xx/* +u-boot-0.2.0/arch/ppc/cpu/mpc5xx/* u-boot-0.2.0/include/cmd_reginfo.h u-boot-0.2.0/include/common.h u-boot-0.2.0/include/ppc_asm.tmpl @@ -34,9 +34,9 @@ u-boot-0.2.0/include/mpc5xx.h u-boot-0.2.0/include/status_led.h u-boot-0.2.0/include/asm-ppc/u-boot.h u-boot-0.2.0/include/asm-ppc/5xx_immap.h -u-boot-0.2.0/lib_ppc/board.c -u-boot-0.2.0/lib_ppc/cache.c -u-boot-0.2.0/lib_ppc/time.c +u-boot-0.2.0/arch/ppc/lib/board.c +u-boot-0.2.0/arch/ppc/lib/cache.c +u-boot-0.2.0/arch/ppc/lib/time.c u-boot-0.2.0/Makefile u-boot-0.2.0/CREDITS u-boot-0.2.0/doc/README.mpc5xx diff --git a/doc/README.mvsmr b/doc/README.mvsmr new file mode 100644 index 0000000..d729ea6 --- /dev/null +++ b/doc/README.mvsmr @@ -0,0 +1,55 @@ +Matrix Vision mvSMR +------------------- + +1. Board Description + + The mvSMR is a 75x130mm single image processing board used + in automation. Power Supply is 24VDC. + +2 System Components + +2.1 CPU + Freescale MPC5200B CPU running at 400MHz core and 133MHz XLB/IPB. + 64MB DDR-I @ 133MHz. + 8 MByte Nor Flash on local bus. + 2 serial ports. Console running on ttyS0 @ 115200 8N1. + +2.2 PCI + PCI clock fixed at 33MHz due to old'n'slow Xilinx PCI core. + +2.3 FPGA + Xilinx Spartan-3 XC3S200 with PCI DMA engine. + Connects to Matrix Vision specific CCD/CMOS sensor interface. + +2.4 I2C + EEPROM @ 0xA0 for vendor specifics. + image sensor interface (slave adresses depend on sensor) + +3 Flash layout. + + reset vector is 0x00000100, i.e. "LOWBOOT". + + FF800000 u-boot + FF806000 u-boot script image + FF808000 u-boot environment + FF840000 FPGA raw bit file + FF880000 root FS + FFF00000 kernel + +4 Booting + + On startup the bootscript @ FF806000 is executed. This script can be + exchanged easily. Default boot mode is "boot from flash", i.e. system + works stand-alone. + + This behaviour depends on some environment variables : + + "netboot" : yes ->try dhcp/bootp and boot from network. + A "dhcp_client_id" and "dhcp_vendor-class-identifier" can be used for + DHCP server configuration, e.g. to provide different images to + different devices. + + During netboot the system tries to get 3 image files: + 1. Kernel - name + data is given during BOOTP. + 2. Initrd - name is stored in "initrd_name" + Fallback files are the flash versions. diff --git a/doc/README.nios b/doc/README.nios index 7f34938..5628144 100644 --- a/doc/README.nios +++ b/doc/README.nios @@ -243,8 +243,8 @@ cover most of the individual functions to get you started. following commands, then close the console window: (gdb) directory common - (gdb) directory cpu/nios - (gdb) directory lib_nios + (gdb) directory arch/nios/cpu + (gdb) directory arch/nios/lib (gdb) directory board/altera/dk1c20 Note that the last command is for the DK1C20 board only. If you diff --git a/doc/TODO-i386 b/doc/TODO-i386 index 84113f8..9b6c5d4 100644 --- a/doc/TODO-i386 +++ b/doc/TODO-i386 @@ -4,11 +4,11 @@ i386 port missing features: * setup the BIOS data area and BIOS equipment word to reflect machine config. * Make reset work (from Linux and from the boot prompt) * DMA, FDC, RTC, KBC initialization -* split of part of cpu/i386/interrupt.c to cpu/i385/entry.c? +* split of part of arch/i386/cpu/interrupt.c to cpu/i385/entry.c? * re-entry of protected mode from real mode, should be added to realmode_switch.S (and used by INT 10h and INT 16h handlers for console I/O during early linux boot...) -* missing functions in lib_i386 and cpu/i386 +* missing functions in arch/i386/lib and arch/i386/cpu * speaker beep interface diff --git a/doc/uImage.FIT/multi.its b/doc/uImage.FIT/multi.its index a120da0..881b749 100644 --- a/doc/uImage.FIT/multi.its +++ b/doc/uImage.FIT/multi.its @@ -61,6 +61,8 @@ arch = "ppc"; os = "linux"; compression = "gzip"; + load = <00000000>; + entry = <00000000>; hash@1 { algo = "sha1"; }; @@ -73,6 +75,8 @@ arch = "ppc"; os = "linux"; compression = "gzip"; + load = <00000000>; + entry = <00000000>; hash@1 { algo = "crc32"; }; |